X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gas%2Fdoc%2Fc-m68k.texi;h=965693f970bbe40745e5818342d660600531b802;hb=c87db184a7dd1e5542b807ae6d29db02b8ea0f5e;hp=16f857f3a7c30d6c81a34d5e64be5c06792b6c20;hpb=5b64ad42d36e6d487e1f7287d37fbc243a178e72;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/doc/c-m68k.texi b/gas/doc/c-m68k.texi index 16f857f3a7..965693f970 100644 --- a/gas/doc/c-m68k.texi +++ b/gas/doc/c-m68k.texi @@ -1,4 +1,5 @@ -@c Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. +@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000, 2003, 2004 +@c Free Software Foundation, Inc. @c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo. @ifset GENERIC @@ -27,9 +28,12 @@ @cindex options, M680x0 @cindex M680x0 options The Motorola 680x0 version of @code{@value{AS}} has a few machine -dependent options. +dependent options: + +@table @samp @cindex @samp{-l} option, M680x0 +@item -l You can use the @samp{-l} option to shorten the size of references to undefined symbols. If you do not use the @samp{-l} option, references to undefined symbols are wide enough for a full @code{long} (32 bits). (Since @@ -41,6 +45,7 @@ This may be useful if you want the object file to be as small as possible, and you know that the relevant symbols are always less than 17 bits away. @cindex @samp{--register-prefix-optional} option, M680x0 +@item --register-prefix-optional For some configurations, especially those where the compiler normally does not prepend an underscore to the names of user variables, the assembler requires a @samp{%} before any use of a register name. This @@ -54,6 +59,7 @@ refer to C variables and functions with the same names as register names. @cindex @samp{--bitwise-or} option, M680x0 +@item --bitwise-or Normally the character @samp{|} is treated as a comment character, which means that it can not be used in expressions. The @samp{--bitwise-or} option turns @samp{|} into a normal character. In this mode, you must @@ -62,6 +68,7 @@ at the beginning of a line. @cindex @samp{--base-size-default-16} @cindex @samp{--base-size-default-32} +@item --base-size-default-16 --base-size-default-32 If you use an addressing mode with a base register without specifying the size, @code{@value{AS}} will normally use the full 32 bit value. For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to @@ -73,6 +80,7 @@ default behaviour. @cindex @samp{--disp-size-default-16} @cindex @samp{--disp-size-default-32} +@item --disp-size-default-16 --disp-size-default-32 If you use an addressing mode with a displacement, and the value of the displacement is not known, @code{@value{AS}} will normally assume that the value is 32 bits. For example, if the symbol @samp{disp} has not @@ -84,9 +92,22 @@ to instead assume that the displacement is 16 bits. In this case, @samp{disp} is a 16 bit value. You may use the @samp{--disp-size-default-32} option to restore the default behaviour. +@cindex @samp{--pcrel} +@item --pcrel +Always keep branches PC-relative. In the M680x0 architecture all branches +are defined as PC-relative. However, on some processors they are limited +to word displacements maximum. When @code{@value{AS}} needs a long branch +that is not available, it normally emits an absolute jump instead. This +option disables this substitution. When this option is given and no long +branches are available, only word branches will be emitted. An error +message will be generated if a word branch cannot reach its target. This +option has no effect on 68020 and other processors that have long branches. +@pxref{M68K-Branch,,Branch Improvement}. + @cindex @samp{-m68000} and related options @cindex architecture options, M680x0 @cindex M680x0 architecture options +@item -m68000 @code{@value{AS}} can assemble code for several different members of the Motorola 680x0 family. The default depends upon how @code{@value{AS}} was configured when it was built; normally, the default is to assemble @@ -144,6 +165,19 @@ Assemble for the 68060. Assemble for the CPU32 family of chips. @item -m5200 +@item -m5202 +@item -m5204 +@item -m5206 +@item -m5206e +@item -m521x +@item -m5249 +@item -m528x +@item -m5307 +@item -m5407 +@item -m547x +@item -m548x +@item -mcfv4 +@item -mcfv4e Assemble for the ColdFire family of chips. @item -m68881 @@ -168,6 +202,7 @@ Do not assemble 68851 MMU instructions. This is the default for the 68000, 68010, and the CPU32. The 68040 accepts a somewhat different set of MMU instructions. @end table +@end table @node M68K-Syntax @section Syntax @@ -403,28 +438,39 @@ cases that are more fully described after the table: @smallexample Displacement - +------------------------------------------------- - | 68020 68000/10 -Pseudo-Op |BYTE WORD LONG LONG non-PC relative - +------------------------------------------------- - jbsr |bsrs bsr bsrl jsr jsr - jra |bras bra bral jmp jmp -* jXX |bXXs bXX bXXl bNXs;jmpl bNXs;jmp -* dbXX |dbXX dbXX dbXX; bra; jmpl -* fjXX |fbXXw fbXXw fbXXl fbNXw;jmp + +------------------------------------------------------------ + | 68020 68000/10, not PC-relative OK +Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP ** + +------------------------------------------------------------ + jbsr |bsrs bsrw bsrl jsr + jra |bras braw bral jmp +* jXX |bXXs bXXw bXXl bNXs;jmp +* dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp + fjXX | N/A fbXXw fbXXl N/A XX: condition NX: negative of condition XX @end smallexample @center @code{*}---see full description below +@center @code{**}---this expansion mode is disallowed by @samp{--pcrel} @table @code @item jbsr @itemx jra These are the simplest jump pseudo-operations; they always map to one particular machine instruction, depending on the displacement to the -branch target. +branch target. This instruction will be a byte or word branch is that +is sufficient. Otherwise, a long branch will be emitted if available. +If no long branches are available and the @samp{--pcrel} option is not +given, an absolute long jump will be emitted instead. If no long +branches are available, the @samp{--pcrel} option is given, and a word +branch cannot reach the target, an error message is generated. + +In addition to standard branch operands, @code{@value{AS}} allows these +pseudo-operations to have all operands that are allowed for jsr and jmp, +substituting these instructions if the operand given is not valid for a +branch instruction. @item j@var{XX} Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations, @@ -435,10 +481,11 @@ list of pseudo-ops in this family is: jvs jpl jmi jge jlt jgt jle @end smallexample -For the cases of non-PC relative displacements and long displacements on -the 68000 or 68010, @code{@value{AS}} issues a longer code fragment in terms of -@var{NX}, the opposite condition to @var{XX}. For example, for the -non-PC relative case: +Usually, each of these pseudo-operations expands to a single branch +instruction. However, if a word branch is not sufficient, no long branches +are available, and the @samp{--pcrel} option is not given, @code{@value{AS}} +issues a longer code fragment in terms of @var{NX}, the opposite condition +to @var{XX}. For example, under these conditions: @smallexample j@var{XX} foo @end smallexample @@ -457,12 +504,24 @@ The full family of pseudo-operations covered here is dbf dbra dbt @end smallexample -Other than for word and byte displacements, when the source reads +Motorola @samp{db@var{XX}} instructions allow word displacements only. When +a word displacement is sufficient, each of these pseudo-operations expands +to the corresponding Motorola instruction. When a word displacement is not +sufficient and long branches are available, when the source reads @samp{db@var{XX} foo}, @code{@value{AS}} emits @smallexample db@var{XX} oo1 - bra oo2 - oo1:jmpl foo + bras oo2 + oo1:bral foo + oo2: +@end smallexample + +If, however, long branches are not available and the @samp{--pcrel} option is +not given, @code{@value{AS}} emits +@smallexample + db@var{XX} oo1 + bras oo2 + oo1:jmp foo oo2: @end smallexample @@ -476,13 +535,9 @@ This family includes fjugt fjule fjult fjun @end smallexample -For branch targets that are not PC relative, @code{@value{AS}} emits -@smallexample - fb@var{NX} oof - jmp foo - oof: -@end smallexample -when it encounters @samp{fj@var{XX} foo}. +Each of these pseudo-operations always expands to a single Motorola +coprocessor branch instruction, word or long. All Motorola coprocessor +branch instructions allow both word and long displacements. @end table