X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Faarch64-linux-nat.c;h=678c89029d405b566168642cd7d31a32086ce50a;hb=bde90be2cddc06371ee80a258bf6855d0f346324;hp=9bae9ce324c56f964daf08a588ed5a18984cff2a;hpb=5e35436ed12617494d2a2d190e0faca5613a2e9f;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index 9bae9ce324..678c89029d 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -1,6 +1,6 @@ /* Native-dependent code for GNU/Linux AArch64. - Copyright (C) 2011-2015 Free Software Foundation, Inc. + Copyright (C) 2011-2018 Free Software Foundation, Inc. Contributed by ARM Ltd. This file is part of GDB. @@ -30,7 +30,9 @@ #include "aarch64-tdep.h" #include "aarch64-linux-tdep.h" #include "aarch32-linux-nat.h" +#include "nat/aarch64-linux.h" #include "nat/aarch64-linux-hw-point.h" +#include "nat/aarch64-sve-linux-ptrace.h" #include "elf/external.h" #include "elf/common.h" @@ -48,6 +50,54 @@ #define TRAP_HWBKPT 0x0004 #endif +class aarch64_linux_nat_target final : public linux_nat_target +{ +public: + /* Add our register access methods. */ + void fetch_registers (struct regcache *, int) override; + void store_registers (struct regcache *, int) override; + + const struct target_desc *read_description () override; + + /* Add our hardware breakpoint and watchpoint implementation. */ + int can_use_hw_breakpoint (enum bptype, int, int) override; + int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override; + int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override; + int region_ok_for_hw_watchpoint (CORE_ADDR, int) override; + int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, + struct expression *) override; + int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, + struct expression *) override; + bool stopped_by_watchpoint () override; + bool stopped_data_address (CORE_ADDR *) override; + bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override; + + int can_do_single_step () override; + + /* Override the GNU/Linux inferior startup hook. */ + void post_startup_inferior (ptid_t) override; + + /* Override the GNU/Linux post attach hook. */ + void post_attach (int pid) override; + + /* These three defer to common nat/ code. */ + void low_new_thread (struct lwp_info *lp) override + { aarch64_linux_new_thread (lp); } + void low_delete_thread (struct arch_lwp_info *lp) override + { aarch64_linux_delete_thread (lp); } + void low_prepare_to_resume (struct lwp_info *lp) override + { aarch64_linux_prepare_to_resume (lp); } + + void low_new_fork (struct lwp_info *parent, pid_t child_pid) override; + void low_forget_process (pid_t pid) override; + + /* Add our siginfo layout converter. */ + bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction) + override; +}; + +static aarch64_linux_nat_target the_aarch64_linux_nat_target; + /* Per-process data. We don't bind this to a per-inferior registry because of targets like x86 GNU/Linux that need to keep track of processes that aren't bound to any inferior (e.g., fork children, @@ -89,7 +139,7 @@ aarch64_add_process (pid_t pid) { struct aarch64_process_info *proc; - proc = xcalloc (1, sizeof (*proc)); + proc = XCNEW (struct aarch64_process_info); proc->pid = pid; proc->next = aarch64_process_list; @@ -116,8 +166,8 @@ aarch64_process_info_get (pid_t pid) /* Called whenever GDB is no longer debugging process PID. It deletes data structures that keep track of debug register state. */ -static void -aarch64_forget_process (pid_t pid) +void +aarch64_linux_nat_target::low_forget_process (pid_t pid) { struct aarch64_process_info *proc, **proc_link; @@ -141,7 +191,7 @@ aarch64_forget_process (pid_t pid) /* Get debug registers state for process PID. */ -static struct aarch64_debug_reg_state * +struct aarch64_debug_reg_state * aarch64_get_debug_reg_state (pid_t pid) { return &aarch64_process_info_get (pid)->state; @@ -154,7 +204,7 @@ static void fetch_gregs_from_thread (struct regcache *regcache) { int ret, tid; - struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch *gdbarch = regcache->arch (); elf_gregset_t regs; struct iovec iovec; @@ -162,7 +212,7 @@ fetch_gregs_from_thread (struct regcache *regcache) and arm. */ gdb_static_assert (sizeof (regs) >= 18 * 4); - tid = ptid_get_lwp (inferior_ptid); + tid = regcache->ptid ().lwp (); iovec.iov_base = ®s; if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) @@ -181,7 +231,7 @@ fetch_gregs_from_thread (struct regcache *regcache) int regno; for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) - regcache_raw_supply (regcache, regno, ®s[regno - AARCH64_X0_REGNUM]); + regcache->raw_supply (regno, ®s[regno - AARCH64_X0_REGNUM]); } } @@ -194,12 +244,12 @@ store_gregs_to_thread (const struct regcache *regcache) int ret, tid; elf_gregset_t regs; struct iovec iovec; - struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch *gdbarch = regcache->arch (); /* Make sure REGS can hold all registers contents on both aarch64 and arm. */ gdb_static_assert (sizeof (regs) >= 18 * 4); - tid = ptid_get_lwp (inferior_ptid); + tid = regcache->ptid ().lwp (); iovec.iov_base = ®s; if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) @@ -218,9 +268,8 @@ store_gregs_to_thread (const struct regcache *regcache) int regno; for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) - if (REG_VALID == regcache_register_status (regcache, regno)) - regcache_raw_collect (regcache, regno, - ®s[regno - AARCH64_X0_REGNUM]); + if (REG_VALID == regcache->get_register_status (regno)) + regcache->raw_collect (regno, ®s[regno - AARCH64_X0_REGNUM]); } ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec); @@ -237,13 +286,13 @@ fetch_fpregs_from_thread (struct regcache *regcache) int ret, tid; elf_fpregset_t regs; struct iovec iovec; - struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch *gdbarch = regcache->arch (); /* Make sure REGS can hold all VFP registers contents on both aarch64 and arm. */ gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); - tid = ptid_get_lwp (inferior_ptid); + tid = regcache->ptid ().lwp (); iovec.iov_base = ®s; @@ -268,11 +317,10 @@ fetch_fpregs_from_thread (struct regcache *regcache) perror_with_name (_("Unable to fetch vFP/SIMD registers.")); for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) - regcache_raw_supply (regcache, regno, - ®s.vregs[regno - AARCH64_V0_REGNUM]); + regcache->raw_supply (regno, ®s.vregs[regno - AARCH64_V0_REGNUM]); - regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, ®s.fpsr); - regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, ®s.fpcr); + regcache->raw_supply (AARCH64_FPSR_REGNUM, ®s.fpsr); + regcache->raw_supply (AARCH64_FPCR_REGNUM, ®s.fpcr); } } @@ -285,12 +333,12 @@ store_fpregs_to_thread (const struct regcache *regcache) int ret, tid; elf_fpregset_t regs; struct iovec iovec; - struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch *gdbarch = regcache->arch (); /* Make sure REGS can hold all VFP registers contents on both aarch64 and arm. */ gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); - tid = ptid_get_lwp (inferior_ptid); + tid = regcache->ptid ().lwp (); iovec.iov_base = ®s; @@ -315,16 +363,14 @@ store_fpregs_to_thread (const struct regcache *regcache) perror_with_name (_("Unable to fetch FP/SIMD registers.")); for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) - if (REG_VALID == regcache_register_status (regcache, regno)) - regcache_raw_collect (regcache, regno, - (char *) ®s.vregs[regno - AARCH64_V0_REGNUM]); - - if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM)) - regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM, - (char *) ®s.fpsr); - if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM)) - regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM, - (char *) ®s.fpcr); + if (REG_VALID == regcache->get_register_status (regno)) + regcache->raw_collect + (regno, (char *) ®s.vregs[regno - AARCH64_V0_REGNUM]); + + if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM)) + regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) ®s.fpsr); + if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM)) + regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) ®s.fpcr); } if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) @@ -341,38 +387,86 @@ store_fpregs_to_thread (const struct regcache *regcache) } } -/* Implement the "to_fetch_register" target_ops method. */ +/* Fill GDB's register array with the sve register values + from the current thread. */ + +static void +fetch_sveregs_from_thread (struct regcache *regcache) +{ + std::unique_ptr base + = aarch64_sve_get_sveregs (regcache->ptid ().lwp ()); + aarch64_sve_regs_copy_to_reg_buf (regcache, base.get ()); +} + +/* Store to the current thread the valid sve register + values in the GDB's register array. */ static void -aarch64_linux_fetch_inferior_registers (struct target_ops *ops, - struct regcache *regcache, - int regno) +store_sveregs_to_thread (struct regcache *regcache) { + int ret; + struct iovec iovec; + int tid = regcache->ptid ().lwp (); + + /* Obtain a dump of SVE registers from ptrace. */ + std::unique_ptr base = aarch64_sve_get_sveregs (tid); + + /* Overwrite with regcache state. */ + aarch64_sve_regs_copy_from_reg_buf (regcache, base.get ()); + + /* Write back to the kernel. */ + iovec.iov_base = base.get (); + iovec.iov_len = ((struct user_sve_header *) base.get ())->size; + ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec); + + if (ret < 0) + perror_with_name (_("Unable to store sve registers")); +} + +/* Implement the "fetch_registers" target_ops method. */ + +void +aarch64_linux_nat_target::fetch_registers (struct regcache *regcache, + int regno) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ()); + if (regno == -1) { fetch_gregs_from_thread (regcache); - fetch_fpregs_from_thread (regcache); + if (tdep->has_sve ()) + fetch_sveregs_from_thread (regcache); + else + fetch_fpregs_from_thread (regcache); } else if (regno < AARCH64_V0_REGNUM) fetch_gregs_from_thread (regcache); + else if (tdep->has_sve ()) + fetch_sveregs_from_thread (regcache); else fetch_fpregs_from_thread (regcache); } -/* Implement the "to_store_register" target_ops method. */ +/* Implement the "store_registers" target_ops method. */ -static void -aarch64_linux_store_inferior_registers (struct target_ops *ops, - struct regcache *regcache, - int regno) +void +aarch64_linux_nat_target::store_registers (struct regcache *regcache, + int regno) { + struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ()); + if (regno == -1) { store_gregs_to_thread (regcache); - store_fpregs_to_thread (regcache); + if (tdep->has_sve ()) + store_sveregs_to_thread (regcache); + else + store_fpregs_to_thread (regcache); } else if (regno < AARCH64_V0_REGNUM) store_gregs_to_thread (regcache); + else if (tdep->has_sve ()) + store_sveregs_to_thread (regcache); else store_fpregs_to_thread (regcache); } @@ -425,63 +519,11 @@ supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) AARCH64_LINUX_SIZEOF_FPREGSET); } -/* Called when resuming a thread. - The hardware debug registers are updated when there is any change. */ - -static void -aarch64_linux_prepare_to_resume (struct lwp_info *lwp) -{ - struct arch_lwp_info *info = lwp->arch_private; - - /* NULL means this is the main thread still going through the shell, - or, no watchpoint has been set yet. In that case, there's - nothing to do. */ - if (info == NULL) - return; - - if (DR_HAS_CHANGED (info->dr_changed_bp) - || DR_HAS_CHANGED (info->dr_changed_wp)) - { - int tid = ptid_get_lwp (lwp->ptid); - struct aarch64_debug_reg_state *state - = aarch64_get_debug_reg_state (ptid_get_pid (lwp->ptid)); - - if (show_debug_regs) - fprintf_unfiltered (gdb_stdlog, "prepare_to_resume thread %d\n", tid); - - /* Watchpoints. */ - if (DR_HAS_CHANGED (info->dr_changed_wp)) - { - aarch64_linux_set_debug_regs (state, tid, 1); - DR_CLEAR_CHANGED (info->dr_changed_wp); - } - - /* Breakpoints. */ - if (DR_HAS_CHANGED (info->dr_changed_bp)) - { - aarch64_linux_set_debug_regs (state, tid, 0); - DR_CLEAR_CHANGED (info->dr_changed_bp); - } - } -} - -static void -aarch64_linux_new_thread (struct lwp_info *lp) -{ - struct arch_lwp_info *info = XCNEW (struct arch_lwp_info); - - /* Mark that all the hardware breakpoint/watchpoint register pairs - for this thread need to be initialized. */ - DR_MARK_ALL_CHANGED (info->dr_changed_bp, aarch64_num_bp_regs); - DR_MARK_ALL_CHANGED (info->dr_changed_wp, aarch64_num_wp_regs); - - lp->arch_private = info; -} - /* linux_nat_new_fork hook. */ -static void -aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid) +void +aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent, + pid_t child_pid) { pid_t parent_pid; struct aarch64_debug_reg_state *parent_state; @@ -498,7 +540,7 @@ aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid) new process so that all breakpoints and watchpoints can be removed together. */ - parent_pid = ptid_get_pid (parent->ptid); + parent_pid = parent->ptid.pid (); parent_state = aarch64_get_debug_reg_state (parent_pid); child_state = aarch64_get_debug_reg_state (child_pid); *child_state = *parent_state; @@ -509,90 +551,91 @@ aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid) storage (or its descriptor). */ ps_err_e -ps_get_thread_area (const struct ps_prochandle *ph, +ps_get_thread_area (struct ps_prochandle *ph, lwpid_t lwpid, int idx, void **base) { - struct iovec iovec; - uint64_t reg; - - iovec.iov_base = ® - iovec.iov_len = sizeof (reg); - - if (ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec) != 0) - return PS_ERR; + int is_64bit_p + = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64); - /* IDX is the bias from the thread pointer to the beginning of the - thread descriptor. It has to be subtracted due to implementation - quirks in libthread_db. */ - *base = (void *) (reg - idx); - - return PS_OK; + return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p); } -static void (*super_post_startup_inferior) (struct target_ops *self, - ptid_t ptid); +/* Implement the "post_startup_inferior" target_ops method. */ -/* Implement the "to_post_startup_inferior" target_ops method. */ +void +aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid) +{ + low_forget_process (ptid.pid ()); + aarch64_linux_get_debug_reg_capacity (ptid.pid ()); + linux_nat_target::post_startup_inferior (ptid); +} -static void -aarch64_linux_child_post_startup_inferior (struct target_ops *self, - ptid_t ptid) +/* Implement the "post_attach" target_ops method. */ + +void +aarch64_linux_nat_target::post_attach (int pid) { - aarch64_forget_process (ptid_get_pid (ptid)); - aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid)); - super_post_startup_inferior (self, ptid); + low_forget_process (pid); + /* Set the hardware debug register capacity. If + aarch64_linux_get_debug_reg_capacity is not called + (as it is in aarch64_linux_child_post_startup_inferior) then + software watchpoints will be used instead of hardware + watchpoints when attaching to a target. */ + aarch64_linux_get_debug_reg_capacity (pid); + linux_nat_target::post_attach (pid); } -extern struct target_desc *tdesc_arm_with_vfpv3; extern struct target_desc *tdesc_arm_with_neon; -/* Implement the "to_read_description" target_ops method. */ +/* Implement the "read_description" target_ops method. */ -static const struct target_desc * -aarch64_linux_read_description (struct target_ops *ops) +const struct target_desc * +aarch64_linux_nat_target::read_description () { - CORE_ADDR at_phent; + int ret, tid; + gdb_byte regbuf[VFP_REGS_SIZE]; + struct iovec iovec; - if (target_auxv_search (ops, AT_PHENT, &at_phent) == 1) - { - if (at_phent == sizeof (Elf64_External_Phdr)) - return tdesc_aarch64; - else - { - CORE_ADDR arm_hwcap = 0; + tid = inferior_ptid.lwp (); - if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1) - return ops->beneath->to_read_description (ops->beneath); + iovec.iov_base = regbuf; + iovec.iov_len = VFP_REGS_SIZE; -#ifndef COMPAT_HWCAP_VFP -#define COMPAT_HWCAP_VFP (1 << 6) -#endif -#ifndef COMPAT_HWCAP_NEON -#define COMPAT_HWCAP_NEON (1 << 12) -#endif -#ifndef COMPAT_HWCAP_VFPv3 -#define COMPAT_HWCAP_VFPv3 (1 << 13) -#endif + ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); + if (ret == 0) + return tdesc_arm_with_neon; + else + return aarch64_read_description (aarch64_sve_get_vq (tid)); +} - if (arm_hwcap & COMPAT_HWCAP_VFP) - { - char *buf; - const struct target_desc *result = NULL; +/* Convert a native/host siginfo object, into/from the siginfo in the + layout of the inferiors' architecture. Returns true if any + conversion was done; false otherwise. If DIRECTION is 1, then copy + from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to + INF. */ - if (arm_hwcap & COMPAT_HWCAP_NEON) - result = tdesc_arm_with_neon; - else if (arm_hwcap & COMPAT_HWCAP_VFPv3) - result = tdesc_arm_with_vfpv3; +bool +aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf, + int direction) +{ + struct gdbarch *gdbarch = get_frame_arch (get_current_frame ()); - return result; - } + /* Is the inferior 32-bit? If so, then do fixup the siginfo + object. */ + if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) + { + if (direction == 0) + aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf, + native); + else + aarch64_siginfo_from_compat_siginfo (native, + (struct compat_siginfo *) inf); - return NULL; - } + return true; } - return tdesc_aarch64; + return false; } /* Returns the number of hardware watchpoints of type TYPE that we can @@ -605,10 +648,9 @@ aarch64_linux_read_description (struct target_ops *ops) one). OTHERTYPE is non-zero if other types of watchpoints are currently enabled. */ -static int -aarch64_linux_can_use_hw_breakpoint (struct target_ops *self, - enum bptype type, - int cnt, int othertype) +int +aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type, + int cnt, int othertype) { if (type == bp_hardware_watchpoint || type == bp_read_watchpoint || type == bp_access_watchpoint || type == bp_watchpoint) @@ -636,17 +678,18 @@ aarch64_linux_can_use_hw_breakpoint (struct target_ops *self, /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address. Return 0 on success, -1 on failure. */ -static int -aarch64_linux_insert_hw_breakpoint (struct target_ops *self, - struct gdbarch *gdbarch, - struct bp_target_info *bp_tgt) +int +aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt) { int ret; CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; - const int len = 4; + int len; const enum target_hw_bp_type type = hw_execute; struct aarch64_debug_reg_state *state - = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); + = aarch64_get_debug_reg_state (inferior_ptid.pid ()); + + gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); if (show_debug_regs) fprintf_unfiltered @@ -668,17 +711,18 @@ aarch64_linux_insert_hw_breakpoint (struct target_ops *self, /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address. Return 0 on success, -1 on failure. */ -static int -aarch64_linux_remove_hw_breakpoint (struct target_ops *self, - struct gdbarch *gdbarch, - struct bp_target_info *bp_tgt) +int +aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt) { int ret; CORE_ADDR addr = bp_tgt->placed_address; - const int len = 4; + int len = 4; const enum target_hw_bp_type type = hw_execute; struct aarch64_debug_reg_state *state - = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); + = aarch64_get_debug_reg_state (inferior_ptid.pid ()); + + gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); if (show_debug_regs) fprintf_unfiltered @@ -696,21 +740,20 @@ aarch64_linux_remove_hw_breakpoint (struct target_ops *self, return ret; } -/* Implement the "to_insert_watchpoint" target_ops method. +/* Implement the "insert_watchpoint" target_ops method. Insert a watchpoint to watch a memory region which starts at address ADDR and whose length is LEN bytes. Watch memory accesses of the type TYPE. Return 0 on success, -1 on failure. */ -static int -aarch64_linux_insert_watchpoint (struct target_ops *self, - CORE_ADDR addr, int len, - enum target_hw_bp_type type, - struct expression *cond) +int +aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len, + enum target_hw_bp_type type, + struct expression *cond) { int ret; struct aarch64_debug_reg_state *state - = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); + = aarch64_get_debug_reg_state (inferior_ptid.pid ()); if (show_debug_regs) fprintf_unfiltered (gdb_stdlog, @@ -730,20 +773,19 @@ aarch64_linux_insert_watchpoint (struct target_ops *self, return ret; } -/* Implement the "to_remove_watchpoint" target_ops method. +/* Implement the "remove_watchpoint" target_ops method. Remove a watchpoint that watched the memory region which starts at address ADDR, whose length is LEN bytes, and for accesses of the type TYPE. Return 0 on success, -1 on failure. */ -static int -aarch64_linux_remove_watchpoint (struct target_ops *self, - CORE_ADDR addr, int len, - enum target_hw_bp_type type, - struct expression *cond) +int +aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len, + enum target_hw_bp_type type, + struct expression *cond) { int ret; struct aarch64_debug_reg_state *state - = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); + = aarch64_get_debug_reg_state (inferior_ptid.pid ()); if (show_debug_regs) fprintf_unfiltered (gdb_stdlog, @@ -763,105 +805,101 @@ aarch64_linux_remove_watchpoint (struct target_ops *self, return ret; } -/* Implement the "to_region_ok_for_hw_watchpoint" target_ops method. */ +/* Implement the "region_ok_for_hw_watchpoint" target_ops method. */ -static int -aarch64_linux_region_ok_for_hw_watchpoint (struct target_ops *self, - CORE_ADDR addr, int len) +int +aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len) { - CORE_ADDR aligned_addr; - - /* Can not set watchpoints for zero or negative lengths. */ - if (len <= 0) - return 0; - - /* Must have hardware watchpoint debug register(s). */ - if (aarch64_num_wp_regs == 0) - return 0; - - /* We support unaligned watchpoint address and arbitrary length, - as long as the size of the whole watched area after alignment - doesn't exceed size of the total area that all watchpoint debug - registers can watch cooperatively. - - This is a very relaxed rule, but unfortunately there are - limitations, e.g. false-positive hits, due to limited support of - hardware debug registers in the kernel. See comment above - aarch64_align_watchpoint for more information. */ - - aligned_addr = addr & ~(AARCH64_HWP_MAX_LEN_PER_REG - 1); - if (aligned_addr + aarch64_num_wp_regs * AARCH64_HWP_MAX_LEN_PER_REG - < addr + len) - return 0; - - /* All tests passed so we are likely to be able to set the watchpoint. - The reason that it is 'likely' rather than 'must' is because - we don't check the current usage of the watchpoint registers, and - there may not be enough registers available for this watchpoint. - Ideally we should check the cached debug register state, however - the checking is costly. */ - return 1; + return aarch64_linux_region_ok_for_watchpoint (addr, len); } -/* Implement the "to_stopped_data_address" target_ops method. */ +/* Implement the "stopped_data_address" target_ops method. */ -static int -aarch64_linux_stopped_data_address (struct target_ops *target, - CORE_ADDR *addr_p) +bool +aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p) { siginfo_t siginfo; - int i, tid; + int i; struct aarch64_debug_reg_state *state; if (!linux_nat_get_siginfo (inferior_ptid, &siginfo)) - return 0; + return false; /* This must be a hardware breakpoint. */ if (siginfo.si_signo != SIGTRAP || (siginfo.si_code & 0xffff) != TRAP_HWBKPT) - return 0; + return false; /* Check if the address matches any watched address. */ - state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); + state = aarch64_get_debug_reg_state (inferior_ptid.pid ()); for (i = aarch64_num_wp_regs - 1; i >= 0; --i) { + const unsigned int offset + = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]); const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]); const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr; - const CORE_ADDR addr_watch = state->dr_addr_wp[i]; + const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset; + const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8); + const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i]; if (state->dr_ref_count_wp[i] && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i]) - && addr_trap >= addr_watch + && addr_trap >= addr_watch_aligned && addr_trap < addr_watch + len) { - *addr_p = addr_trap; - return 1; + /* ADDR_TRAP reports the first address of the memory range + accessed by the CPU, regardless of what was the memory + range watched. Thus, a large CPU access that straddles + the ADDR_WATCH..ADDR_WATCH+LEN range may result in an + ADDR_TRAP that is lower than the + ADDR_WATCH..ADDR_WATCH+LEN range. E.g.: + + addr: | 4 | 5 | 6 | 7 | 8 | + |---- range watched ----| + |----------- range accessed ------------| + + In this case, ADDR_TRAP will be 4. + + To match a watchpoint known to GDB core, we must never + report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN + range. ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false + positive on kernels older than 4.10. See PR + external/20207. */ + *addr_p = addr_orig; + return true; } } - return 0; + return false; } -/* Implement the "to_stopped_by_watchpoint" target_ops method. */ +/* Implement the "stopped_by_watchpoint" target_ops method. */ -static int -aarch64_linux_stopped_by_watchpoint (struct target_ops *ops) +bool +aarch64_linux_nat_target::stopped_by_watchpoint () { CORE_ADDR addr; - return aarch64_linux_stopped_data_address (ops, &addr); + return stopped_data_address (&addr); } -/* Implement the "to_watchpoint_addr_within_range" target_ops method. */ +/* Implement the "watchpoint_addr_within_range" target_ops method. */ -static int -aarch64_linux_watchpoint_addr_within_range (struct target_ops *target, - CORE_ADDR addr, - CORE_ADDR start, int length) +bool +aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr, + CORE_ADDR start, int length) { return start <= addr && start + length - 1 >= addr; } +/* Implement the "can_do_single_step" target_ops method. */ + +int +aarch64_linux_nat_target::can_do_single_step () +{ + return 1; +} + /* Define AArch64 maintenance commands. */ static void @@ -883,45 +921,12 @@ triggers a breakpoint or watchpoint."), &maintenance_show_cmdlist); } -/* -Wmissing-prototypes. */ -void _initialize_aarch64_linux_nat (void); - void _initialize_aarch64_linux_nat (void) { - struct target_ops *t; - - /* Fill in the generic GNU/Linux methods. */ - t = linux_target (); - add_show_debug_regs_command (); - /* Add our register access methods. */ - t->to_fetch_registers = aarch64_linux_fetch_inferior_registers; - t->to_store_registers = aarch64_linux_store_inferior_registers; - - t->to_read_description = aarch64_linux_read_description; - - t->to_can_use_hw_breakpoint = aarch64_linux_can_use_hw_breakpoint; - t->to_insert_hw_breakpoint = aarch64_linux_insert_hw_breakpoint; - t->to_remove_hw_breakpoint = aarch64_linux_remove_hw_breakpoint; - t->to_region_ok_for_hw_watchpoint = - aarch64_linux_region_ok_for_hw_watchpoint; - t->to_insert_watchpoint = aarch64_linux_insert_watchpoint; - t->to_remove_watchpoint = aarch64_linux_remove_watchpoint; - t->to_stopped_by_watchpoint = aarch64_linux_stopped_by_watchpoint; - t->to_stopped_data_address = aarch64_linux_stopped_data_address; - t->to_watchpoint_addr_within_range = - aarch64_linux_watchpoint_addr_within_range; - - /* Override the GNU/Linux inferior startup hook. */ - super_post_startup_inferior = t->to_post_startup_inferior; - t->to_post_startup_inferior = aarch64_linux_child_post_startup_inferior; - /* Register the target. */ - linux_nat_add_target (t); - linux_nat_set_new_thread (t, aarch64_linux_new_thread); - linux_nat_set_new_fork (t, aarch64_linux_new_fork); - linux_nat_set_forget_process (t, aarch64_forget_process); - linux_nat_set_prepare_to_resume (t, aarch64_linux_prepare_to_resume); + linux_target = &the_aarch64_linux_nat_target; + add_inf_child_target (&the_aarch64_linux_nat_target); }