X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Faarch64-linux-nat.c;h=b385b5866c0d718f569066b5a473373ef40ae30b;hb=202e762b322444344827acbf98162fcb2910e0dd;hp=8ca96143013e499cbbfe3eafce9a0b5785884f65;hpb=48574d91bf1289074f2c88b1f83aa3cd37d524d9;p=deliverable%2Fbinutils-gdb.git

diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index 8ca9614301..b385b5866c 100644
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -1,6 +1,6 @@
 /* Native-dependent code for GNU/Linux AArch64.
 
-   Copyright (C) 2011-2019 Free Software Foundation, Inc.
+   Copyright (C) 2011-2020 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of GDB.
@@ -30,6 +30,8 @@
 #include "aarch64-tdep.h"
 #include "aarch64-linux-tdep.h"
 #include "aarch32-linux-nat.h"
+#include "aarch32-tdep.h"
+#include "arch/arm.h"
 #include "nat/aarch64-linux.h"
 #include "nat/aarch64-linux-hw-point.h"
 #include "nat/aarch64-sve-linux-ptrace.h"
@@ -294,7 +296,7 @@ fetch_fpregs_from_thread (struct regcache *regcache)
 
   /* Make sure REGS can hold all VFP registers contents on both aarch64
      and arm.  */
-  gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
+  gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
 
   tid = regcache->ptid ().lwp ();
 
@@ -302,7 +304,7 @@ fetch_fpregs_from_thread (struct regcache *regcache)
 
   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
     {
-      iovec.iov_len = VFP_REGS_SIZE;
+      iovec.iov_len = ARM_VFP3_REGS_SIZE;
 
       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
       if (ret < 0)
@@ -341,14 +343,14 @@ store_fpregs_to_thread (const struct regcache *regcache)
 
   /* Make sure REGS can hold all VFP registers contents on both aarch64
      and arm.  */
-  gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
+  gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
   tid = regcache->ptid ().lwp ();
 
   iovec.iov_base = &regs;
 
   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
     {
-      iovec.iov_len = VFP_REGS_SIZE;
+      iovec.iov_len = ARM_VFP3_REGS_SIZE;
 
       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
       if (ret < 0)
@@ -630,25 +632,23 @@ aarch64_linux_nat_target::post_attach (int pid)
   linux_nat_target::post_attach (pid);
 }
 
-extern struct target_desc *tdesc_arm_with_neon;
-
 /* Implement the "read_description" target_ops method.  */
 
 const struct target_desc *
 aarch64_linux_nat_target::read_description ()
 {
   int ret, tid;
-  gdb_byte regbuf[VFP_REGS_SIZE];
+  gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
   struct iovec iovec;
 
   tid = inferior_ptid.lwp ();
 
   iovec.iov_base = regbuf;
-  iovec.iov_len = VFP_REGS_SIZE;
+  iovec.iov_len = ARM_VFP3_REGS_SIZE;
 
   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
   if (ret == 0)
-    return tdesc_arm_with_neon;
+    return aarch32_read_description ();
 
   CORE_ADDR hwcap = linux_get_hwcap (this);
 
@@ -959,7 +959,7 @@ aarch64_linux_nat_target::thread_architecture (ptid_t ptid)
 
   /* Find the current gdbarch the same way as process_stratum_target.  Only
      return it if the current vector length matches the one in the tdep.  */
-  inferior *inf = find_inferior_ptid (ptid);
+  inferior *inf = find_inferior_ptid (this, ptid);
   gdb_assert (inf != NULL);
   if (vq == gdbarch_tdep (inf->gdbarch)->vq)
     return inf->gdbarch;
@@ -970,7 +970,7 @@ aarch64_linux_nat_target::thread_architecture (ptid_t ptid)
      unavailable, to distinguish from an unset value of 0.  */
   struct gdbarch_info info;
   gdbarch_info_init (&info);
-  info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
+  info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64);
   info.id = (int *) (vq == 0 ? -1 : vq);
   return gdbarch_find_by_info (info);
 }