X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Faarch64-tdep.h;h=e4b045b599966adf91a375fa1c4d880ce14e3457;hb=228c8f4be0c428369ec6b68e25696863d1e62ed7;hp=c9fd7b357839135c5ca939bd6b9d85703b1adc0a;hpb=95228a0d790f16deae3436e18f41b70fc711a5b2;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h index c9fd7b3578..e4b045b599 100644 --- a/gdb/aarch64-tdep.h +++ b/gdb/aarch64-tdep.h @@ -1,6 +1,6 @@ /* Common target dependent code for GDB on AArch64 systems. - Copyright (C) 2009-2018 Free Software Foundation, Inc. + Copyright (C) 2009-2019 Free Software Foundation, Inc. Contributed by ARM Ltd. This file is part of GDB. @@ -31,7 +31,14 @@ struct regset; /* AArch64 Dwarf register numbering. */ #define AARCH64_DWARF_X0 0 #define AARCH64_DWARF_SP 31 +#define AARCH64_DWARF_PAUTH_RA_STATE 34 +#define AARCH64_DWARF_PAUTH_DMASK 35 +#define AARCH64_DWARF_PAUTH_CMASK 36 #define AARCH64_DWARF_V0 64 +#define AARCH64_DWARF_SVE_VG 46 +#define AARCH64_DWARF_SVE_FFR 47 +#define AARCH64_DWARF_SVE_P0 48 +#define AARCH64_DWARF_SVE_Z0 96 /* Size of integer registers. */ #define X_REGISTER_SIZE 8 @@ -49,7 +56,7 @@ struct regset; /* The maximum number of modified instructions generated for one single-stepped instruction. */ -#define DISPLACED_MODIFIED_INSNS 1 +#define AARCH64_DISPLACED_MODIFIED_INSNS 1 /* Target-dependent structure in gdbarch. */ struct gdbarch_tdep @@ -70,12 +77,31 @@ struct gdbarch_tdep struct type *vns_type; struct type *vnh_type; struct type *vnb_type; + struct type *vnv_type; /* syscall record. */ int (*aarch64_syscall_record) (struct regcache *regcache, unsigned long svc_number); + + /* The VQ value for SVE targets, or zero if SVE is not supported. */ + uint64_t vq; + + /* Returns true if the target supports SVE. */ + bool has_sve () const + { + return vq != 0; + } + + int pauth_reg_base; + int pauth_ra_state_regnum; + + /* Returns true if the target supports pauth. */ + bool has_pauth () const + { + return pauth_reg_base != -1; + } }; -const target_desc *aarch64_read_description (long vq); +const target_desc *aarch64_read_description (uint64_t vq, bool pauth_p); extern int aarch64_process_record (struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr);