X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Famd64-tdep.h;h=495d20922a67538961582deae49c4a5002aa6f88;hb=8833fbf05c5b93fb3ccf666d5a3bd0e51e75d1bd;hp=fa30648265ef8b928c732442c0edeb446ccddf53;hpb=03b62bbbce3dc5f15131d9e78f77d035cd1cffb3;p=deliverable%2Fbinutils-gdb.git

diff --git a/gdb/amd64-tdep.h b/gdb/amd64-tdep.h
index fa30648265..495d20922a 100644
--- a/gdb/amd64-tdep.h
+++ b/gdb/amd64-tdep.h
@@ -1,6 +1,6 @@
 /* Target-dependent definitions for AMD64.
 
-   Copyright (C) 2001-2016 Free Software Foundation, Inc.
+   Copyright (C) 2001-2019 Free Software Foundation, Inc.
    Contributed by Jiri Smid, SuSE Labs.
 
    This file is part of GDB.
@@ -76,15 +76,16 @@ enum amd64_regnum
   AMD64_K0_REGNUM,
   AMD64_K7_REGNUM = AMD64_K0_REGNUM + 7,
   AMD64_ZMM0H_REGNUM,
-  AMD64_ZMM31H_REGNUM = AMD64_ZMM0H_REGNUM + 31
+  AMD64_ZMM31H_REGNUM = AMD64_ZMM0H_REGNUM + 31,
+  AMD64_PKRU_REGNUM,
+  AMD64_FSBASE_REGNUM,
+  AMD64_GSBASE_REGNUM
 };
 
 /* Number of general purpose registers.  */
 #define AMD64_NUM_GREGS		24
 
-#define AMD64_NUM_REGS		(AMD64_ZMM31H_REGNUM + 1)
-
-extern struct target_desc *tdesc_amd64;
+#define AMD64_NUM_REGS		(AMD64_GSBASE_REGNUM + 1)
 
 extern struct displaced_step_closure *amd64_displaced_step_copy_insn
   (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
@@ -94,10 +95,19 @@ extern void amd64_displaced_step_fixup (struct gdbarch *gdbarch,
 					CORE_ADDR from, CORE_ADDR to,
 					struct regcache *regs);
 
-extern void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch);
+/* Initialize the ABI for amd64.  Uses DEFAULT_TDESC as fallback
+   tdesc, if INFO does not specify one.  */
+extern void amd64_init_abi (struct gdbarch_info info,
+			    struct gdbarch *gdbarch,
+			    const target_desc *default_tdesc);
+
+/* Initialize the ABI for x32.  Uses DEFAULT_TDESC as fallback tdesc,
+   if INFO does not specify one.  */
 extern void amd64_x32_init_abi (struct gdbarch_info info,
-				struct gdbarch *gdbarch);
-extern const struct target_desc *amd64_target_description (uint64_t xcr0);
+				struct gdbarch *gdbarch,
+				const target_desc *default_tdesc);
+extern const struct target_desc *amd64_target_description (uint64_t xcr0,
+							   bool segments);
 
 /* Fill register REGNUM in REGCACHE with the appropriate
    floating-point or SSE register value from *FXSAVE.  If REGNUM is