X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Famd64-tdep.h;h=c218a50e1e8c4c442480ce28647de2cccd8b445d;hb=refs%2Fheads%2Fconcurrent-displaced-stepping-2020-04-01;hp=87f0ba307383feb561dff5bb85ec00db0580e9c4;hpb=51547df62c155231530ca502c485659f3d2b66cb;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/amd64-tdep.h b/gdb/amd64-tdep.h index 87f0ba3073..c218a50e1e 100644 --- a/gdb/amd64-tdep.h +++ b/gdb/amd64-tdep.h @@ -1,6 +1,6 @@ /* Target-dependent definitions for AMD64. - Copyright (C) 2001-2017 Free Software Foundation, Inc. + Copyright (C) 2001-2020 Free Software Foundation, Inc. Contributed by Jiri Smid, SuSE Labs. This file is part of GDB. @@ -26,6 +26,7 @@ struct frame_info; struct regcache; #include "i386-tdep.h" +#include "infrun.h" /* Register numbers of various important registers. */ @@ -87,20 +88,27 @@ enum amd64_regnum #define AMD64_NUM_REGS (AMD64_GSBASE_REGNUM + 1) -extern struct target_desc *tdesc_amd64; - -extern struct displaced_step_closure *amd64_displaced_step_copy_insn +extern displaced_step_copy_insn_closure_up amd64_displaced_step_copy_insn (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to, struct regcache *regs); extern void amd64_displaced_step_fixup (struct gdbarch *gdbarch, - struct displaced_step_closure *closure, + struct displaced_step_copy_insn_closure *closure, CORE_ADDR from, CORE_ADDR to, struct regcache *regs); -extern void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch); +/* Initialize the ABI for amd64. Uses DEFAULT_TDESC as fallback + tdesc, if INFO does not specify one. */ +extern void amd64_init_abi (struct gdbarch_info info, + struct gdbarch *gdbarch, + const target_desc *default_tdesc); + +/* Initialize the ABI for x32. Uses DEFAULT_TDESC as fallback tdesc, + if INFO does not specify one. */ extern void amd64_x32_init_abi (struct gdbarch_info info, - struct gdbarch *gdbarch); -extern const struct target_desc *amd64_target_description (uint64_t xcr0); + struct gdbarch *gdbarch, + const target_desc *default_tdesc); +extern const struct target_desc *amd64_target_description (uint64_t xcr0, + bool segments); /* Fill register REGNUM in REGCACHE with the appropriate floating-point or SSE register value from *FXSAVE. If REGNUM is