X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Farm-linux-nat.c;h=30030b4eb06019b05a2adc8cf0297139f80c9816;hb=58ed5c38f52511e73c9748b86c319320177fb0ca;hp=4d3249167f224d67b23db6d05c36c0da78d0e08d;hpb=c6b92abd3df567ae24c1806d4d398b921b14306a;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/arm-linux-nat.c b/gdb/arm-linux-nat.c index 4d3249167f..30030b4eb0 100644 --- a/gdb/arm-linux-nat.c +++ b/gdb/arm-linux-nat.c @@ -1,11 +1,11 @@ /* GNU/Linux on ARM native support. - Copyright 1999, 2000, 2001 Free Software Foundation, Inc. + Copyright (C) 1999-2018 Free Software Foundation, Inc. This file is part of GDB. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or + the Free Software Foundation; either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, @@ -14,512 +14,403 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, - Boston, MA 02111-1307, USA. */ + along with this program. If not, see . */ #include "defs.h" #include "inferior.h" #include "gdbcore.h" -#include "gdb_string.h" #include "regcache.h" - +#include "target.h" +#include "linux-nat.h" +#include "target-descriptions.h" +#include "auxv.h" +#include "observable.h" +#include "gdbthread.h" + +#include "arm-tdep.h" +#include "arm-linux-tdep.h" +#include "aarch32-linux-nat.h" + +#include #include -#include +#include "nat/gdb_ptrace.h" #include #include -/* Prototypes for supply_gregset etc. */ -#include "gregset.h" +#include "nat/linux-ptrace.h" -extern int arm_apcs_32; +/* Prototypes for supply_gregset etc. */ +#include "gregset.h" -#define typeNone 0x00 -#define typeSingle 0x01 -#define typeDouble 0x02 -#define typeExtended 0x03 -#define FPWORDS 28 -#define CPSR_REGNUM 16 - -typedef union tagFPREG - { - unsigned int fSingle; - unsigned int fDouble[2]; - unsigned int fExtended[3]; - } -FPREG; - -typedef struct tagFPA11 - { - FPREG fpreg[8]; /* 8 floating point registers */ - unsigned int fpsr; /* floating point status register */ - unsigned int fpcr; /* floating point control register */ - unsigned char fType[8]; /* type of floating point value held in - floating point registers. */ - int initflag; /* NWFPE initialization flag. */ - } -FPA11; - -/* The following variables are used to determine the version of the - underlying Linux operating system. Examples: - - Linux 2.0.35 Linux 2.2.12 - os_version = 0x00020023 os_version = 0x0002020c - os_major = 2 os_major = 2 - os_minor = 0 os_minor = 2 - os_release = 35 os_release = 12 - - Note: os_version = (os_major << 16) | (os_minor << 8) | os_release - - These are initialized using get_linux_version() from - _initialize_arm_linux_nat(). */ - -static unsigned int os_version, os_major, os_minor, os_release; - -/* On Linux, threads are implemented as pseudo-processes, in which - case we may be tracing more than one process at a time. In that - case, inferior_ptid will contain the main process ID and the - individual thread (process) ID. get_thread_id () is used to - get the thread id if it's available, and the process id otherwise. */ +/* Defines ps_err_e, struct ps_prochandle. */ +#include "gdb_proc_service.h" -int -get_thread_id (ptid_t ptid) -{ - int tid = TIDGET (ptid); - if (0 == tid) - tid = PIDGET (ptid); - return tid; -} -#define GET_THREAD_ID(PTID) get_thread_id ((PTID)); +#ifndef PTRACE_GET_THREAD_AREA +#define PTRACE_GET_THREAD_AREA 22 +#endif -static void -fetch_nwfpe_single (unsigned int fn, FPA11 * fpa11) -{ - unsigned int mem[3]; +#ifndef PTRACE_GETWMMXREGS +#define PTRACE_GETWMMXREGS 18 +#define PTRACE_SETWMMXREGS 19 +#endif - mem[0] = fpa11->fpreg[fn].fSingle; - mem[1] = 0; - mem[2] = 0; - supply_register (F0_REGNUM + fn, (char *) &mem[0]); -} +#ifndef PTRACE_GETVFPREGS +#define PTRACE_GETVFPREGS 27 +#define PTRACE_SETVFPREGS 28 +#endif -static void -fetch_nwfpe_double (unsigned int fn, FPA11 * fpa11) -{ - unsigned int mem[3]; +#ifndef PTRACE_GETHBPREGS +#define PTRACE_GETHBPREGS 29 +#define PTRACE_SETHBPREGS 30 +#endif - mem[0] = fpa11->fpreg[fn].fDouble[1]; - mem[1] = fpa11->fpreg[fn].fDouble[0]; - mem[2] = 0; - supply_register (F0_REGNUM + fn, (char *) &mem[0]); -} +extern int arm_apcs_32; -static void -fetch_nwfpe_none (unsigned int fn) +class arm_linux_nat_target final : public linux_nat_target { - unsigned int mem[3] = - {0, 0, 0}; +public: + /* Add our register access methods. */ + void fetch_registers (struct regcache *, int) override; + void store_registers (struct regcache *, int) override; - supply_register (F0_REGNUM + fn, (char *) &mem[0]); -} + /* Add our hardware breakpoint and watchpoint implementation. */ + int can_use_hw_breakpoint (enum bptype, int, int) override; -static void -fetch_nwfpe_extended (unsigned int fn, FPA11 * fpa11) -{ - unsigned int mem[3]; + int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override; - mem[0] = fpa11->fpreg[fn].fExtended[0]; /* sign & exponent */ - mem[1] = fpa11->fpreg[fn].fExtended[2]; /* ls bits */ - mem[2] = fpa11->fpreg[fn].fExtended[1]; /* ms bits */ - supply_register (F0_REGNUM + fn, (char *) &mem[0]); -} + int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override; -static void -fetch_nwfpe_register (int regno, FPA11 * fpa11) -{ - int fn = regno - F0_REGNUM; + int region_ok_for_hw_watchpoint (CORE_ADDR, int) override; - switch (fpa11->fType[fn]) - { - case typeSingle: - fetch_nwfpe_single (fn, fpa11); - break; + int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, + struct expression *) override; - case typeDouble: - fetch_nwfpe_double (fn, fpa11); - break; + int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, + struct expression *) override; + bool stopped_by_watchpoint () override; - case typeExtended: - fetch_nwfpe_extended (fn, fpa11); - break; + bool stopped_data_address (CORE_ADDR *) override; - default: - fetch_nwfpe_none (fn); - } -} + bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override; -static void -store_nwfpe_single (unsigned int fn, FPA11 * fpa11) -{ - unsigned int mem[3]; + const struct target_desc *read_description () override; - read_register_gen (F0_REGNUM + fn, (char *) &mem[0]); - fpa11->fpreg[fn].fSingle = mem[0]; - fpa11->fType[fn] = typeSingle; -} + /* Override linux_nat_target low methods. */ -static void -store_nwfpe_double (unsigned int fn, FPA11 * fpa11) -{ - unsigned int mem[3]; + /* Handle thread creation and exit. */ + void low_new_thread (struct lwp_info *lp) override; + void low_delete_thread (struct arch_lwp_info *lp) override; + void low_prepare_to_resume (struct lwp_info *lp) override; - read_register_gen (F0_REGNUM + fn, (char *) &mem[0]); - fpa11->fpreg[fn].fDouble[1] = mem[0]; - fpa11->fpreg[fn].fDouble[0] = mem[1]; - fpa11->fType[fn] = typeDouble; -} + /* Handle process creation and exit. */ + void low_new_fork (struct lwp_info *parent, pid_t child_pid) override; + void low_forget_process (pid_t pid) override; +}; -void -store_nwfpe_extended (unsigned int fn, FPA11 * fpa11) -{ - unsigned int mem[3]; +static arm_linux_nat_target the_arm_linux_nat_target; - read_register_gen (F0_REGNUM + fn, (char *) &mem[0]); - fpa11->fpreg[fn].fExtended[0] = mem[0]; /* sign & exponent */ - fpa11->fpreg[fn].fExtended[2] = mem[1]; /* ls bits */ - fpa11->fpreg[fn].fExtended[1] = mem[2]; /* ms bits */ - fpa11->fType[fn] = typeDouble; -} - -void -store_nwfpe_register (int regno, FPA11 * fpa11) -{ - if (register_cached (regno)) - { - unsigned int fn = regno - F0_REGNUM; - switch (fpa11->fType[fn]) - { - case typeSingle: - store_nwfpe_single (fn, fpa11); - break; - - case typeDouble: - store_nwfpe_double (fn, fpa11); - break; - - case typeExtended: - store_nwfpe_extended (fn, fpa11); - break; - } - } -} - - -/* Get the value of a particular register from the floating point - state of the process and store it into regcache. */ +/* Get the whole floating point state of the process and store it + into regcache. */ static void -fetch_fpregister (int regno) +fetch_fpregs (struct regcache *regcache) { - int ret, tid; - FPA11 fp; - + int ret, regno, tid; + gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE]; + /* Get the thread id for the ptrace call. */ - tid = GET_THREAD_ID (inferior_ptid); + tid = ptid_get_lwp (regcache_get_ptid (regcache)); /* Read the floating point state. */ - ret = ptrace (PT_GETFPREGS, tid, 0, &fp); - if (ret < 0) + if (have_ptrace_getregset == TRIBOOL_TRUE) { - warning ("Unable to fetch floating point register."); - return; - } + struct iovec iov; - /* Fetch fpsr. */ - if (FPS_REGNUM == regno) - supply_register (FPS_REGNUM, (char *) &fp.fpsr); + iov.iov_base = &fp; + iov.iov_len = ARM_LINUX_SIZEOF_NWFPE; - /* Fetch the floating point register. */ - if (regno >= F0_REGNUM && regno <= F7_REGNUM) - { - int fn = regno - F0_REGNUM; - - switch (fp.fType[fn]) - { - case typeSingle: - fetch_nwfpe_single (fn, &fp); - break; + ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov); + } + else + ret = ptrace (PT_GETFPREGS, tid, 0, fp); - case typeDouble: - fetch_nwfpe_double (fn, &fp); - break; + if (ret < 0) + perror_with_name (_("Unable to fetch the floating point registers.")); - case typeExtended: - fetch_nwfpe_extended (fn, &fp); - break; + /* Fetch fpsr. */ + regcache_raw_supply (regcache, ARM_FPS_REGNUM, + fp + NWFPE_FPSR_OFFSET); - default: - fetch_nwfpe_none (fn); - } - } + /* Fetch the floating point registers. */ + for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) + supply_nwfpe_register (regcache, regno, fp); } -/* Get the whole floating point state of the process and store it - into regcache. */ +/* Save the whole floating point state of the process using + the contents from regcache. */ static void -fetch_fpregs (void) +store_fpregs (const struct regcache *regcache) { int ret, regno, tid; - FPA11 fp; + gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE]; /* Get the thread id for the ptrace call. */ - tid = GET_THREAD_ID (inferior_ptid); - + tid = ptid_get_lwp (regcache_get_ptid (regcache)); + /* Read the floating point state. */ - ret = ptrace (PT_GETFPREGS, tid, 0, &fp); - if (ret < 0) + if (have_ptrace_getregset == TRIBOOL_TRUE) { - warning ("Unable to fetch the floating point registers."); - return; + elf_fpregset_t fpregs; + struct iovec iov; + + iov.iov_base = &fpregs; + iov.iov_len = sizeof (fpregs); + + ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov); } + else + ret = ptrace (PT_GETFPREGS, tid, 0, fp); - /* Fetch fpsr. */ - supply_register (FPS_REGNUM, (char *) &fp.fpsr); + if (ret < 0) + perror_with_name (_("Unable to fetch the floating point registers.")); - /* Fetch the floating point registers. */ - for (regno = F0_REGNUM; regno <= F7_REGNUM; regno++) - { - int fn = regno - F0_REGNUM; + /* Store fpsr. */ + if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM)) + regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET); - switch (fp.fType[fn]) - { - case typeSingle: - fetch_nwfpe_single (fn, &fp); - break; + /* Store the floating point registers. */ + for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) + if (REG_VALID == regcache_register_status (regcache, regno)) + collect_nwfpe_register (regcache, regno, fp); - case typeDouble: - fetch_nwfpe_double (fn, &fp); - break; + if (have_ptrace_getregset == TRIBOOL_TRUE) + { + struct iovec iov; - case typeExtended: - fetch_nwfpe_extended (fn, &fp); - break; + iov.iov_base = &fp; + iov.iov_len = ARM_LINUX_SIZEOF_NWFPE; - default: - fetch_nwfpe_none (fn); - } + ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov); } + else + ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp); + + if (ret < 0) + perror_with_name (_("Unable to store floating point registers.")); } -/* Save a particular register into the floating point state of the - process using the contents from regcache. */ +/* Fetch all general registers of the process and store into + regcache. */ static void -store_fpregister (int regno) +fetch_regs (struct regcache *regcache) { - int ret, tid; - FPA11 fp; + int ret, regno, tid; + elf_gregset_t regs; /* Get the thread id for the ptrace call. */ - tid = GET_THREAD_ID (inferior_ptid); - - /* Read the floating point state. */ - ret = ptrace (PT_GETFPREGS, tid, 0, &fp); - if (ret < 0) + tid = ptid_get_lwp (regcache_get_ptid (regcache)); + + if (have_ptrace_getregset == TRIBOOL_TRUE) { - warning ("Unable to fetch the floating point registers."); - return; - } + struct iovec iov; - /* Store fpsr. */ - if (FPS_REGNUM == regno && register_cached (FPS_REGNUM)) - read_register_gen (FPS_REGNUM, (char *) &fp.fpsr); + iov.iov_base = ®s; + iov.iov_len = sizeof (regs); - /* Store the floating point register. */ - if (regno >= F0_REGNUM && regno <= F7_REGNUM) - { - store_nwfpe_register (regno, &fp); + ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov); } + else + ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); - ret = ptrace (PTRACE_SETFPREGS, tid, 0, &fp); if (ret < 0) - { - warning ("Unable to store floating point register."); - return; - } -} + perror_with_name (_("Unable to fetch general registers.")); -/* Save the whole floating point state of the process using - the contents from regcache. */ + aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32); +} static void -store_fpregs (void) +store_regs (const struct regcache *regcache) { int ret, regno, tid; - FPA11 fp; + elf_gregset_t regs; /* Get the thread id for the ptrace call. */ - tid = GET_THREAD_ID (inferior_ptid); - - /* Read the floating point state. */ - ret = ptrace (PT_GETFPREGS, tid, 0, &fp); - if (ret < 0) + tid = ptid_get_lwp (regcache_get_ptid (regcache)); + + /* Fetch the general registers. */ + if (have_ptrace_getregset == TRIBOOL_TRUE) { - warning ("Unable to fetch the floating point registers."); - return; - } + struct iovec iov; - /* Store fpsr. */ - if (register_cached (FPS_REGNUM)) - read_register_gen (FPS_REGNUM, (char *) &fp.fpsr); + iov.iov_base = ®s; + iov.iov_len = sizeof (regs); - /* Store the floating point registers. */ - for (regno = F0_REGNUM; regno <= F7_REGNUM; regno++) - { - fetch_nwfpe_register (regno, &fp); + ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov); } + else + ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); - ret = ptrace (PTRACE_SETFPREGS, tid, 0, &fp); if (ret < 0) + perror_with_name (_("Unable to fetch general registers.")); + + aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32); + + if (have_ptrace_getregset == TRIBOOL_TRUE) { - warning ("Unable to store floating point registers."); - return; + struct iovec iov; + + iov.iov_base = ®s; + iov.iov_len = sizeof (regs); + + ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov); } + else + ret = ptrace (PTRACE_SETREGS, tid, 0, ®s); + + if (ret < 0) + perror_with_name (_("Unable to store general registers.")); } -/* Fetch a general register of the process and store into +/* Fetch all WMMX registers of the process and store into regcache. */ +#define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4) + static void -fetch_register (int regno) +fetch_wmmx_regs (struct regcache *regcache) { - int ret, tid; - elf_gregset_t regs; + char regbuf[IWMMXT_REGS_SIZE]; + int ret, regno, tid; /* Get the thread id for the ptrace call. */ - tid = GET_THREAD_ID (inferior_ptid); - - ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); + tid = ptid_get_lwp (regcache_get_ptid (regcache)); + + ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf); if (ret < 0) - { - warning ("Unable to fetch general register."); - return; - } + perror_with_name (_("Unable to fetch WMMX registers.")); - if (regno >= A1_REGNUM && regno < PC_REGNUM) - supply_register (regno, (char *) ®s[regno]); + for (regno = 0; regno < 16; regno++) + regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM, + ®buf[regno * 8]); - if (PS_REGNUM == regno) - { - if (arm_apcs_32) - supply_register (PS_REGNUM, (char *) ®s[CPSR_REGNUM]); - else - supply_register (PS_REGNUM, (char *) ®s[PC_REGNUM]); - } - - if (PC_REGNUM == regno) - { - regs[PC_REGNUM] = ADDR_BITS_REMOVE (regs[PC_REGNUM]); - supply_register (PC_REGNUM, (char *) ®s[PC_REGNUM]); - } -} + for (regno = 0; regno < 2; regno++) + regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM, + ®buf[16 * 8 + regno * 4]); -/* Fetch all general registers of the process and store into - regcache. */ + for (regno = 0; regno < 4; regno++) + regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM, + ®buf[16 * 8 + 2 * 4 + regno * 4]); +} static void -fetch_regs (void) +store_wmmx_regs (const struct regcache *regcache) { + char regbuf[IWMMXT_REGS_SIZE]; int ret, regno, tid; - elf_gregset_t regs; /* Get the thread id for the ptrace call. */ - tid = GET_THREAD_ID (inferior_ptid); - - ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); + tid = ptid_get_lwp (regcache_get_ptid (regcache)); + + ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf); if (ret < 0) - { - warning ("Unable to fetch general registers."); - return; - } + perror_with_name (_("Unable to fetch WMMX registers.")); - for (regno = A1_REGNUM; regno < PC_REGNUM; regno++) - supply_register (regno, (char *) ®s[regno]); + for (regno = 0; regno < 16; regno++) + if (REG_VALID == regcache_register_status (regcache, + regno + ARM_WR0_REGNUM)) + regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM, + ®buf[regno * 8]); - if (arm_apcs_32) - supply_register (PS_REGNUM, (char *) ®s[CPSR_REGNUM]); - else - supply_register (PS_REGNUM, (char *) ®s[PC_REGNUM]); + for (regno = 0; regno < 2; regno++) + if (REG_VALID == regcache_register_status (regcache, + regno + ARM_WCSSF_REGNUM)) + regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM, + ®buf[16 * 8 + regno * 4]); - regs[PC_REGNUM] = ADDR_BITS_REMOVE (regs[PC_REGNUM]); - supply_register (PC_REGNUM, (char *) ®s[PC_REGNUM]); -} + for (regno = 0; regno < 4; regno++) + if (REG_VALID == regcache_register_status (regcache, + regno + ARM_WCGR0_REGNUM)) + regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM, + ®buf[16 * 8 + 2 * 4 + regno * 4]); -/* Store all general registers of the process from the values in - regcache. */ + ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf); + + if (ret < 0) + perror_with_name (_("Unable to store WMMX registers.")); +} static void -store_register (int regno) +fetch_vfp_regs (struct regcache *regcache) { - int ret, tid; - elf_gregset_t regs; - - if (!register_cached (regno)) - return; + gdb_byte regbuf[VFP_REGS_SIZE]; + int ret, regno, tid; + struct gdbarch *gdbarch = regcache->arch (); + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); /* Get the thread id for the ptrace call. */ - tid = GET_THREAD_ID (inferior_ptid); - - /* Get the general registers from the process. */ - ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); - if (ret < 0) + tid = ptid_get_lwp (regcache_get_ptid (regcache)); + + if (have_ptrace_getregset == TRIBOOL_TRUE) { - warning ("Unable to fetch general registers."); - return; - } + struct iovec iov; - if (regno >= A1_REGNUM && regno <= PC_REGNUM) - read_register_gen (regno, (char *) ®s[regno]); + iov.iov_base = regbuf; + iov.iov_len = VFP_REGS_SIZE; + ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov); + } + else + ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf); - ret = ptrace (PTRACE_SETREGS, tid, 0, ®s); if (ret < 0) - { - warning ("Unable to store general register."); - return; - } + perror_with_name (_("Unable to fetch VFP registers.")); + + aarch32_vfp_regcache_supply (regcache, regbuf, + tdep->vfp_register_count); } static void -store_regs (void) +store_vfp_regs (const struct regcache *regcache) { + gdb_byte regbuf[VFP_REGS_SIZE]; int ret, regno, tid; - elf_gregset_t regs; + struct gdbarch *gdbarch = regcache->arch (); + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); /* Get the thread id for the ptrace call. */ - tid = GET_THREAD_ID (inferior_ptid); - - /* Fetch the general registers. */ - ret = ptrace (PTRACE_GETREGS, tid, 0, ®s); - if (ret < 0) - { - warning ("Unable to fetch general registers."); - return; - } + tid = ptid_get_lwp (regcache_get_ptid (regcache)); - for (regno = A1_REGNUM; regno <= PC_REGNUM; regno++) + if (have_ptrace_getregset == TRIBOOL_TRUE) { - if (register_cached (regno)) - read_register_gen (regno, (char *) ®s[regno]); - } + struct iovec iov; - ret = ptrace (PTRACE_SETREGS, tid, 0, ®s); + iov.iov_base = regbuf; + iov.iov_len = VFP_REGS_SIZE; + ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov); + } + else + ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf); if (ret < 0) + perror_with_name (_("Unable to fetch VFP registers (for update).")); + + aarch32_vfp_regcache_collect (regcache, regbuf, + tdep->vfp_register_count); + + if (have_ptrace_getregset == TRIBOOL_TRUE) { - warning ("Unable to store general registers."); - return; + struct iovec iov; + + iov.iov_base = regbuf; + iov.iov_len = VFP_REGS_SIZE; + ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov); } + else + ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf); + + if (ret < 0) + perror_with_name (_("Unable to store VFP registers.")); } /* Fetch registers from the child process. Fetch all registers if @@ -527,20 +418,35 @@ store_regs (void) point registers depending upon the value of regno. */ void -fetch_inferior_registers (int regno) +arm_linux_nat_target::fetch_registers (struct regcache *regcache, int regno) { + struct gdbarch *gdbarch = regcache->arch (); + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + if (-1 == regno) { - fetch_regs (); - fetch_fpregs (); + fetch_regs (regcache); + if (tdep->have_wmmx_registers) + fetch_wmmx_regs (regcache); + if (tdep->vfp_register_count > 0) + fetch_vfp_regs (regcache); + if (tdep->have_fpa_registers) + fetch_fpregs (regcache); } - else + else { - if (regno < F0_REGNUM || regno > FPS_REGNUM) - fetch_register (regno); - - if (regno >= F0_REGNUM && regno <= FPS_REGNUM) - fetch_fpregister (regno); + if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM) + fetch_regs (regcache); + else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM) + fetch_fpregs (regcache); + else if (tdep->have_wmmx_registers + && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM) + fetch_wmmx_regs (regcache); + else if (tdep->vfp_register_count > 0 + && regno >= ARM_D0_REGNUM + && (regno < ARM_D0_REGNUM + tdep->vfp_register_count + || regno == ARM_FPSCR_REGNUM)) + fetch_vfp_regs (regcache); } } @@ -549,146 +455,882 @@ fetch_inferior_registers (int regno) point registers depending upon the value of regno. */ void -store_inferior_registers (int regno) +arm_linux_nat_target::store_registers (struct regcache *regcache, int regno) { + struct gdbarch *gdbarch = regcache->arch (); + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + if (-1 == regno) { - store_regs (); - store_fpregs (); + store_regs (regcache); + if (tdep->have_wmmx_registers) + store_wmmx_regs (regcache); + if (tdep->vfp_register_count > 0) + store_vfp_regs (regcache); + if (tdep->have_fpa_registers) + store_fpregs (regcache); } else { - if ((regno < F0_REGNUM) || (regno > FPS_REGNUM)) - store_register (regno); - - if ((regno >= F0_REGNUM) && (regno <= FPS_REGNUM)) - store_fpregister (regno); + if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM) + store_regs (regcache); + else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM)) + store_fpregs (regcache); + else if (tdep->have_wmmx_registers + && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM) + store_wmmx_regs (regcache); + else if (tdep->vfp_register_count > 0 + && regno >= ARM_D0_REGNUM + && (regno < ARM_D0_REGNUM + tdep->vfp_register_count + || regno == ARM_FPSCR_REGNUM)) + store_vfp_regs (regcache); } } -/* Fill register regno (if it is a general-purpose register) in - *gregsetp with the appropriate value from GDB's register array. - If regno is -1, do this for all registers. */ +/* Wrapper functions for the standard regset handling, used by + thread debugging. */ void -fill_gregset (gdb_gregset_t *gregsetp, int regno) +fill_gregset (const struct regcache *regcache, + gdb_gregset_t *gregsetp, int regno) { - if (-1 == regno) + arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0); +} + +void +supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) +{ + arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0); +} + +void +fill_fpregset (const struct regcache *regcache, + gdb_fpregset_t *fpregsetp, int regno) +{ + arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0); +} + +/* Fill GDB's register array with the floating-point register values + in *fpregsetp. */ + +void +supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) +{ + arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0); +} + +/* Fetch the thread-local storage pointer for libthread_db. */ + +ps_err_e +ps_get_thread_area (struct ps_prochandle *ph, + lwpid_t lwpid, int idx, void **base) +{ + if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0) + return PS_ERR; + + /* IDX is the bias from the thread pointer to the beginning of the + thread descriptor. It has to be subtracted due to implementation + quirks in libthread_db. */ + *base = (void *) ((char *)*base - idx); + + return PS_OK; +} + +const struct target_desc * +arm_linux_nat_target::read_description () +{ + CORE_ADDR arm_hwcap = 0; + + if (have_ptrace_getregset == TRIBOOL_UNKNOWN) { - int regnum; - for (regnum = A1_REGNUM; regnum <= PC_REGNUM; regnum++) - read_register_gen (regnum, (char *) &(*gregsetp)[regnum]); + elf_gregset_t gpregs; + struct iovec iov; + int tid = ptid_get_lwp (inferior_ptid); + + iov.iov_base = &gpregs; + iov.iov_len = sizeof (gpregs); + + /* Check if PTRACE_GETREGSET works. */ + if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0) + have_ptrace_getregset = TRIBOOL_FALSE; + else + have_ptrace_getregset = TRIBOOL_TRUE; } - else if (regno >= A1_REGNUM && regno <= PC_REGNUM) - read_register_gen (regno, (char *) &(*gregsetp)[regno]); - if (PS_REGNUM == regno || -1 == regno) + if (target_auxv_search (this, AT_HWCAP, &arm_hwcap) != 1) { - if (arm_apcs_32) - read_register_gen (PS_REGNUM, (char *) &(*gregsetp)[CPSR_REGNUM]); + return this->beneath->read_description (); + } + + if (arm_hwcap & HWCAP_IWMMXT) + return tdesc_arm_with_iwmmxt; + + if (arm_hwcap & HWCAP_VFP) + { + int pid; + char *buf; + const struct target_desc * result = NULL; + + /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support + Neon with VFPv3-D32. */ + if (arm_hwcap & HWCAP_NEON) + result = tdesc_arm_with_neon; + else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) + result = tdesc_arm_with_vfpv3; else - read_register_gen (PC_REGNUM, (char *) &(*gregsetp)[PC_REGNUM]); + result = tdesc_arm_with_vfpv2; + + /* Now make sure that the kernel supports reading these + registers. Support was added in 2.6.30. */ + pid = ptid_get_lwp (inferior_ptid); + errno = 0; + buf = (char *) alloca (VFP_REGS_SIZE); + if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 + && errno == EIO) + result = NULL; + + return result; } + + return this->beneath->read_description (); } -/* Fill GDB's register array with the general-purpose register values - in *gregsetp. */ +/* Information describing the hardware breakpoint capabilities. */ +struct arm_linux_hwbp_cap +{ + gdb_byte arch; + gdb_byte max_wp_length; + gdb_byte wp_count; + gdb_byte bp_count; +}; + +/* Since we cannot dynamically allocate subfields of arm_linux_process_info, + assume a maximum number of supported break-/watchpoints. */ +#define MAX_BPTS 16 +#define MAX_WPTS 16 + +/* Get hold of the Hardware Breakpoint information for the target we are + attached to. Returns NULL if the kernel doesn't support Hardware + breakpoints at all, or a pointer to the information structure. */ +static const struct arm_linux_hwbp_cap * +arm_linux_get_hwbp_cap (void) +{ + /* The info structure we return. */ + static struct arm_linux_hwbp_cap info; -void -supply_gregset (gdb_gregset_t *gregsetp) + /* Is INFO in a good state? -1 means that no attempt has been made to + initialize INFO; 0 means an attempt has been made, but it failed; 1 + means INFO is in an initialized state. */ + static int available = -1; + + if (available == -1) + { + int tid; + unsigned int val; + + tid = ptid_get_lwp (inferior_ptid); + if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0) + available = 0; + else + { + info.arch = (gdb_byte)((val >> 24) & 0xff); + info.max_wp_length = (gdb_byte)((val >> 16) & 0xff); + info.wp_count = (gdb_byte)((val >> 8) & 0xff); + info.bp_count = (gdb_byte)(val & 0xff); + + if (info.wp_count > MAX_WPTS) + { + warning (_("arm-linux-gdb supports %d hardware watchpoints but target \ + supports %d"), MAX_WPTS, info.wp_count); + info.wp_count = MAX_WPTS; + } + + if (info.bp_count > MAX_BPTS) + { + warning (_("arm-linux-gdb supports %d hardware breakpoints but target \ + supports %d"), MAX_BPTS, info.bp_count); + info.bp_count = MAX_BPTS; + } + available = (info.arch != 0); + } + } + + return available == 1 ? &info : NULL; +} + +/* How many hardware breakpoints are available? */ +static int +arm_linux_get_hw_breakpoint_count (void) { - int regno, reg_pc; + const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap (); + return cap != NULL ? cap->bp_count : 0; +} - for (regno = A1_REGNUM; regno < PC_REGNUM; regno++) - supply_register (regno, (char *) &(*gregsetp)[regno]); +/* How many hardware watchpoints are available? */ +static int +arm_linux_get_hw_watchpoint_count (void) +{ + const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap (); + return cap != NULL ? cap->wp_count : 0; +} - if (arm_apcs_32) - supply_register (PS_REGNUM, (char *) &(*gregsetp)[CPSR_REGNUM]); +/* Have we got a free break-/watch-point available for use? Returns -1 if + there is not an appropriate resource available, otherwise returns 1. */ +int +arm_linux_nat_target::can_use_hw_breakpoint (enum bptype type, + int cnt, int ot) +{ + if (type == bp_hardware_watchpoint || type == bp_read_watchpoint + || type == bp_access_watchpoint || type == bp_watchpoint) + { + int count = arm_linux_get_hw_watchpoint_count (); + + if (count == 0) + return 0; + else if (cnt + ot > count) + return -1; + } + else if (type == bp_hardware_breakpoint) + { + int count = arm_linux_get_hw_breakpoint_count (); + + if (count == 0) + return 0; + else if (cnt > count) + return -1; + } else - supply_register (PS_REGNUM, (char *) &(*gregsetp)[PC_REGNUM]); + gdb_assert (FALSE); + + return 1; +} + +/* Enum describing the different types of ARM hardware break-/watch-points. */ +typedef enum +{ + arm_hwbp_break = 0, + arm_hwbp_load = 1, + arm_hwbp_store = 2, + arm_hwbp_access = 3 +} arm_hwbp_type; + +/* Type describing an ARM Hardware Breakpoint Control register value. */ +typedef unsigned int arm_hwbp_control_t; + +/* Structure used to keep track of hardware break-/watch-points. */ +struct arm_linux_hw_breakpoint +{ + /* Address to break on, or being watched. */ + unsigned int address; + /* Control register for break-/watch- point. */ + arm_hwbp_control_t control; +}; + +/* Structure containing arrays of per process hardware break-/watchpoints + for caching address and control information. + + The Linux ptrace interface to hardware break-/watch-points presents the + values in a vector centred around 0 (which is used fo generic information). + Positive indicies refer to breakpoint addresses/control registers, negative + indices to watchpoint addresses/control registers. + + The Linux vector is indexed as follows: + -((i << 1) + 2): Control register for watchpoint i. + -((i << 1) + 1): Address register for watchpoint i. + 0: Information register. + ((i << 1) + 1): Address register for breakpoint i. + ((i << 1) + 2): Control register for breakpoint i. + + This structure is used as a per-thread cache of the state stored by the + kernel, so that we don't need to keep calling into the kernel to find a + free breakpoint. + + We treat break-/watch-points with their enable bit clear as being deleted. + */ +struct arm_linux_debug_reg_state +{ + /* Hardware breakpoints for this process. */ + struct arm_linux_hw_breakpoint bpts[MAX_BPTS]; + /* Hardware watchpoints for this process. */ + struct arm_linux_hw_breakpoint wpts[MAX_WPTS]; +}; + +/* Per-process arch-specific data we want to keep. */ +struct arm_linux_process_info +{ + /* Linked list. */ + struct arm_linux_process_info *next; + /* The process identifier. */ + pid_t pid; + /* Hardware break-/watchpoints state information. */ + struct arm_linux_debug_reg_state state; + +}; + +/* Per-thread arch-specific data we want to keep. */ +struct arch_lwp_info +{ + /* Non-zero if our copy differs from what's recorded in the thread. */ + char bpts_changed[MAX_BPTS]; + char wpts_changed[MAX_WPTS]; +}; + +static struct arm_linux_process_info *arm_linux_process_list = NULL; + +/* Find process data for process PID. */ + +static struct arm_linux_process_info * +arm_linux_find_process_pid (pid_t pid) +{ + struct arm_linux_process_info *proc; + + for (proc = arm_linux_process_list; proc; proc = proc->next) + if (proc->pid == pid) + return proc; + + return NULL; +} + +/* Add process data for process PID. Returns newly allocated info + object. */ + +static struct arm_linux_process_info * +arm_linux_add_process (pid_t pid) +{ + struct arm_linux_process_info *proc; + + proc = XCNEW (struct arm_linux_process_info); + proc->pid = pid; + + proc->next = arm_linux_process_list; + arm_linux_process_list = proc; + + return proc; +} - reg_pc = ADDR_BITS_REMOVE ((CORE_ADDR)(*gregsetp)[PC_REGNUM]); - supply_register (PC_REGNUM, (char *) ®_pc); +/* Get data specific info for process PID, creating it if necessary. + Never returns NULL. */ + +static struct arm_linux_process_info * +arm_linux_process_info_get (pid_t pid) +{ + struct arm_linux_process_info *proc; + + proc = arm_linux_find_process_pid (pid); + if (proc == NULL) + proc = arm_linux_add_process (pid); + + return proc; } -/* Fill register regno (if it is a floating-point register) in - *fpregsetp with the appropriate value from GDB's register array. - If regno is -1, do this for all registers. */ +/* Called whenever GDB is no longer debugging process PID. It deletes + data structures that keep track of debug register state. */ void -fill_fpregset (gdb_fpregset_t *fpregsetp, int regno) +arm_linux_nat_target::low_forget_process (pid_t pid) { - FPA11 *fp = (FPA11 *) fpregsetp; - - if (-1 == regno) + struct arm_linux_process_info *proc, **proc_link; + + proc = arm_linux_process_list; + proc_link = &arm_linux_process_list; + + while (proc != NULL) { - int regnum; - for (regnum = F0_REGNUM; regnum <= F7_REGNUM; regnum++) - store_nwfpe_register (regnum, fp); - } - else if (regno >= F0_REGNUM && regno <= F7_REGNUM) + if (proc->pid == pid) { - store_nwfpe_register (regno, fp); + *proc_link = proc->next; + + xfree (proc); return; } - /* Store fpsr. */ - if (FPS_REGNUM == regno || -1 == regno) - read_register_gen (FPS_REGNUM, (char *) &fp->fpsr); + proc_link = &proc->next; + proc = *proc_link; + } } -/* Fill GDB's register array with the floating-point register values - in *fpregsetp. */ +/* Get hardware break-/watchpoint state for process PID. */ -void -supply_fpregset (gdb_fpregset_t *fpregsetp) +static struct arm_linux_debug_reg_state * +arm_linux_get_debug_reg_state (pid_t pid) { - int regno; - FPA11 *fp = (FPA11 *) fpregsetp; + return &arm_linux_process_info_get (pid)->state; +} - /* Fetch fpsr. */ - supply_register (FPS_REGNUM, (char *) &fp->fpsr); +/* Initialize an ARM hardware break-/watch-point control register value. + BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the + type of break-/watch-point; ENABLE indicates whether the point is enabled. + */ +static arm_hwbp_control_t +arm_hwbp_control_initialize (unsigned byte_address_select, + arm_hwbp_type hwbp_type, + int enable) +{ + gdb_assert ((byte_address_select & ~0xffU) == 0); + gdb_assert (hwbp_type != arm_hwbp_break + || ((byte_address_select & 0xfU) != 0)); - /* Fetch the floating point registers. */ - for (regno = F0_REGNUM; regno <= F7_REGNUM; regno++) + return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable; +} + +/* Does the breakpoint control value CONTROL have the enable bit set? */ +static int +arm_hwbp_control_is_enabled (arm_hwbp_control_t control) +{ + return control & 0x1; +} + +/* Change a breakpoint control word so that it is in the disabled state. */ +static arm_hwbp_control_t +arm_hwbp_control_disable (arm_hwbp_control_t control) +{ + return control & ~0x1; +} + +/* Initialise the hardware breakpoint structure P. The breakpoint will be + enabled, and will point to the placed address of BP_TGT. */ +static void +arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt, + struct arm_linux_hw_breakpoint *p) +{ + unsigned mask; + CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address; + + /* We have to create a mask for the control register which says which bits + of the word pointed to by address to break on. */ + if (arm_pc_is_thumb (gdbarch, address)) + { + mask = 0x3; + address &= ~1; + } + else + { + mask = 0xf; + address &= ~3; + } + + p->address = (unsigned int) address; + p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1); +} + +/* Get the ARM hardware breakpoint type from the TYPE value we're + given when asked to set a watchpoint. */ +static arm_hwbp_type +arm_linux_get_hwbp_type (enum target_hw_bp_type type) +{ + if (type == hw_read) + return arm_hwbp_load; + else if (type == hw_write) + return arm_hwbp_store; + else + return arm_hwbp_access; +} + +/* Initialize the hardware breakpoint structure P for a watchpoint at ADDR + to LEN. The type of watchpoint is given in RW. */ +static void +arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, + enum target_hw_bp_type type, + struct arm_linux_hw_breakpoint *p) +{ + const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap (); + unsigned mask; + + gdb_assert (cap != NULL); + gdb_assert (cap->max_wp_length != 0); + + mask = (1 << len) - 1; + + p->address = (unsigned int) addr; + p->control = arm_hwbp_control_initialize (mask, + arm_linux_get_hwbp_type (type), 1); +} + +/* Are two break-/watch-points equal? */ +static int +arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1, + const struct arm_linux_hw_breakpoint *p2) +{ + return p1->address == p2->address && p1->control == p2->control; +} + +/* Callback to mark a watch-/breakpoint to be updated in all threads of + the current process. */ + +struct update_registers_data +{ + int watch; + int index; +}; + +static int +update_registers_callback (struct lwp_info *lwp, void *arg) +{ + struct update_registers_data *data = (struct update_registers_data *) arg; + + if (lwp->arch_private == NULL) + lwp->arch_private = XCNEW (struct arch_lwp_info); + + /* The actual update is done later just before resuming the lwp, + we just mark that the registers need updating. */ + if (data->watch) + lwp->arch_private->wpts_changed[data->index] = 1; + else + lwp->arch_private->bpts_changed[data->index] = 1; + + /* If the lwp isn't stopped, force it to momentarily pause, so + we can update its breakpoint registers. */ + if (!lwp->stopped) + linux_stop_lwp (lwp); + + return 0; +} + +/* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT + =1) BPT for thread TID. */ +static void +arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt, + int watchpoint) +{ + int pid; + ptid_t pid_ptid; + gdb_byte count, i; + struct arm_linux_hw_breakpoint* bpts; + struct update_registers_data data; + + pid = ptid_get_pid (inferior_ptid); + pid_ptid = pid_to_ptid (pid); + + if (watchpoint) + { + count = arm_linux_get_hw_watchpoint_count (); + bpts = arm_linux_get_debug_reg_state (pid)->wpts; + } + else + { + count = arm_linux_get_hw_breakpoint_count (); + bpts = arm_linux_get_debug_reg_state (pid)->bpts; + } + + for (i = 0; i < count; ++i) + if (!arm_hwbp_control_is_enabled (bpts[i].control)) + { + data.watch = watchpoint; + data.index = i; + bpts[i] = *bpt; + iterate_over_lwps (pid_ptid, update_registers_callback, &data); + break; + } + + gdb_assert (i != count); +} + +/* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint + (WATCHPOINT = 1) BPT for thread TID. */ +static void +arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt, + int watchpoint) +{ + int pid; + gdb_byte count, i; + ptid_t pid_ptid; + struct arm_linux_hw_breakpoint* bpts; + struct update_registers_data data; + + pid = ptid_get_pid (inferior_ptid); + pid_ptid = pid_to_ptid (pid); + + if (watchpoint) { - fetch_nwfpe_register (regno, fp); + count = arm_linux_get_hw_watchpoint_count (); + bpts = arm_linux_get_debug_reg_state (pid)->wpts; } + else + { + count = arm_linux_get_hw_breakpoint_count (); + bpts = arm_linux_get_debug_reg_state (pid)->bpts; + } + + for (i = 0; i < count; ++i) + if (arm_linux_hw_breakpoint_equal (bpt, bpts + i)) + { + data.watch = watchpoint; + data.index = i; + bpts[i].control = arm_hwbp_control_disable (bpts[i].control); + iterate_over_lwps (pid_ptid, update_registers_callback, &data); + break; + } + + gdb_assert (i != count); +} + +/* Insert a Hardware breakpoint. */ +int +arm_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt) +{ + struct lwp_info *lp; + struct arm_linux_hw_breakpoint p; + + if (arm_linux_get_hw_breakpoint_count () == 0) + return -1; + + arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p); + + arm_linux_insert_hw_breakpoint1 (&p, 0); + + return 0; +} + +/* Remove a hardware breakpoint. */ +int +arm_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt) +{ + struct lwp_info *lp; + struct arm_linux_hw_breakpoint p; + + if (arm_linux_get_hw_breakpoint_count () == 0) + return -1; + + arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p); + + arm_linux_remove_hw_breakpoint1 (&p, 0); + + return 0; +} + +/* Are we able to use a hardware watchpoint for the LEN bytes starting at + ADDR? */ +int +arm_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len) +{ + const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap (); + CORE_ADDR max_wp_length, aligned_addr; + + /* Can not set watchpoints for zero or negative lengths. */ + if (len <= 0) + return 0; + + /* Need to be able to use the ptrace interface. */ + if (cap == NULL || cap->wp_count == 0) + return 0; + + /* Test that the range [ADDR, ADDR + LEN) fits into the largest address + range covered by a watchpoint. */ + max_wp_length = (CORE_ADDR)cap->max_wp_length; + aligned_addr = addr & ~(max_wp_length - 1); + + if (aligned_addr + max_wp_length < addr + len) + return 0; + + /* The current ptrace interface can only handle watchpoints that are a + power of 2. */ + if ((len & (len - 1)) != 0) + return 0; + + /* All tests passed so we must be able to set a watchpoint. */ + return 1; } +/* Insert a Hardware breakpoint. */ int -arm_linux_kernel_u_size (void) +arm_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len, + enum target_hw_bp_type rw, + struct expression *cond) +{ + struct lwp_info *lp; + struct arm_linux_hw_breakpoint p; + + if (arm_linux_get_hw_watchpoint_count () == 0) + return -1; + + arm_linux_hw_watchpoint_initialize (addr, len, rw, &p); + + arm_linux_insert_hw_breakpoint1 (&p, 1); + + return 0; +} + +/* Remove a hardware breakpoint. */ +int +arm_linux_nat_target::remove_watchpoint (CORE_ADDR addr, + int len, enum target_hw_bp_type rw, + struct expression *cond) +{ + struct lwp_info *lp; + struct arm_linux_hw_breakpoint p; + + if (arm_linux_get_hw_watchpoint_count () == 0) + return -1; + + arm_linux_hw_watchpoint_initialize (addr, len, rw, &p); + + arm_linux_remove_hw_breakpoint1 (&p, 1); + + return 0; +} + +/* What was the data address the target was stopped on accessing. */ +bool +arm_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p) +{ + siginfo_t siginfo; + int slot; + + if (!linux_nat_get_siginfo (inferior_ptid, &siginfo)) + return false; + + /* This must be a hardware breakpoint. */ + if (siginfo.si_signo != SIGTRAP + || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */) + return false; + + /* We must be able to set hardware watchpoints. */ + if (arm_linux_get_hw_watchpoint_count () == 0) + return 0; + + slot = siginfo.si_errno; + + /* If we are in a positive slot then we're looking at a breakpoint and not + a watchpoint. */ + if (slot >= 0) + return false; + + *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr; + return true; +} + +/* Has the target been stopped by hitting a watchpoint? */ +bool +arm_linux_nat_target::stopped_by_watchpoint () { - return (sizeof (struct user)); + CORE_ADDR addr; + return stopped_data_address (&addr); } -static unsigned int -get_linux_version (unsigned int *vmajor, - unsigned int *vminor, - unsigned int *vrelease) +bool +arm_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr, + CORE_ADDR start, + int length) { - struct utsname info; - char *pmajor, *pminor, *prelease, *tail; + return start <= addr && start + length - 1 >= addr; +} + +/* Handle thread creation. We need to copy the breakpoints and watchpoints + in the parent thread to the child thread. */ +void +arm_linux_nat_target::low_new_thread (struct lwp_info *lp) +{ + int i; + struct arch_lwp_info *info = XCNEW (struct arch_lwp_info); + + /* Mark that all the hardware breakpoint/watchpoint register pairs + for this thread need to be initialized. */ - if (-1 == uname (&info)) + for (i = 0; i < MAX_BPTS; i++) { - warning ("Unable to determine Linux version."); - return -1; + info->bpts_changed[i] = 1; + info->wpts_changed[i] = 1; } - pmajor = strtok (info.release, "."); - pminor = strtok (NULL, "."); - prelease = strtok (NULL, "."); + lp->arch_private = info; +} + +/* Function to call when a thread is being deleted. */ + +void +arm_linux_nat_target::low_delete_thread (struct arch_lwp_info *arch_lwp) +{ + xfree (arch_lwp); +} + +/* Called when resuming a thread. + The hardware debug registers are updated when there is any change. */ + +void +arm_linux_nat_target::low_prepare_to_resume (struct lwp_info *lwp) +{ + int pid, i; + struct arm_linux_hw_breakpoint *bpts, *wpts; + struct arch_lwp_info *arm_lwp_info = lwp->arch_private; + + pid = ptid_get_lwp (lwp->ptid); + bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts; + wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts; + + /* NULL means this is the main thread still going through the shell, + or, no watchpoint has been set yet. In that case, there's + nothing to do. */ + if (arm_lwp_info == NULL) + return; + + for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++) + if (arm_lwp_info->bpts_changed[i]) + { + errno = 0; + if (arm_hwbp_control_is_enabled (bpts[i].control)) + if (ptrace (PTRACE_SETHBPREGS, pid, + (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0) + perror_with_name (_("Unexpected error setting breakpoint")); + + if (bpts[i].control != 0) + if (ptrace (PTRACE_SETHBPREGS, pid, + (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0) + perror_with_name (_("Unexpected error setting breakpoint")); + + arm_lwp_info->bpts_changed[i] = 0; + } + + for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++) + if (arm_lwp_info->wpts_changed[i]) + { + errno = 0; + if (arm_hwbp_control_is_enabled (wpts[i].control)) + if (ptrace (PTRACE_SETHBPREGS, pid, + (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0) + perror_with_name (_("Unexpected error setting watchpoint")); + + if (wpts[i].control != 0) + if (ptrace (PTRACE_SETHBPREGS, pid, + (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0) + perror_with_name (_("Unexpected error setting watchpoint")); + + arm_lwp_info->wpts_changed[i] = 0; + } +} + +/* linux_nat_new_fork hook. */ + +void +arm_linux_nat_target::low_new_fork (struct lwp_info *parent, pid_t child_pid) +{ + pid_t parent_pid; + struct arm_linux_debug_reg_state *parent_state; + struct arm_linux_debug_reg_state *child_state; + + /* NULL means no watchpoint has ever been set in the parent. In + that case, there's nothing to do. */ + if (parent->arch_private == NULL) + return; - *vmajor = (unsigned int) strtoul (pmajor, &tail, 0); - *vminor = (unsigned int) strtoul (pminor, &tail, 0); - *vrelease = (unsigned int) strtoul (prelease, &tail, 0); + /* GDB core assumes the child inherits the watchpoints/hw + breakpoints of the parent, and will remove them all from the + forked off process. Copy the debug registers mirrors into the + new process so that all breakpoints and watchpoints can be + removed together. */ - return ((*vmajor << 16) | (*vminor << 8) | *vrelease); + parent_pid = ptid_get_pid (parent->ptid); + parent_state = arm_linux_get_debug_reg_state (parent_pid); + child_state = arm_linux_get_debug_reg_state (child_pid); + *child_state = *parent_state; } void _initialize_arm_linux_nat (void) { - os_version = get_linux_version (&os_major, &os_minor, &os_release); + /* Register the target. */ + linux_target = &the_arm_linux_nat_target; + add_inf_child_target (&the_arm_linux_nat_target); }