X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Farm-tdep.h;h=0063fefbb59d589e45ddf462fe896ddef7f10fff;hb=d0e59a68884ad3a346ff0f6f763636c7245e4cb3;hp=a1a2be5cb87c8e6e6d5a3c3dfc0fd1c84ef05c42;hpb=948f8e3d72fa7047c43a952017ad4a7c9d55ab0d;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h index a1a2be5cb8..0063fefbb5 100644 --- a/gdb/arm-tdep.h +++ b/gdb/arm-tdep.h @@ -1,5 +1,5 @@ /* Common target dependent code for GDB on ARM systems. - Copyright (C) 2002-2013 Free Software Foundation, Inc. + Copyright (C) 2002-2015 Free Software Foundation, Inc. This file is part of GDB. @@ -24,47 +24,7 @@ struct gdbarch; struct regset; struct address_space; -/* Register numbers of various important registers. */ - -enum gdb_regnum { - ARM_A1_REGNUM = 0, /* first integer-like argument */ - ARM_A4_REGNUM = 3, /* last integer-like argument */ - ARM_AP_REGNUM = 11, - ARM_IP_REGNUM = 12, - ARM_SP_REGNUM = 13, /* Contains address of top of stack */ - ARM_LR_REGNUM = 14, /* address to return to from a function call */ - ARM_PC_REGNUM = 15, /* Contains program counter */ - ARM_F0_REGNUM = 16, /* first floating point register */ - ARM_F3_REGNUM = 19, /* last floating point argument register */ - ARM_F7_REGNUM = 23, /* last floating point register */ - ARM_FPS_REGNUM = 24, /* floating point status register */ - ARM_PS_REGNUM = 25, /* Contains processor status */ - ARM_WR0_REGNUM, /* WMMX data registers. */ - ARM_WR15_REGNUM = ARM_WR0_REGNUM + 15, - ARM_WC0_REGNUM, /* WMMX control registers. */ - ARM_WCSSF_REGNUM = ARM_WC0_REGNUM + 2, - ARM_WCASF_REGNUM = ARM_WC0_REGNUM + 3, - ARM_WC7_REGNUM = ARM_WC0_REGNUM + 7, - ARM_WCGR0_REGNUM, /* WMMX general purpose registers. */ - ARM_WCGR3_REGNUM = ARM_WCGR0_REGNUM + 3, - ARM_WCGR7_REGNUM = ARM_WCGR0_REGNUM + 7, - ARM_D0_REGNUM, /* VFP double-precision registers. */ - ARM_D31_REGNUM = ARM_D0_REGNUM + 31, - ARM_FPSCR_REGNUM, - - ARM_NUM_REGS, - - /* Other useful registers. */ - ARM_FP_REGNUM = 11, /* Frame register in ARM code, if used. */ - THUMB_FP_REGNUM = 7, /* Frame register in Thumb code, if used. */ - ARM_NUM_ARG_REGS = 4, - ARM_LAST_ARG_REGNUM = ARM_A4_REGNUM, - ARM_NUM_FP_ARG_REGS = 4, - ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM -}; - -/* Size of integer registers. */ -#define INT_REGISTER_SIZE 4 +#include "arch/arm.h" /* Say how long FP registers are. Used for documentation purposes and code readability in this header. IEEE extended doubles are 80 @@ -87,32 +47,6 @@ enum gdb_regnum { #define NUM_GREGS 16 /* Number of general purpose registers. */ -/* Instruction condition field values. */ -#define INST_EQ 0x0 -#define INST_NE 0x1 -#define INST_CS 0x2 -#define INST_CC 0x3 -#define INST_MI 0x4 -#define INST_PL 0x5 -#define INST_VS 0x6 -#define INST_VC 0x7 -#define INST_HI 0x8 -#define INST_LS 0x9 -#define INST_GE 0xa -#define INST_LT 0xb -#define INST_GT 0xc -#define INST_LE 0xd -#define INST_AL 0xe -#define INST_NV 0xf - -#define FLAG_N 0x80000000 -#define FLAG_Z 0x40000000 -#define FLAG_C 0x20000000 -#define FLAG_V 0x10000000 - -#define CPSR_T 0x20 - -#define XPSR_T 0x01000000 /* Type of floating-point code in use by inferior. There are really 3 models that are traditionally supported (plus the endianness issue), but gcc can @@ -161,7 +95,10 @@ struct gdbarch_tdep enum arm_float_model fp_model; /* Floating point calling conventions. */ int have_fpa_registers; /* Does the target report the FPA registers? */ - int have_vfp_registers; /* Does the target report the VFP registers? */ + int have_wmmx_registers; /* Does the target report the WMMX registers? */ + /* The number of VFP registers reported by the target. It is zero + if VFP registers are not supported. */ + int vfp_register_count; int have_vfp_pseudos; /* Are we synthesizing the single precision VFP registers? */ int have_neon_pseudos; /* Are we synthesizing the quad precision @@ -193,20 +130,17 @@ struct gdbarch_tdep /* Convention for returning structures. */ enum struct_return struct_return; - /* Cached core file helpers. */ - struct regset *gregset, *fpregset, *vfpregset; - /* ISA-specific data types. */ struct type *arm_ext_type; struct type *neon_double_type; struct type *neon_quad_type; - /* Return the expected next PC if FRAME is stopped at a syscall + /* Return the expected next PC if the program is stopped at a syscall instruction. */ - CORE_ADDR (*syscall_next_pc) (struct frame_info *frame); + CORE_ADDR (*syscall_next_pc) (struct regcache *regcache); - /* Parse swi insn args, sycall record. */ - int (*arm_swi_record) (struct regcache *regcache); + /* syscall record. */ + int (*arm_syscall_record) (struct regcache *regcache, unsigned long svc_number); }; /* Structures used for displaced stepping. */ @@ -316,11 +250,12 @@ extern void ULONGEST val, enum pc_write_style write_pc); CORE_ADDR arm_skip_stub (struct frame_info *, CORE_ADDR); -CORE_ADDR arm_get_next_pc (struct frame_info *, CORE_ADDR); +CORE_ADDR arm_get_next_pc (struct regcache *regcache, CORE_ADDR pc); void arm_insert_single_step_breakpoint (struct gdbarch *, struct address_space *, CORE_ADDR); -int arm_deal_with_atomic_sequence (struct frame_info *); +int arm_deal_with_atomic_sequence (struct regcache *); int arm_software_single_step (struct frame_info *); +int arm_is_thumb (struct regcache *regcache); int arm_frame_is_thumb (struct frame_info *frame); extern struct displaced_step_closure * @@ -344,9 +279,11 @@ extern int arm_process_record (struct gdbarch *gdbarch, /* Return the appropriate register set for the core section identified by SECT_NAME and SECT_SIZE. */ -extern const struct regset * - armbsd_regset_from_core_section (struct gdbarch *gdbarch, - const char *sect_name, size_t sect_size); +extern void + armbsd_iterate_over_regset_sections (struct gdbarch *gdbarch, + iterate_over_regset_sections_cb *cb, + void *cb_data, + const struct regcache *regcache); /* Target descriptions. */ extern struct target_desc *tdesc_arm_with_m;