X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Fcris-tdep.c;h=0b2fb91f8cced51f5ca7ca1c3922cf4eca427eef;hb=4c6ee6465acc58f0f86c44668c4e862901186239;hp=f2c0b7e2c019c69d456ed03a006b6ec7e994fa8d;hpb=df4df182b49ab6808495f557d3727b8dfd4b98da;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c index f2c0b7e2c0..0b2fb91f8c 100644 --- a/gdb/cris-tdep.c +++ b/gdb/cris-tdep.c @@ -1,7 +1,6 @@ /* Target dependent code for CRIS, for GDB, the GNU debugger. - Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 - Free Software Foundation, Inc. + Copyright (C) 2001-2020 Free Software Foundation, Inc. Contributed by Axis Communications AB. Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg. @@ -35,18 +34,18 @@ #include "target.h" #include "value.h" #include "opcode/cris.h" +#include "osabi.h" #include "arch-utils.h" #include "regcache.h" -#include "gdb_assert.h" -/* To get entry_point_address. */ #include "objfiles.h" #include "solib.h" /* Support for shared libraries. */ #include "solib-svr4.h" -#include "gdb_string.h" #include "dis-asm.h" +#include "cris-tdep.h" + enum cris_num_regs { /* There are no floating point registers. Used in gdbserver low-linux.c. */ @@ -71,7 +70,7 @@ enum cris_num_regs ARG1_REGNUM Contains the first parameter to a function. ARG2_REGNUM Contains the second parameter to a function. ARG3_REGNUM Contains the third parameter to a function. - ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack. + ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack. gdbarch_sp_regnum Contains address of top of stack. gdbarch_pc_regnum Contains address of next instruction. SRP_REGNUM Subroutine return pointer register. @@ -95,7 +94,7 @@ enum cris_regnums MOF_REGNUM = 23, SRP_REGNUM = 27, - /* CRISv10 et. al. specific registers. */ + /* CRISv10 et al. specific registers. */ P0_REGNUM = 16, P4_REGNUM = 20, CCR_REGNUM = 21, @@ -146,14 +145,14 @@ extern const struct cris_spec_reg cris_spec_regs[]; /* CRIS version, set via the user command 'set cris-version'. Affects register names and sizes. */ -static int usr_cmd_cris_version; +static unsigned int usr_cmd_cris_version; /* Indicates whether to trust the above variable. */ -static int usr_cmd_cris_version_valid = 0; +static bool usr_cmd_cris_version_valid = false; static const char cris_mode_normal[] = "normal"; static const char cris_mode_guru[] = "guru"; -static const char *cris_modes[] = { +static const char *const cris_modes[] = { cris_mode_normal, cris_mode_guru, 0 @@ -164,15 +163,7 @@ static const char *cris_modes[] = { static const char *usr_cmd_cris_mode = cris_mode_normal; /* Whether to make use of Dwarf-2 CFI (default on). */ -static int usr_cmd_cris_dwarf2_cfi = 1; - -/* CRIS architecture specific information. */ -struct gdbarch_tdep -{ - int cris_version; - const char *cris_mode; - int cris_dwarf2_cfi; -}; +static bool usr_cmd_cris_dwarf2_cfi = true; /* Sigtramp identification code copied from i386-linux-tdep.c. */ @@ -259,13 +250,14 @@ cris_rt_sigtramp_start (struct frame_info *this_frame) static CORE_ADDR cris_sigcontext_addr (struct frame_info *this_frame) { + struct gdbarch *gdbarch = get_frame_arch (this_frame); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); CORE_ADDR pc; CORE_ADDR sp; - char buf[4]; + gdb_byte buf[4]; - get_frame_register (this_frame, - gdbarch_sp_regnum (get_frame_arch (this_frame)), buf); - sp = extract_unsigned_integer (buf, 4); + get_frame_register (this_frame, gdbarch_sp_regnum (gdbarch), buf); + sp = extract_unsigned_integer (buf, 4, byte_order); /* Look for normal sigtramp frame first. */ pc = cris_sigtramp_start (this_frame); @@ -321,15 +313,14 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *this_frame, { struct gdbarch *gdbarch = get_frame_arch (this_frame); struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); struct cris_unwind_cache *info; - CORE_ADDR pc; - CORE_ADDR sp; CORE_ADDR addr; - char buf[4]; + gdb_byte buf[4]; int i; if ((*this_cache)) - return (*this_cache); + return (struct cris_unwind_cache *) (*this_cache); info = FRAME_OBSTACK_ZALLOC (struct cris_unwind_cache); (*this_cache) = info; @@ -346,7 +337,7 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *this_frame, info->leaf_function = 0; get_frame_register (this_frame, gdbarch_sp_regnum (gdbarch), buf); - info->base = extract_unsigned_integer (buf, 4); + info->base = extract_unsigned_integer (buf, 4, byte_order); addr = cris_sigcontext_addr (this_frame); @@ -396,7 +387,7 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *this_frame, /* FIXME: If ERP is in a delay slot at this point then the PC will be wrong at this point. This problem manifests itself in the sigaltstack.exp test case, which occasionally generates FAILs when - the signal is received while in a delay slot. + the signal is received while in a delay slot. This could be solved by a couple of read_memory_unsigned_integer and a trad_frame_set_value. */ @@ -447,6 +438,7 @@ cris_sigtramp_frame_sniffer (const struct frame_unwind *self, static const struct frame_unwind cris_sigtramp_frame_unwind = { SIGTRAMP_FRAME, + default_frame_unwind_stop_reason, cris_sigtramp_frame_this_id, cris_sigtramp_frame_prev_register, NULL, @@ -470,54 +462,12 @@ crisv32_single_step_through_delay (struct gdbarch *gdbarch, { /* In delay slot - check if there's a breakpoint at the preceding instruction. */ - if (breakpoint_here_p (erp & ~0x1)) + if (breakpoint_here_p (get_frame_address_space (this_frame), erp & ~0x1)) ret = 1; } return ret; } -/* Hardware watchpoint support. */ - -/* We support 6 hardware data watchpoints, but cannot trigger on execute - (any combination of read/write is fine). */ - -int -cris_can_use_hardware_watchpoint (int type, int count, int other) -{ - struct gdbarch_tdep *tdep = gdbarch_tdep (target_gdbarch); - - /* No bookkeeping is done here; it is handled by the remote debug agent. */ - - if (tdep->cris_version != 32) - return 0; - else - /* CRISv32: Six data watchpoints, one for instructions. */ - return (((type == bp_read_watchpoint || type == bp_access_watchpoint - || type == bp_hardware_watchpoint) && count <= 6) - || (type == bp_hardware_breakpoint && count <= 1)); -} - -/* The CRISv32 hardware data watchpoints work by specifying ranges, - which have no alignment or length restrictions. */ - -int -cris_region_ok_for_watchpoint (CORE_ADDR addr, int len) -{ - return 1; -} - -/* If the inferior has some watchpoint that triggered, return the - address associated with that watchpoint. Otherwise, return - zero. */ - -CORE_ADDR -cris_stopped_data_address (void) -{ - CORE_ADDR eda; - eda = get_frame_register_unsigned (get_current_frame (), EDA_REGNUM); - return eda; -} - /* The instruction environment needed to find single-step breakpoints. */ typedef @@ -535,6 +485,7 @@ struct instruction_environment int delay_slot_pc_active; int xflag_found; int disable_interrupt; + enum bfd_endian byte_order; } inst_env_type; /* Machine-dependencies in CRIS for opcodes. */ @@ -683,13 +634,13 @@ static struct gdbarch *cris_gdbarch_init (struct gdbarch_info, static void cris_dump_tdep (struct gdbarch *, struct ui_file *); -static void set_cris_version (char *ignore_args, int from_tty, +static void set_cris_version (const char *ignore_args, int from_tty, struct cmd_list_element *c); -static void set_cris_mode (char *ignore_args, int from_tty, +static void set_cris_mode (const char *ignore_args, int from_tty, struct cmd_list_element *c); -static void set_cris_dwarf2_cfi (char *ignore_args, int from_tty, +static void set_cris_dwarf2_cfi (const char *ignore_args, int from_tty, struct cmd_list_element *c); static CORE_ADDR cris_scan_prologue (CORE_ADDR pc, @@ -700,29 +651,22 @@ static CORE_ADDR crisv32_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, struct cris_unwind_cache *info); -static CORE_ADDR cris_unwind_pc (struct gdbarch *gdbarch, - struct frame_info *next_frame); - -static CORE_ADDR cris_unwind_sp (struct gdbarch *gdbarch, - struct frame_info *next_frame); - /* When arguments must be pushed onto the stack, they go on in reverse - order. The below implements a FILO (stack) to do this. + order. The below implements a FILO (stack) to do this. Copied from d10v-tdep.c. */ struct stack_item { int len; struct stack_item *prev; - void *data; + gdb_byte *data; }; static struct stack_item * -push_stack_item (struct stack_item *prev, void *contents, int len) +push_stack_item (struct stack_item *prev, const gdb_byte *contents, int len) { - struct stack_item *si; - si = xmalloc (sizeof (struct stack_item)); - si->data = xmalloc (len); + struct stack_item *si = XNEW (struct stack_item); + si->data = (gdb_byte *) xmalloc (len); si->len = len; si->prev = prev; memcpy (si->data, contents, len); @@ -751,12 +695,10 @@ cris_frame_unwind_cache (struct frame_info *this_frame, { struct gdbarch *gdbarch = get_frame_arch (this_frame); struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - CORE_ADDR pc; struct cris_unwind_cache *info; - int i; if ((*this_prologue_cache)) - return (*this_prologue_cache); + return (struct cris_unwind_cache *) (*this_prologue_cache); info = FRAME_OBSTACK_ZALLOC (struct cris_unwind_cache); (*this_prologue_cache) = info; @@ -819,18 +761,6 @@ cris_frame_prev_register (struct frame_info *this_frame, return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); } -/* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy - frame. The frame ID's base needs to match the TOS value saved by - save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */ - -static struct frame_id -cris_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) -{ - CORE_ADDR sp; - sp = get_frame_register_unsigned (this_frame, gdbarch_sp_regnum (gdbarch)); - return frame_id_build (sp, get_frame_pc (this_frame)); -} - static CORE_ADDR cris_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) { @@ -860,21 +790,13 @@ static CORE_ADDR cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, - int struct_return, CORE_ADDR struct_addr) + function_call_return_method return_method, + CORE_ADDR struct_addr) { - int stack_alloc; - int stack_offset; + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); int argreg; int argnum; - CORE_ADDR regval; - - /* The function's arguments and memory allocated by gdb for the arguments to - point at reside in separate areas on the stack. - Both frame pointers grow toward higher addresses. */ - CORE_ADDR fp_arg; - CORE_ADDR fp_mem; - struct stack_item *si = NULL; /* Push the return address. */ @@ -883,25 +805,22 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function, /* Are we returning a value using a structure return or a normal value return? struct_addr is the address of the reserved space for the return structure to be written on the stack. */ - if (struct_return) - { - regcache_cooked_write_unsigned (regcache, STR_REGNUM, struct_addr); - } + if (return_method == return_method_struct) + regcache_cooked_write_unsigned (regcache, STR_REGNUM, struct_addr); /* Now load as many as possible of the first arguments into registers, and push the rest onto the stack. */ argreg = ARG1_REGNUM; - stack_offset = 0; for (argnum = 0; argnum < nargs; argnum++) { int len; - char *val; + const gdb_byte *val; int reg_demand; int i; len = TYPE_LENGTH (value_type (args[argnum])); - val = (char *) value_contents (args[argnum]); + val = value_contents (args[argnum]); /* How may registers worth of storage do we need for this argument? */ reg_demand = (len / 4) + (len % 4 != 0 ? 1 : 0); @@ -911,7 +830,7 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function, /* Data passed by value. Fits in available register(s). */ for (i = 0; i < reg_demand; i++) { - regcache_cooked_write (regcache, argreg, val); + regcache->cooked_write (argreg, val); argreg++; val += 4; } @@ -924,7 +843,7 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function, { if (argreg <= ARG4_REGNUM) { - regcache_cooked_write (regcache, argreg, val); + regcache->cooked_write (argreg, val); argreg++; val += 4; } @@ -952,7 +871,7 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function, else { gdb_byte buf[4]; - store_unsigned_integer (buf, 4, sp); + store_unsigned_integer (buf, 4, byte_order, sp); si = push_stack_item (si, buf, 4); } } @@ -982,6 +901,7 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function, static const struct frame_unwind cris_frame_unwind = { NORMAL_FRAME, + default_frame_unwind_stop_reason, cris_frame_this_id, cris_frame_prev_register, NULL, @@ -1050,7 +970,7 @@ static const struct frame_base cris_frame_base = the subq-instruction will be present with X as the number of bytes needed for storage. The reshuffle with respect to r8 may be performed with any size S (b, w, d) and any of the general registers Z={0..13}. - The offset U should be representable by a signed 8-bit value in all cases. + The offset U should be representable by a signed 8-bit value in all cases. Thus, the prefix word is assumed to be immediate byte offset mode followed by another word containing the instruction. @@ -1070,7 +990,7 @@ static const struct frame_base cris_frame_base = move.d r13,rV ; P3 move.S [r8+U],rZ ; P4 - if any of the call parameters are stored. The host expects these + if any of the call parameters are stored. The host expects these instructions to be executed in order to get the call parameters right. */ /* Examine the prologue of a function. The variable ip is the address of @@ -1085,6 +1005,8 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, struct cris_unwind_cache *info) { struct gdbarch *gdbarch = get_frame_arch (this_frame); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + /* Present instruction. */ unsigned short insn; @@ -1092,9 +1014,6 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, unsigned short insn_next; int regno; - /* Is there a push fp? */ - int have_fp; - /* Number of byte on stack used for local variables and movem. */ int val; @@ -1126,12 +1045,12 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, /* Find the prologue instructions. */ while (pc > 0 && pc < limit) { - insn = read_memory_unsigned_integer (pc, 2); + insn = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; if (insn == 0xE1FC) { - /* push 32 bit instruction */ - insn_next = read_memory_unsigned_integer (pc, 2); + /* push 32 bit instruction. */ + insn_next = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; regno = cris_get_operand2 (insn_next); if (info) @@ -1195,7 +1114,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, { info->sp_offset += -cris_get_signed_offset (insn); } - insn_next = read_memory_unsigned_integer (pc, 2); + insn_next = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE && cris_get_opcode (insn_next) == 0x000F @@ -1240,7 +1159,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, && (cris_get_signed_offset (insn) < 0)) { /* move.S rZ,[r8-U] (?) */ - insn_next = read_memory_unsigned_integer (pc, 2); + insn_next = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; regno = cris_get_operand2 (insn_next); if ((regno >= 0 && regno < gdbarch_sp_regnum (gdbarch)) @@ -1264,7 +1183,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, && (cris_get_signed_offset (insn) > 0)) { /* move.S [r8+U],rZ (?) */ - insn_next = read_memory_unsigned_integer (pc, 2); + insn_next = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; regno = cris_get_operand2 (insn_next); if ((regno >= 0 && regno < gdbarch_sp_regnum (gdbarch)) @@ -1435,37 +1354,24 @@ cris_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) return pc_after_prologue; } -static CORE_ADDR -cris_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) -{ - ULONGEST pc; - pc = frame_unwind_register_unsigned (next_frame, - gdbarch_pc_regnum (gdbarch)); - return pc; -} +/* Implement the breakpoint_kind_from_pc gdbarch method. */ -static CORE_ADDR -cris_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) +static int +cris_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr) { - ULONGEST sp; - sp = frame_unwind_register_unsigned (next_frame, - gdbarch_sp_regnum (gdbarch)); - return sp; + return 2; } -/* Use the program counter to determine the contents and size of a breakpoint - instruction. It returns a pointer to a string of bytes that encode a - breakpoint instruction, stores the length of the string to *lenptr, and - adjusts pcptr (if necessary) to point to the actual memory location where - the breakpoint should be inserted. */ +/* Implement the sw_breakpoint_from_kind gdbarch method. */ -static const unsigned char * -cris_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr) +static const gdb_byte * +cris_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size) { struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); static unsigned char break8_insn[] = {0x38, 0xe9}; static unsigned char break15_insn[] = {0x3f, 0xe9}; - *lenptr = 2; + + *size = kind; if (tdep->cris_mode == cris_mode_guru) return break15_insn; @@ -1481,7 +1387,7 @@ cris_spec_reg_applicable (struct gdbarch *gdbarch, struct cris_spec_reg spec_reg) { struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - int version = tdep->cris_version; + unsigned int version = tdep->cris_version; switch (spec_reg.applicable_version) { @@ -1491,19 +1397,19 @@ cris_spec_reg_applicable (struct gdbarch *gdbarch, /* Indeterminate/obsolete. */ return 0; case cris_ver_v0_3: - return (version >= 0 && version <= 3); + return in_inclusive_range (version, 0U, 3U); case cris_ver_v3p: return (version >= 3); case cris_ver_v8: - return (version == 8 || version == 9); + return in_inclusive_range (version, 8U, 9U); case cris_ver_v8p: return (version >= 8); case cris_ver_v0_10: - return (version >= 0 && version <= 10); + return in_inclusive_range (version, 0U, 10U); case cris_ver_v3_10: - return (version >= 3 && version <= 10); + return in_inclusive_range (version, 3U, 10U); case cris_ver_v8_10: - return (version >= 8 && version <= 10); + return in_inclusive_range (version, 8U, 10U); case cris_ver_v10: return (version == 10); case cris_ver_v10p: @@ -1522,7 +1428,6 @@ cris_spec_reg_applicable (struct gdbarch *gdbarch, static int cris_register_size (struct gdbarch *gdbarch, int regno) { - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); int i; int spec_regno; @@ -1578,8 +1483,7 @@ cris_cannot_store_register (struct gdbarch *gdbarch, int regno) /* There are three kinds of registers we refuse to write to. 1. Those that not implemented. 2. Those that are read-only (depends on the processor mode). - 3. Those registers to which a write has no effect. - */ + 3. Those registers to which a write has no effect. */ if (regno < 0 || regno >= gdbarch_num_regs (gdbarch) @@ -1620,8 +1524,7 @@ crisv32_cannot_store_register (struct gdbarch *gdbarch, int regno) /* There are three kinds of registers we refuse to write to. 1. Those that not implemented. 2. Those that are read-only (depends on the processor mode). - 3. Those registers to which a write has no effect. - */ + 3. Those registers to which a write has no effect. */ if (regno < 0 || regno >= gdbarch_num_regs (gdbarch) @@ -1701,31 +1604,33 @@ crisv32_register_type (struct gdbarch *gdbarch, int regno) static void cris_store_return_value (struct type *type, struct regcache *regcache, - const void *valbuf) + const gdb_byte *valbuf) { + struct gdbarch *gdbarch = regcache->arch (); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); ULONGEST val; int len = TYPE_LENGTH (type); if (len <= 4) { /* Put the return value in R10. */ - val = extract_unsigned_integer (valbuf, len); + val = extract_unsigned_integer (valbuf, len, byte_order); regcache_cooked_write_unsigned (regcache, ARG1_REGNUM, val); } else if (len <= 8) { /* Put the return value in R10 and R11. */ - val = extract_unsigned_integer (valbuf, 4); + val = extract_unsigned_integer (valbuf, 4, byte_order); regcache_cooked_write_unsigned (regcache, ARG1_REGNUM, val); - val = extract_unsigned_integer ((char *)valbuf + 4, len - 4); + val = extract_unsigned_integer (valbuf + 4, len - 4, byte_order); regcache_cooked_write_unsigned (regcache, ARG2_REGNUM, val); } else error (_("cris_store_return_value: type length too large.")); } -/* Return the name of register regno as a string. Return NULL for an invalid or - unimplemented register. */ +/* Return the name of register regno as a string. Return NULL for an + invalid or unimplemented register. */ static const char * cris_special_register_name (struct gdbarch *gdbarch, int regno) @@ -1753,7 +1658,7 @@ cris_special_register_name (struct gdbarch *gdbarch, int regno) static const char * cris_register_name (struct gdbarch *gdbarch, int regno) { - static char *cris_genreg_names[] = + static const char *cris_genreg_names[] = { "r0", "r1", "r2", "r3", \ "r4", "r5", "r6", "r7", \ "r8", "r9", "r10", "r11", \ @@ -1778,14 +1683,14 @@ cris_register_name (struct gdbarch *gdbarch, int regno) static const char * crisv32_register_name (struct gdbarch *gdbarch, int regno) { - static char *crisv32_genreg_names[] = + static const char *crisv32_genreg_names[] = { "r0", "r1", "r2", "r3", \ "r4", "r5", "r6", "r7", \ "r8", "r9", "r10", "r11", \ "r12", "r13", "sp", "acr" }; - static char *crisv32_sreg_names[] = + static const char *crisv32_sreg_names[] = { "s0", "s1", "s2", "s3", \ "s4", "s5", "s6", "s7", \ "s8", "s9", "s10", "s11", \ @@ -1840,9 +1745,6 @@ cris_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) if (reg >= 0 && reg < ARRAY_SIZE (cris_dwarf_regmap)) regnum = cris_dwarf_regmap[reg]; - if (regnum == -1) - warning (_("Unmapped DWARF Register #%d encountered."), reg); - return regnum; } @@ -1870,8 +1772,10 @@ cris_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, static void cris_extract_return_value (struct type *type, struct regcache *regcache, - void *valbuf) + gdb_byte *valbuf) { + struct gdbarch *gdbarch = regcache->arch (); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); ULONGEST val; int len = TYPE_LENGTH (type); @@ -1879,15 +1783,15 @@ cris_extract_return_value (struct type *type, struct regcache *regcache, { /* Get the return value from R10. */ regcache_cooked_read_unsigned (regcache, ARG1_REGNUM, &val); - store_unsigned_integer (valbuf, len, val); + store_unsigned_integer (valbuf, len, byte_order, val); } else if (len <= 8) { /* Get the return value from R10 and R11. */ regcache_cooked_read_unsigned (regcache, ARG1_REGNUM, &val); - store_unsigned_integer (valbuf, 4, val); + store_unsigned_integer (valbuf, 4, byte_order, val); regcache_cooked_read_unsigned (regcache, ARG2_REGNUM, &val); - store_unsigned_integer ((char *)valbuf + 4, len - 4, val); + store_unsigned_integer (valbuf + 4, len - 4, byte_order, val); } else error (_("cris_extract_return_value: type length too large")); @@ -1896,7 +1800,7 @@ cris_extract_return_value (struct type *type, struct regcache *regcache, /* Handle the CRIS return value convention. */ static enum return_value_convention -cris_return_value (struct gdbarch *gdbarch, struct type *func_type, +cris_return_value (struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf) { @@ -1919,13 +1823,13 @@ cris_return_value (struct gdbarch *gdbarch, struct type *func_type, instruction. It stems from cris_constraint, found in cris-dis.c. */ static int -constraint (unsigned int insn, const signed char *inst_args, +constraint (unsigned int insn, const char *inst_args, inst_env_type *inst_env) { int retval = 0; int tmp, i; - const char *s = inst_args; + const gdb_byte *s = (const gdb_byte *) inst_args; for (; *s; s++) switch (*s) @@ -2048,24 +1952,25 @@ find_cris_op (unsigned short insn, inst_env_type *inst_env) actually an internal error. */ static int -find_step_target (struct frame_info *frame, inst_env_type *inst_env) +find_step_target (struct regcache *regcache, inst_env_type *inst_env) { int i; int offset; unsigned short insn; - struct gdbarch *gdbarch = get_frame_arch (frame); + struct gdbarch *gdbarch = regcache->arch (); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); /* Create a local register image and set the initial state. */ for (i = 0; i < NUM_GENREGS; i++) { inst_env->reg[i] = - (unsigned long) get_frame_register_unsigned (frame, i); + (unsigned long) regcache_raw_get_unsigned (regcache, i); } offset = NUM_GENREGS; for (i = 0; i < NUM_SPECREGS; i++) { inst_env->preg[i] = - (unsigned long) get_frame_register_unsigned (frame, offset + i); + (unsigned long) regcache_raw_get_unsigned (regcache, offset + i); } inst_env->branch_found = 0; inst_env->slot_needed = 0; @@ -2074,13 +1979,14 @@ find_step_target (struct frame_info *frame, inst_env_type *inst_env) inst_env->invalid = 0; inst_env->xflag_found = 0; inst_env->disable_interrupt = 0; + inst_env->byte_order = byte_order; /* Look for a step target. */ do { /* Read an instruction from the client. */ insn = read_memory_unsigned_integer - (inst_env->reg[gdbarch_pc_regnum (gdbarch)], 2); + (inst_env->reg[gdbarch_pc_regnum (gdbarch)], 2, byte_order); /* If the instruction is not in a delay slot the new content of the PC is [PC] + 2. If the instruction is in a delay slot it is not @@ -2114,17 +2020,19 @@ find_step_target (struct frame_info *frame, inst_env_type *inst_env) } /* There is no hardware single-step support. The function find_step_target - digs through the opcodes in order to find all possible targets. + digs through the opcodes in order to find all possible targets. Either one ordinary target or two targets for branches may be found. */ -static int -cris_software_single_step (struct frame_info *frame) +static std::vector +cris_software_single_step (struct regcache *regcache) { + struct gdbarch *gdbarch = regcache->arch (); inst_env_type inst_env; + std::vector next_pcs; /* Analyse the present instruction environment and insert breakpoints. */ - int status = find_step_target (frame, &inst_env); + int status = find_step_target (regcache, &inst_env); if (status == -1) { /* Could not find a target. Things are likely to go downhill @@ -2135,19 +2043,21 @@ cris_software_single_step (struct frame_info *frame) { /* Insert at most two breakpoints. One for the next PC content and possibly another one for a branch, jump, etc. */ - CORE_ADDR next_pc = - (CORE_ADDR) inst_env.reg[gdbarch_pc_regnum (get_frame_arch (frame))]; - insert_single_step_breakpoint (next_pc); + CORE_ADDR next_pc + = (CORE_ADDR) inst_env.reg[gdbarch_pc_regnum (gdbarch)]; + + next_pcs.push_back (next_pc); if (inst_env.branch_found && (CORE_ADDR) inst_env.branch_break_address != next_pc) { CORE_ADDR branch_target_address = (CORE_ADDR) inst_env.branch_break_address; - insert_single_step_breakpoint (branch_target_address); + + next_pcs.push_back (branch_target_address); } } - return 1; + return next_pcs; } /* Calculates the prefix value for quick offset addressing mode. */ @@ -2208,7 +2118,8 @@ process_autoincrement (int size, unsigned short inst, inst_env_type *inst_env) /* Just a forward declaration. */ static unsigned long get_data_from_address (unsigned short *inst, - CORE_ADDR address); + CORE_ADDR address, + enum bfd_endian byte_order); /* Calculates the prefix value for the general case of offset addressing mode. */ @@ -2216,9 +2127,6 @@ static unsigned long get_data_from_address (unsigned short *inst, static void bdap_prefix (unsigned short inst, inst_env_type *inst_env) { - - long offset; - /* It's invalid to be in a delay slot. */ if (inst_env->slot_needed || inst_env->prefix_found) { @@ -2234,7 +2142,8 @@ bdap_prefix (unsigned short inst, inst_env_type *inst_env) /* The offset is an indirection of the contents of the operand1 register. */ inst_env->prefix_value += - get_data_from_address (&inst, inst_env->reg[cris_get_operand1 (inst)]); + get_data_from_address (&inst, inst_env->reg[cris_get_operand1 (inst)], + inst_env->byte_order); if (cris_get_mode (inst) == AUTOINC_MODE) { @@ -2300,7 +2209,8 @@ dip_prefix (unsigned short inst, inst_env_type *inst_env) /* The prefix value is one dereference of the contents of the operand1 register. */ address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)]; - inst_env->prefix_value = read_memory_unsigned_integer (address, 4); + inst_env->prefix_value + = read_memory_unsigned_integer (address, 4, inst_env->byte_order); /* Check if the mode is autoincrement. */ if (cris_get_mode (inst) == AUTOINC_MODE) @@ -2367,7 +2277,8 @@ sixteen_bit_offset_branch_op (unsigned short inst, inst_env_type *inst_env) } /* We have a branch, find out the offset for the branch. */ - offset = read_memory_integer (inst_env->reg[REG_PC], 2); + offset = read_memory_integer (inst_env->reg[REG_PC], 2, + inst_env->byte_order); /* The instruction is one word longer than normal, so add one word to the PC. */ @@ -2470,7 +2381,8 @@ asr_op (unsigned short inst, inst_env_type *inst_env) return; } /* Get the number of bits to shift. */ - shift_steps = cris_get_asr_shift_steps (inst_env->reg[cris_get_operand1 (inst)]); + shift_steps + = cris_get_asr_shift_steps (inst_env->reg[cris_get_operand1 (inst)]); value = inst_env->reg[REG_PC]; /* Find out how many bits the operation should apply to. */ @@ -2549,7 +2461,7 @@ asrq_op (unsigned short inst, inst_env_type *inst_env) return; } /* The shift size is given as a 5 bit quick value, i.e. we don't - want the the sign bit of the quick value. */ + want the sign bit of the quick value. */ shift_steps = cris_get_asr_shift_steps (inst); value = inst_env->reg[REG_PC]; if (value & SIGNED_DWORD_MASK) @@ -2873,16 +2785,17 @@ none_reg_mode_jump_op (unsigned short inst, inst_env_type *inst_env) { check_assign (inst, inst_env); - /* Get the new value for the the PC. */ + /* Get the new value for the PC. */ newpc = read_memory_unsigned_integer ((CORE_ADDR) inst_env->prefix_value, - 4); + 4, inst_env->byte_order); } else { /* Get the new value for the PC. */ address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)]; - newpc = read_memory_unsigned_integer (address, 4); + newpc = read_memory_unsigned_integer (address, + 4, inst_env->byte_order); /* Check if we should increment a register. */ if (cris_get_mode (inst) == AUTOINC_MODE) @@ -3057,7 +2970,8 @@ move_mem_to_reg_movem_op (unsigned short inst, inst_env_type *inst_env) if (cris_get_operand2 (inst) >= REG_PC) { inst_env->reg[REG_PC] = - read_memory_unsigned_integer (inst_env->prefix_value, 4); + read_memory_unsigned_integer (inst_env->prefix_value, + 4, inst_env->byte_order); } /* The assign value is the value after the increment. Normally, the assign value is the value before the increment. */ @@ -3081,11 +2995,12 @@ move_mem_to_reg_movem_op (unsigned short inst, inst_env_type *inst_env) } inst_env->reg[REG_PC] = read_memory_unsigned_integer (inst_env->reg[cris_get_operand1 (inst)], - 4); + 4, inst_env->byte_order); } /* The increment is not depending on the size, instead it's depending on the number of registers loaded from memory. */ - if ((cris_get_operand1 (inst) == REG_PC) && (cris_get_mode (inst) == AUTOINC_MODE)) + if ((cris_get_operand1 (inst) == REG_PC) + && (cris_get_mode (inst) == AUTOINC_MODE)) { /* It's invalid to change the PC in a delay slot. */ if (inst_env->slot_needed) @@ -3111,8 +3026,8 @@ move_reg_to_mem_movem_op (unsigned short inst, inst_env_type *inst_env) { /* The assign value is the value after the increment. Normally, the assign value is the value before the increment. */ - if ((cris_get_operand1 (inst) == REG_PC) && - (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)) + if ((cris_get_operand1 (inst) == REG_PC) + && (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)) { /* The prefix handles the problem if we are in a delay slot. */ inst_env->reg[REG_PC] = inst_env->prefix_value; @@ -3123,7 +3038,8 @@ move_reg_to_mem_movem_op (unsigned short inst, inst_env_type *inst_env) { /* The increment is not depending on the size, instead it's depending on the number of registers loaded to memory. */ - if ((cris_get_operand1 (inst) == REG_PC) && (cris_get_mode (inst) == AUTOINC_MODE)) + if ((cris_get_operand1 (inst) == REG_PC) + && (cris_get_mode (inst) == AUTOINC_MODE)) { /* It's invalid to change the PC in a delay slot. */ if (inst_env->slot_needed) @@ -3140,7 +3056,7 @@ move_reg_to_mem_movem_op (unsigned short inst, inst_env_type *inst_env) inst_env->disable_interrupt = 0; } -/* Handles the intructions that's not yet implemented, by setting +/* Handles the instructions that's not yet implemented, by setting inst_env->invalid to true. */ static void @@ -3226,7 +3142,7 @@ mulu_op (unsigned short inst, inst_env_type *inst_env) inst_env->disable_interrupt = 0; } -/* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE. +/* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE. The MOVE instruction is the move from source to register. */ static void @@ -3395,7 +3311,8 @@ reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst, extend instruction, the size field is changed in instruction. */ static unsigned long -get_data_from_address (unsigned short *inst, CORE_ADDR address) +get_data_from_address (unsigned short *inst, CORE_ADDR address, + enum bfd_endian byte_order) { int size = cris_get_size (*inst); unsigned long value; @@ -3409,7 +3326,7 @@ get_data_from_address (unsigned short *inst, CORE_ADDR address) /* Is there a need for checking the size? Size should contain the number of bytes to read. */ size = 1 << size; - value = read_memory_unsigned_integer (address, size); + value = read_memory_unsigned_integer (address, size, byte_order); /* Check if it's an extend, signed or zero instruction. */ if (cris_get_opcode (*inst) < 4) @@ -3435,7 +3352,8 @@ handle_prefix_assign_mode_for_aritm_op (unsigned short inst, operand2 = inst_env->reg[REG_PC]; /* Get the value of the third operand. */ - operand3 = get_data_from_address (&inst, inst_env->prefix_value); + operand3 = get_data_from_address (&inst, inst_env->prefix_value, + inst_env->byte_order); /* Calculate the PC value after the instruction, i.e. where the breakpoint should be. The order of the udw_operands is vital. */ @@ -3464,7 +3382,8 @@ three_operand_add_sub_cmp_and_or_op (unsigned short inst, operand2 = inst_env->reg[cris_get_operand2 (inst)]; /* Get the value of the third operand. */ - operand3 = get_data_from_address (&inst, inst_env->prefix_value); + operand3 = get_data_from_address (&inst, inst_env->prefix_value, + inst_env->byte_order); /* Calculate the PC value after the instruction, i.e. where the breakpoint should be. */ @@ -3516,7 +3435,7 @@ handle_inc_and_index_mode_for_aritm_op (unsigned short inst, unsigned long operand3; int size; - /* The instruction is either an indirect or autoincrement addressing mode. + /* The instruction is either an indirect or autoincrement addressing mode. Check if the destination register is the PC. */ if (cris_get_operand2 (inst) == REG_PC) { @@ -3527,7 +3446,7 @@ handle_inc_and_index_mode_for_aritm_op (unsigned short inst, /* Get the value of the third operand, i.e. the indirect operand. */ operand1 = inst_env->reg[cris_get_operand1 (inst)]; - operand3 = get_data_from_address (&inst, operand1); + operand3 = get_data_from_address (&inst, operand1, inst_env->byte_order); /* Calculate the PC value after the instruction, i.e. where the breakpoint should be. The order of the udw_operands is vital. */ @@ -3535,7 +3454,8 @@ handle_inc_and_index_mode_for_aritm_op (unsigned short inst, } /* If this is an autoincrement addressing mode, check if the increment changes the PC. */ - if ((cris_get_operand1 (inst) == REG_PC) && (cris_get_mode (inst) == AUTOINC_MODE)) + if ((cris_get_operand1 (inst) == REG_PC) + && (cris_get_mode (inst) == AUTOINC_MODE)) { /* Get the size field. */ size = cris_get_size (inst); @@ -3828,48 +3748,31 @@ cris_gdb_func (struct gdbarch *gdbarch, enum cris_op_type op_type, } } -/* This wrapper is to avoid cris_get_assembler being called before - exec_bfd has been set. */ - -static int -cris_delayed_get_disassembler (bfd_vma addr, struct disassemble_info *info) -{ - int (*print_insn) (bfd_vma addr, struct disassemble_info *info); - /* FIXME: cagney/2003-08-27: It should be possible to select a CRIS - disassembler, even when there is no BFD. Does something like - "gdb; target remote; disassmeble *0x123" work? */ - gdb_assert (exec_bfd != NULL); - print_insn = cris_get_disassembler (exec_bfd); - gdb_assert (print_insn != NULL); - return print_insn (addr, info); -} - -/* Copied from . */ -typedef unsigned long elf_greg_t; +/* Originally from . */ +typedef unsigned char cris_elf_greg_t[4]; /* Same as user_regs_struct struct in . */ #define CRISV10_ELF_NGREG 35 -typedef elf_greg_t elf_gregset_t[CRISV10_ELF_NGREG]; +typedef cris_elf_greg_t cris_elf_gregset_t[CRISV10_ELF_NGREG]; #define CRISV32_ELF_NGREG 32 -typedef elf_greg_t crisv32_elf_gregset_t[CRISV32_ELF_NGREG]; +typedef cris_elf_greg_t crisv32_elf_gregset_t[CRISV32_ELF_NGREG]; -/* Unpack an elf_gregset_t into GDB's register cache. */ +/* Unpack a cris_elf_gregset_t into GDB's register cache. */ static void -cris_supply_gregset (struct regcache *regcache, elf_gregset_t *gregsetp) +cris_supply_gregset (struct regcache *regcache, cris_elf_gregset_t *gregsetp) { - struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch *gdbarch = regcache->arch (); struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); int i; - elf_greg_t *regp = *gregsetp; - static char zerobuf[4] = {0}; + cris_elf_greg_t *regp = *gregsetp; /* The kernel dumps all 32 registers as unsigned longs, but supply_register knows about the actual size of each register so that's no problem. */ for (i = 0; i < NUM_GENREGS + NUM_SPECREGS; i++) { - regcache_raw_supply (regcache, i, (char *)®p[i]); + regcache->raw_supply (i, (char *)®p[i]); } if (tdep->cris_version == 32) @@ -3877,8 +3780,8 @@ cris_supply_gregset (struct regcache *regcache, elf_gregset_t *gregsetp) /* Needed to set pseudo-register PC for CRISv32. */ /* FIXME: If ERP is in a delay slot at this point then the PC will be wrong. Issue a warning to alert the user. */ - regcache_raw_supply (regcache, gdbarch_pc_regnum (gdbarch), - (char *)®p[ERP_REGNUM]); + regcache->raw_supply (gdbarch_pc_regnum (gdbarch), + (char *)®p[ERP_REGNUM]); if (*(char *)®p[ERP_REGNUM] & 0x1) fprintf_unfiltered (gdb_stderr, "Warning: PC in delay slot\n"); @@ -3893,12 +3796,12 @@ fetch_core_registers (struct regcache *regcache, char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) { - elf_gregset_t gregset; + cris_elf_gregset_t gregset; switch (which) { case 0: - if (core_reg_size != sizeof (elf_gregset_t) + if (core_reg_size != sizeof (cris_elf_gregset_t) && core_reg_size != sizeof (crisv32_elf_gregset_t)) { warning (_("wrong size gregset struct in core file")); @@ -3926,29 +3829,23 @@ static struct core_fns cris_elf_core_fns = NULL /* next */ }; -extern initialize_file_ftype _initialize_cris_tdep; /* -Wmissing-prototypes */ - void _initialize_cris_tdep (void) { - static struct cmd_list_element *cris_set_cmdlist; - static struct cmd_list_element *cris_show_cmdlist; - - struct cmd_list_element *c; - gdbarch_register (bfd_arch_cris, cris_gdbarch_init, cris_dump_tdep); /* CRIS-specific user-commands. */ - add_setshow_uinteger_cmd ("cris-version", class_support, - &usr_cmd_cris_version, - _("Set the current CRIS version."), - _("Show the current CRIS version."), - _("\ + add_setshow_zuinteger_cmd ("cris-version", class_support, + &usr_cmd_cris_version, + _("Set the current CRIS version."), + _("Show the current CRIS version."), + _("\ Set to 10 for CRISv10 or 32 for CRISv32 if autodetection fails.\n\ Defaults to 10. "), - set_cris_version, - NULL, /* FIXME: i18n: Current CRIS version is %s. */ - &setlist, &showlist); + set_cris_version, + NULL, /* FIXME: i18n: Current CRIS version + is %s. */ + &setlist, &showlist); add_setshow_enum_cmd ("cris-mode", class_support, cris_modes, &usr_cmd_cris_mode, @@ -3967,7 +3864,8 @@ Makes GDB use the NRP register instead of the ERP register in certain cases."), _("Show the usage of Dwarf-2 CFI for CRIS."), _("Set this to \"off\" if using gcc-cris < R59."), set_cris_dwarf2_cfi, - NULL, /* FIXME: i18n: Usage of Dwarf-2 CFI for CRIS is %d. */ + NULL, /* FIXME: i18n: Usage of Dwarf-2 CFI + for CRIS is %d. */ &setlist, &showlist); deprecated_add_core_fns (&cris_elf_core_fns); @@ -3991,7 +3889,7 @@ cris_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) } static void -set_cris_version (char *ignore_args, int from_tty, +set_cris_version (const char *ignore_args, int from_tty, struct cmd_list_element *c) { struct gdbarch_info info; @@ -4006,7 +3904,7 @@ set_cris_version (char *ignore_args, int from_tty, } static void -set_cris_mode (char *ignore_args, int from_tty, +set_cris_mode (const char *ignore_args, int from_tty, struct cmd_list_element *c) { struct gdbarch_info info; @@ -4019,7 +3917,7 @@ set_cris_mode (char *ignore_args, int from_tty, } static void -set_cris_dwarf2_cfi (char *ignore_args, int from_tty, +set_cris_dwarf2_cfi (const char *ignore_args, int from_tty, struct cmd_list_element *c) { struct gdbarch_info info; @@ -4036,7 +3934,7 @@ cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { struct gdbarch *gdbarch; struct gdbarch_tdep *tdep; - int cris_version; + unsigned int cris_version; if (usr_cmd_cris_version_valid) { @@ -4071,30 +3969,15 @@ cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) } /* No matching architecture was found. Create a new one. */ - tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); + tdep = XCNEW (struct gdbarch_tdep); + info.byte_order = BFD_ENDIAN_LITTLE; gdbarch = gdbarch_alloc (&info, tdep); tdep->cris_version = usr_cmd_cris_version; tdep->cris_mode = usr_cmd_cris_mode; tdep->cris_dwarf2_cfi = usr_cmd_cris_dwarf2_cfi; - /* INIT shall ensure that the INFO.BYTE_ORDER is non-zero. */ - switch (info.byte_order) - { - case BFD_ENDIAN_LITTLE: - /* Ok. */ - break; - - case BFD_ENDIAN_BIG: - internal_error (__FILE__, __LINE__, _("cris_gdbarch_init: big endian byte order in info")); - break; - - default: - internal_error (__FILE__, __LINE__, _("cris_gdbarch_init: unknown byte order in info")); - } - set_gdbarch_return_value (gdbarch, cris_return_value); - set_gdbarch_sp_regnum (gdbarch, 14); /* Length of ordinary registers used in push_word and a few other @@ -4119,9 +4002,7 @@ cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) case 8: case 9: /* Old versions; not supported. */ - internal_error (__FILE__, __LINE__, - _("cris_gdbarch_init: unsupported CRIS version")); - break; + return 0; case 10: case 11: @@ -4161,8 +4042,8 @@ cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) break; default: - internal_error (__FILE__, __LINE__, - _("cris_gdbarch_init: unknown CRIS version")); + /* Unknown version. */ + return 0; } /* Dummy frame functions (shared between CRISv10 and CRISv32 since they @@ -4175,12 +4056,9 @@ cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* The stack grows downward. */ set_gdbarch_inner_than (gdbarch, core_addr_lessthan); - set_gdbarch_breakpoint_from_pc (gdbarch, cris_breakpoint_from_pc); + set_gdbarch_breakpoint_kind_from_pc (gdbarch, cris_breakpoint_kind_from_pc); + set_gdbarch_sw_breakpoint_from_kind (gdbarch, cris_sw_breakpoint_from_kind); - set_gdbarch_unwind_pc (gdbarch, cris_unwind_pc); - set_gdbarch_unwind_sp (gdbarch, cris_unwind_sp); - set_gdbarch_dummy_id (gdbarch, cris_dummy_id); - if (tdep->cris_dwarf2_cfi == 1) { /* Hook in the Dwarf-2 frame sniffer. */ @@ -4197,13 +4075,8 @@ cris_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) frame_unwind_append_unwinder (gdbarch, &cris_frame_unwind); frame_base_set_default (gdbarch, &cris_frame_base); - set_solib_svr4_fetch_link_map_offsets - (gdbarch, svr4_ilp32_fetch_link_map_offsets); - - /* FIXME: cagney/2003-08-27: It should be possible to select a CRIS - disassembler, even when there is no BFD. Does something like - "gdb; target remote; disassmeble *0x123" work? */ - set_gdbarch_print_insn (gdbarch, cris_delayed_get_disassembler); + /* Hook in ABI-specific overrides, if they have been registered. */ + gdbarch_init_osabi (info, gdbarch); return gdbarch; }