X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Fd10v-tdep.c;h=8bb2aa5c6435f6032779fd982deb7900985b9712;hb=7d9b040b53ba0e94d46774491ec01dd919af6587;hp=c184b4457e79f15782e34a62bb06c752f240df55;hpb=0c92afe8cde4361ee019f661e94e34b363ba24e9;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/d10v-tdep.c b/gdb/d10v-tdep.c index c184b4457e..8bb2aa5c64 100644 --- a/gdb/d10v-tdep.c +++ b/gdb/d10v-tdep.c @@ -1,4 +1,4 @@ -/* Target-dependent code for Mitsubishi D10V, for GDB. +/* Target-dependent code for Renesas D10V, for GDB. Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. @@ -44,6 +44,7 @@ #include "gdb/sim-d10v.h" #include "sim-regno.h" #include "disasm.h" +#include "trad-frame.h" #include "gdb_assert.h" @@ -56,7 +57,7 @@ struct gdbarch_tdep }; /* These are the addresses the D10V-EVA board maps data and - instruction memory to. */ + instruction memory to. */ enum memspace { DMEM_START = 0x2000000, @@ -64,7 +65,7 @@ enum memspace { STACK_START = 0x200bffe }; -/* d10v register names. */ +/* d10v register names. */ enum { @@ -79,19 +80,18 @@ enum NR_A_REGS = 2, TS2_NUM_REGS = 37, TS3_NUM_REGS = 42, - /* d10v calling convention. */ + /* d10v calling convention. */ ARG1_REGNUM = R0_REGNUM, - ARGN_REGNUM = R3_REGNUM, - RET1_REGNUM = R0_REGNUM, + ARGN_REGNUM = R3_REGNUM }; -int +static int nr_dmap_regs (struct gdbarch *gdbarch) { return gdbarch_tdep (gdbarch)->nr_dmap_regs; } -int +static int a0_regnum (struct gdbarch *gdbarch) { return gdbarch_tdep (gdbarch)->a0_regnum; @@ -101,8 +101,6 @@ a0_regnum (struct gdbarch *gdbarch) extern void _initialize_d10v_tdep (void); -static CORE_ADDR d10v_read_sp (void); - static void d10v_eva_prepare_to_trace (void); static void d10v_eva_get_trace_data (void); @@ -115,44 +113,6 @@ d10v_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) return sp & ~3; } -/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of - EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc - and TYPE is the type (which is known to be struct, union or array). - - The d10v returns anything less than 8 bytes in size in - registers. */ - -static int -d10v_use_struct_convention (int gcc_p, struct type *type) -{ - long alignment; - int i; - /* The d10v only passes a struct in a register when that structure - has an alignment that matches the size of a register. */ - /* If the structure doesn't fit in 4 registers, put it on the - stack. */ - if (TYPE_LENGTH (type) > 8) - return 1; - /* If the struct contains only one field, don't put it on the stack - - gcc can fit it in one or more registers. */ - if (TYPE_NFIELDS (type) == 1) - return 0; - alignment = TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)); - for (i = 1; i < TYPE_NFIELDS (type); i++) - { - /* If the alignment changes, just assume it goes on the - stack. */ - if (TYPE_LENGTH (TYPE_FIELD_TYPE (type, i)) != alignment) - return 1; - } - /* If the alignment is suitable for the d10v's 16 bit registers, - don't put it on the stack. */ - if (alignment == 2 || alignment == 4) - return 0; - return 1; -} - - static const unsigned char * d10v_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) { @@ -163,7 +123,7 @@ d10v_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) } /* Map the REG_NR onto an ascii name. Return NULL or an empty string - when the reg_nr isn't valid. */ + when the reg_nr isn't valid. */ enum ts2_regnums { @@ -278,9 +238,9 @@ d10v_ts3_imap_register (void *regcache, int reg_nr) return reg; } -/* MAP GDB's internal register numbering (determined by the layout fo - the REGISTER_BYTE array) onto the simulator's register - numbering. */ +/* MAP GDB's internal register numbering (determined by the layout + from the DEPRECATED_REGISTER_BYTE array) onto the simulator's + register numbering. */ static int d10v_ts2_register_sim_regno (int nr) @@ -332,12 +292,6 @@ d10v_register_type (struct gdbarch *gdbarch, int reg_nr) return builtin_type_int16; } -static int -d10v_daddr_p (CORE_ADDR x) -{ - return (((x) & 0x3000000) == DMEM_START); -} - static int d10v_iaddr_p (CORE_ADDR x) { @@ -354,7 +308,7 @@ static CORE_ADDR d10v_make_iaddr (CORE_ADDR x) { if (d10v_iaddr_p (x)) - return x; /* Idempotency -- x is already in the IMEM space. */ + return x; /* Idempotency -- x is already in the IMEM space. */ else return (((x) << 2) | IMEM_START); } @@ -414,54 +368,88 @@ d10v_integer_to_address (struct type *type, void *buf) return val; } -/* Write into appropriate registers a function return value - of type TYPE, given in virtual format. - - Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */ +/* Handle the d10v's return_value convention. */ -static void -d10v_store_return_value (struct type *type, struct regcache *regcache, - const void *valbuf) +static enum return_value_convention +d10v_return_value (struct gdbarch *gdbarch, struct type *valtype, + struct regcache *regcache, void *readbuf, + const void *writebuf) { - /* Only char return values need to be shifted right within the first - regnum. */ - if (TYPE_LENGTH (type) == 1 - && TYPE_CODE (type) == TYPE_CODE_INT) + if (TYPE_LENGTH (valtype) > 8) + /* Anything larger than 8 bytes (4 registers) goes on the stack. */ + return RETURN_VALUE_STRUCT_CONVENTION; + if (TYPE_LENGTH (valtype) == 5 + || TYPE_LENGTH (valtype) == 6) + /* Anything 5 or 6 bytes in size goes in memory. Contents don't + appear to matter. Note that 7 and 8 byte objects do end up in + registers! */ + return RETURN_VALUE_STRUCT_CONVENTION; + if (TYPE_LENGTH (valtype) == 1) { - bfd_byte tmp[2]; - tmp[1] = *(bfd_byte *)valbuf; - regcache_cooked_write (regcache, RET1_REGNUM, tmp); + /* All single byte values go in a register stored right-aligned. + Note: 2 byte integer values are handled further down. */ + if (readbuf) + { + /* Since TYPE is smaller than the register, there isn't a + sign extension problem. Let the extraction truncate the + register value. */ + ULONGEST regval; + regcache_cooked_read_unsigned (regcache, R0_REGNUM, + ®val); + store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval); + + } + if (writebuf) + { + ULONGEST regval; + if (TYPE_CODE (valtype) == TYPE_CODE_INT) + /* Some sort of integer value stored in R0. Use + unpack_long since that should handle any required sign + extension. */ + regval = unpack_long (valtype, writebuf); + else + /* Some other type. Don't sign-extend the value when + storing it in the register. */ + regval = extract_unsigned_integer (writebuf, 1); + regcache_cooked_write_unsigned (regcache, R0_REGNUM, regval); + } + return RETURN_VALUE_REGISTER_CONVENTION; } - else + if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT + || TYPE_CODE (valtype) == TYPE_CODE_UNION) + && TYPE_NFIELDS (valtype) > 1 + && TYPE_FIELD_BITPOS (valtype, 1) == 8) + /* If a composite is 8 bit aligned (determined by looking at the + start address of the second field), put it in memory. */ + return RETURN_VALUE_STRUCT_CONVENTION; + /* Assume it is in registers. */ + if (writebuf || readbuf) { int reg; - /* A structure is never more than 8 bytes long. See - use_struct_convention(). */ - gdb_assert (TYPE_LENGTH (type) <= 8); - /* Write out most registers, stop loop before trying to write - out any dangling byte at the end of the buffer. */ - for (reg = 0; (reg * 2) + 1 < TYPE_LENGTH (type); reg++) + /* Per above, the value is never more than 8 bytes long. */ + gdb_assert (TYPE_LENGTH (valtype) <= 8); + /* Xfer 2 bytes at a time. */ + for (reg = 0; (reg * 2) + 1 < TYPE_LENGTH (valtype); reg++) { - regcache_cooked_write (regcache, RET1_REGNUM + reg, - (bfd_byte *) valbuf + reg * 2); + if (readbuf) + regcache_cooked_read (regcache, R0_REGNUM + reg, + (bfd_byte *) readbuf + reg * 2); + if (writebuf) + regcache_cooked_write (regcache, R0_REGNUM + reg, + (bfd_byte *) writebuf + reg * 2); + } + /* Any trailing byte ends up _left_ aligned. */ + if ((reg * 2) < TYPE_LENGTH (valtype)) + { + if (readbuf) + regcache_cooked_read_part (regcache, R0_REGNUM + reg, + 0, 1, (bfd_byte *) readbuf + reg * 2); + if (writebuf) + regcache_cooked_write_part (regcache, R0_REGNUM + reg, + 0, 1, (bfd_byte *) writebuf + reg * 2); } - /* Write out any dangling byte at the end of the buffer. */ - if ((reg * 2) + 1 == TYPE_LENGTH (type)) - regcache_cooked_write_part (regcache, reg, 0, 1, - (bfd_byte *) valbuf + reg * 2); } -} - -/* Extract from an array REGBUF containing the (raw) register state - the address in which a function should return its structure value, - as a CORE_ADDR (or an expression that can be used as one). */ - -static CORE_ADDR -d10v_extract_struct_value_address (struct regcache *regcache) -{ - ULONGEST addr; - regcache_cooked_read_unsigned (regcache, ARG1_REGNUM, &addr); - return (addr | DMEM_START); + return RETURN_VALUE_REGISTER_CONVENTION; } static int @@ -506,8 +494,8 @@ d10v_skip_prologue (CORE_ADDR pc) CORE_ADDR func_addr, func_end; struct symtab_and_line sal; - /* If we have line debugging information, then the end of the */ - /* prologue should the first assembly instruction of the first source line */ + /* If we have line debugging information, then the end of the prologue + should be the first assembly instruction of the first source line. */ if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) { sal = find_pc_line (func_addr, 0); @@ -516,7 +504,7 @@ d10v_skip_prologue (CORE_ADDR pc) } if (target_read_memory (pc, (char *) &op, 4)) - return pc; /* Can't access it -- assume no prologue. */ + return pc; /* Can't access it -- assume no prologue. */ while (1) { @@ -546,8 +534,9 @@ d10v_skip_prologue (CORE_ADDR pc) { if (!check_prologue (op2)) { - /* if the previous opcode was really part of the prologue */ - /* and not just a NOP, then we want to break after both instructions */ + /* If the previous opcode was really part of the + prologue and not just a NOP, then we want to + break after both instructions. */ if (op1 != 0x5E00) pc += 4; break; @@ -563,21 +552,20 @@ d10v_skip_prologue (CORE_ADDR pc) struct d10v_unwind_cache { - CORE_ADDR return_pc; /* The previous frame's inner most stack address. Used as this frame ID's stack_addr. */ CORE_ADDR prev_sp; /* The frame's base, optionally used by the high-level debug info. */ CORE_ADDR base; int size; - CORE_ADDR *saved_regs; /* How far the SP and r11 (FP) have been offset from the start of the stack frame (as defined by the previous frame's stack pointer). */ LONGEST sp_offset; LONGEST r11_offset; int uses_frame; - void **regs; + /* Table indicating the location of each and every register. */ + struct trad_frame_saved_reg *saved_regs; }; static int @@ -591,7 +579,7 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, { n = (op & 0x1E0) >> 5; info->sp_offset -= 2; - info->saved_regs[n] = info->sp_offset; + info->saved_regs[n].addr = info->sp_offset; return 1; } @@ -600,8 +588,8 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, { n = (op & 0x1E0) >> 5; info->sp_offset -= 4; - info->saved_regs[n] = info->sp_offset; - info->saved_regs[n + 1] = info->sp_offset + 2; + info->saved_regs[n + 0].addr = info->sp_offset + 0; + info->saved_regs[n + 1].addr = info->sp_offset + 2; return 1; } @@ -627,7 +615,7 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, if ((op & 0x7E1F) == 0x6816) { n = (op & 0x1E0) >> 5; - info->saved_regs[n] = info->r11_offset; + info->saved_regs[n].addr = info->r11_offset; return 1; } @@ -639,7 +627,7 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, if ((op & 0x7E1F) == 0x681E) { n = (op & 0x1E0) >> 5; - info->saved_regs[n] = info->sp_offset; + info->saved_regs[n].addr = info->sp_offset; return 1; } @@ -647,8 +635,8 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, if ((op & 0x7E3F) == 0x3A1E) { n = (op & 0x1E0) >> 5; - info->saved_regs[n] = info->sp_offset; - info->saved_regs[n + 1] = info->sp_offset + 2; + info->saved_regs[n + 0].addr = info->sp_offset + 0; + info->saved_regs[n + 1].addr = info->sp_offset + 2; return 1; } @@ -659,12 +647,13 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, the saved registers of frame described by FRAME_INFO. This includes special registers such as pc and fp saved in special ways in the stack frame. sp is even more special: the address we return - for it IS the sp for the next frame. */ + for it IS the sp for the next frame. */ -struct d10v_unwind_cache * +static struct d10v_unwind_cache * d10v_frame_unwind_cache (struct frame_info *next_frame, void **this_prologue_cache) { + struct gdbarch *gdbarch = get_frame_arch (next_frame); CORE_ADDR pc; ULONGEST prev_sp; ULONGEST this_base; @@ -678,10 +667,9 @@ d10v_frame_unwind_cache (struct frame_info *next_frame, info = FRAME_OBSTACK_ZALLOC (struct d10v_unwind_cache); (*this_prologue_cache) = info; - info->saved_regs = FRAME_OBSTACK_CALLOC (NUM_REGS, CORE_ADDR); + info->saved_regs = trad_frame_alloc_saved_regs (next_frame); info->size = 0; - info->return_pc = 0; info->sp_offset = 0; info->uses_frame = 0; @@ -689,7 +677,7 @@ d10v_frame_unwind_cache (struct frame_info *next_frame, pc > 0 && pc < frame_pc_unwind (next_frame); pc += 4) { - op = (unsigned long) read_memory_integer (pc, 4); + op = get_frame_memory_unsigned (next_frame, pc, 4); if ((op & 0xC0000000) == 0xC0000000) { /* long instruction */ @@ -704,15 +692,15 @@ d10v_frame_unwind_cache (struct frame_info *next_frame, /* st rn, @(offset,sp) */ short offset = op & 0xFFFF; short n = (op >> 20) & 0xF; - info->saved_regs[n] = info->sp_offset + offset; + info->saved_regs[n].addr = info->sp_offset + offset; } else if ((op & 0x3F1F0000) == 0x350F0000) { /* st2w rn, @(offset,sp) */ short offset = op & 0xFFFF; short n = (op >> 20) & 0xF; - info->saved_regs[n] = info->sp_offset + offset; - info->saved_regs[n + 1] = info->sp_offset + offset + 2; + info->saved_regs[n + 0].addr = info->sp_offset + offset + 0; + info->saved_regs[n + 1].addr = info->sp_offset + offset + 2; } else break; @@ -738,7 +726,8 @@ d10v_frame_unwind_cache (struct frame_info *next_frame, info->size = -info->sp_offset; - /* Compute the frame's base, and the previous frame's SP. */ + /* Compute the previous frame's stack pointer (which is also the + frame's ID's stack address), and this frame's base pointer. */ if (info->uses_frame) { /* The SP was moved to the FP. This indicates that a new frame @@ -749,15 +738,6 @@ d10v_frame_unwind_cache (struct frame_info *next_frame, to before the first saved register giving the SP. */ prev_sp = this_base + info->size; } - else if (info->saved_regs[D10V_SP_REGNUM]) - { - /* The SP was saved (which is very unusual), the frame base is - just the PREV's frame's TOP-OF-STACK. */ - this_base = read_memory_unsigned_integer (info->saved_regs[D10V_SP_REGNUM], - register_size (current_gdbarch, - D10V_SP_REGNUM)); - prev_sp = this_base; - } else { /* Assume that the FP is this frame's SP but with that pushed @@ -766,34 +746,28 @@ d10v_frame_unwind_cache (struct frame_info *next_frame, prev_sp = this_base + info->size; } + /* Convert that SP/BASE into real addresses. */ + info->prev_sp = d10v_make_daddr (prev_sp); info->base = d10v_make_daddr (this_base); - info->prev_sp = d10v_make_daddr (prev_sp); /* Adjust all the saved registers so that they contain addresses and not offsets. */ for (i = 0; i < NUM_REGS - 1; i++) - if (info->saved_regs[i]) + if (trad_frame_addr_p (info->saved_regs, i)) { - info->saved_regs[i] = (info->prev_sp + info->saved_regs[i]); + info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr); } - if (info->saved_regs[LR_REGNUM]) - { - CORE_ADDR return_pc - = read_memory_unsigned_integer (info->saved_regs[LR_REGNUM], - register_size (current_gdbarch, LR_REGNUM)); - info->return_pc = d10v_make_iaddr (return_pc); - } - else - { - ULONGEST return_pc; - frame_unwind_unsigned_register (next_frame, LR_REGNUM, &return_pc); - info->return_pc = d10v_make_iaddr (return_pc); - } + /* The call instruction moves the caller's PC in the callee's LR. + Since this is an unwind, do the reverse. Copy the location of LR + into PC (the address / regnum) so that a request for PC will be + converted into a request for the LR. */ + info->saved_regs[D10V_PC_REGNUM] = info->saved_regs[LR_REGNUM]; - /* The D10V_SP_REGNUM is special. Instead of the address of the SP, the - previous frame's SP value is saved. */ - info->saved_regs[D10V_SP_REGNUM] = info->prev_sp; + /* The previous frame's SP needed to be computed. Save the computed + value. */ + trad_frame_set_value (info->saved_regs, D10V_SP_REGNUM, + d10v_make_daddr (prev_sp)); return info; } @@ -811,11 +785,11 @@ d10v_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, { ULONGEST pc, psw, rpt_s, rpt_e, rpt_c; - frame_read_unsigned_register (frame, D10V_PC_REGNUM, &pc); - frame_read_unsigned_register (frame, PSW_REGNUM, &psw); - frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_s", -1), &rpt_s); - frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_e", -1), &rpt_e); - frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_c", -1), &rpt_c); + pc = get_frame_register_unsigned (frame, D10V_PC_REGNUM); + psw = get_frame_register_unsigned (frame, PSW_REGNUM); + rpt_s = get_frame_register_unsigned (frame, frame_map_name_to_regnum (frame, "rpt_s", -1)); + rpt_e = get_frame_register_unsigned (frame, frame_map_name_to_regnum (frame, "rpt_e", -1)); + rpt_c = get_frame_register_unsigned (frame, frame_map_name_to_regnum (frame, "rpt_c", -1)); fprintf_filtered (file, "PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n", (long) pc, (long) d10v_make_iaddr (pc), (long) psw, (long) rpt_s, (long) rpt_e, (long) rpt_c); @@ -830,7 +804,7 @@ d10v_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, for (r = group; r < group + 8; r++) { ULONGEST tmp; - frame_read_unsigned_register (frame, r, &tmp); + tmp = get_frame_register_unsigned (frame, r); fprintf_filtered (file, " %04lx", (long) tmp); } fprintf_filtered (file, "\n"); @@ -872,8 +846,8 @@ d10v_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, { int i; fprintf_filtered (file, " "); - frame_read_register (frame, a, num); - for (i = 0; i < register_size (current_gdbarch, a); i++) + get_frame_register (frame, a, num); + for (i = 0; i < register_size (gdbarch, a); i++) { fprintf_filtered (file, "%02x", (num[i] & 0xff)); } @@ -916,13 +890,15 @@ d10v_write_pc (CORE_ADDR val, ptid_t ptid) } static CORE_ADDR -d10v_read_sp (void) +d10v_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) { - return (d10v_make_daddr (read_register (D10V_SP_REGNUM))); + ULONGEST sp; + frame_unwind_unsigned_register (next_frame, D10V_SP_REGNUM, &sp); + return d10v_make_daddr (sp); } /* When arguments must be pushed onto the stack, they go on in reverse - order. The below implements a FILO (stack) to do this. */ + order. The below implements a FILO (stack) to do this. */ struct stack_item { @@ -977,9 +953,10 @@ d10v_push_dummy_code (struct gdbarch *gdbarch, } static CORE_ADDR -d10v_push_dummy_call (struct gdbarch *gdbarch, struct regcache *regcache, - CORE_ADDR dummy_addr, int nargs, struct value **args, - CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr) +d10v_push_dummy_call (struct gdbarch *gdbarch, struct value *function, + struct regcache *regcache, CORE_ADDR bp_addr, + int nargs, struct value **args, CORE_ADDR sp, + int struct_return, CORE_ADDR struct_addr) { int i; int regnum = ARG1_REGNUM; @@ -987,9 +964,9 @@ d10v_push_dummy_call (struct gdbarch *gdbarch, struct regcache *regcache, long val; /* Set the return address. For the d10v, the return breakpoint is - always at DUMMY_ADDR. */ + always at BP_ADDR. */ regcache_cooked_write_unsigned (regcache, LR_REGNUM, - d10v_convert_iaddr_to_raw (dummy_addr)); + d10v_convert_iaddr_to_raw (bp_addr)); /* If STRUCT_RETURN is true, then the struct return address (in STRUCT_ADDR) will consume the first argument-passing register. @@ -1055,51 +1032,11 @@ d10v_push_dummy_call (struct gdbarch *gdbarch, struct regcache *regcache, return sp; } - -/* Given a return value in `regbuf' with a type `valtype', - extract and copy its value into `valbuf'. */ - -static void -d10v_extract_return_value (struct type *type, struct regcache *regcache, - void *valbuf) -{ - int len; - if (TYPE_LENGTH (type) == 1) - { - ULONGEST c; - regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &c); - store_unsigned_integer (valbuf, 1, c); - } - else - { - /* For return values of odd size, the first byte is in the - least significant part of the first register. The - remaining bytes in remaining registers. Interestingly, when - such values are passed in, the last byte is in the most - significant byte of that same register - wierd. */ - int reg = RET1_REGNUM; - int off = 0; - if (TYPE_LENGTH (type) & 1) - { - regcache_cooked_read_part (regcache, RET1_REGNUM, 1, 1, - (bfd_byte *)valbuf + off); - off++; - reg++; - } - /* Transfer the remaining registers. */ - for (; off < TYPE_LENGTH (type); reg++, off += 2) - { - regcache_cooked_read (regcache, RET1_REGNUM + reg, - (bfd_byte *) valbuf + off); - } - } -} - /* Translate a GDB virtual ADDR/LEN into a format the remote target understands. Returns number of bytes that can be transfered starting at TARG_ADDR. Return ZERO if no bytes can be transfered (segmentation fault). Since the simulator knows all about how the - VM system works, we just call that to do the translation. */ + VM system works, we just call that to do the translation. */ static void remote_d10v_translate_xfer_address (struct gdbarch *gdbarch, @@ -1326,7 +1263,8 @@ tdisassemble_command (char *arg, int from_tty) } } - printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low), paddr_u (high)); + printf_filtered ("Dump of trace from %s to %s:\n", + paddr_u (low), paddr_u (high)); display_trace (low, high); @@ -1416,11 +1354,6 @@ d10v_frame_this_id (struct frame_info *next_frame, /* The FUNC is easy. */ func = frame_func_unwind (next_frame); - /* This is meant to halt the backtrace at "_start". Make sure we - don't halt it at a generic dummy frame. */ - if (func <= IMEM_START || inside_entry_file (func)) - return; - /* Hopefully the prologue analysis either correctly determined the frame's base (which is the SP from the previous frame), or set that base to "NULL". */ @@ -1430,66 +1363,9 @@ d10v_frame_this_id (struct frame_info *next_frame, id = frame_id_build (base, func); - /* Check that we're not going round in circles with the same frame - ID (but avoid applying the test to sentinel frames which do go - round in circles). Can't use frame_id_eq() as that doesn't yet - compare the frame's PC value. */ - if (frame_relative_level (next_frame) >= 0 - && get_frame_type (next_frame) != DUMMY_FRAME - && frame_id_eq (get_frame_id (next_frame), id)) - return; - (*this_id) = id; } -static void -saved_regs_unwinder (struct frame_info *next_frame, - CORE_ADDR *this_saved_regs, - int regnum, int *optimizedp, - enum lval_type *lvalp, CORE_ADDR *addrp, - int *realnump, void *bufferp) -{ - if (this_saved_regs[regnum] != 0) - { - if (regnum == D10V_SP_REGNUM) - { - /* SP register treated specially. */ - *optimizedp = 0; - *lvalp = not_lval; - *addrp = 0; - *realnump = -1; - if (bufferp != NULL) - store_unsigned_integer (bufferp, - register_size (current_gdbarch, regnum), - this_saved_regs[regnum]); - } - else - { - /* Any other register is saved in memory, fetch it but cache - a local copy of its value. */ - *optimizedp = 0; - *lvalp = lval_memory; - *addrp = this_saved_regs[regnum]; - *realnump = -1; - if (bufferp != NULL) - { - /* Read the value in from memory. */ - read_memory (this_saved_regs[regnum], bufferp, - register_size (current_gdbarch, regnum)); - } - } - return; - } - - /* No luck, assume this and the next frame have the same register - value. If a value is needed, pass the request on down the chain; - otherwise just return an indication that the value is in the same - register as the next frame. */ - frame_register_unwind (next_frame, regnum, optimizedp, lvalp, addrp, - realnump, bufferp); -} - - static void d10v_frame_prev_register (struct frame_info *next_frame, void **this_prologue_cache, @@ -1499,19 +1375,8 @@ d10v_frame_prev_register (struct frame_info *next_frame, { struct d10v_unwind_cache *info = d10v_frame_unwind_cache (next_frame, this_prologue_cache); - if (regnum == D10V_PC_REGNUM) - { - /* The call instruction saves the caller's PC in LR. The - function prologue of the callee may then save the LR on the - stack. Find that possibly saved LR value and return it. */ - saved_regs_unwinder (next_frame, info->saved_regs, LR_REGNUM, optimizedp, - lvalp, addrp, realnump, bufferp); - } - else - { - saved_regs_unwinder (next_frame, info->saved_regs, regnum, optimizedp, - lvalp, addrp, realnump, bufferp); - } + trad_frame_prev_register (next_frame, info->saved_regs, regnum, + optimizedp, lvalp, addrp, realnump, bufferp); } static const struct frame_unwind d10v_frame_unwind = { @@ -1520,8 +1385,8 @@ static const struct frame_unwind d10v_frame_unwind = { d10v_frame_prev_register }; -const struct frame_unwind * -d10v_frame_p (CORE_ADDR pc) +static const struct frame_unwind * +d10v_frame_sniffer (struct frame_info *next_frame) { return &d10v_frame_unwind; } @@ -1549,9 +1414,8 @@ static const struct frame_base d10v_frame_base = { static struct frame_id d10v_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) { - ULONGEST base; - frame_unwind_unsigned_register (next_frame, D10V_SP_REGNUM, &base); - return frame_id_build (d10v_make_daddr (base), frame_pc_unwind (next_frame)); + return frame_id_build (d10v_unwind_sp (gdbarch, next_frame), + frame_pc_unwind (next_frame)); } static gdbarch_init_ftype d10v_gdbarch_init; @@ -1565,13 +1429,13 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) gdbarch_register_name_ftype *d10v_register_name; gdbarch_register_sim_regno_ftype *d10v_register_sim_regno; - /* Find a candidate among the list of pre-declared architectures. */ + /* Find a candidate among the list of pre-declared architectures. */ arches = gdbarch_list_lookup_by_info (arches, &info); if (arches != NULL) return arches->gdbarch; /* None found, create a new architecture from the information - provided. */ + provided. */ tdep = XMALLOC (struct gdbarch_tdep); gdbarch = gdbarch_alloc (&info, tdep); @@ -1600,7 +1464,7 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_read_pc (gdbarch, d10v_read_pc); set_gdbarch_write_pc (gdbarch, d10v_write_pc); - set_gdbarch_read_sp (gdbarch, d10v_read_sp); + set_gdbarch_unwind_sp (gdbarch, d10v_unwind_sp); set_gdbarch_num_regs (gdbarch, d10v_num_regs); set_gdbarch_sp_regnum (gdbarch, D10V_SP_REGNUM); @@ -1617,7 +1481,7 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long - double'' is 64 bits. */ + double'' is 64 bits. */ set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); @@ -1631,44 +1495,39 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) case BFD_ENDIAN_LITTLE: set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little); set_gdbarch_double_format (gdbarch, &floatformat_ieee_single_little); - set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_double_little); + set_gdbarch_long_double_format (gdbarch, + &floatformat_ieee_double_little); break; default: internal_error (__FILE__, __LINE__, "d10v_gdbarch_init: bad byte order for float format"); } - set_gdbarch_extract_return_value (gdbarch, d10v_extract_return_value); + set_gdbarch_return_value (gdbarch, d10v_return_value); set_gdbarch_push_dummy_code (gdbarch, d10v_push_dummy_code); set_gdbarch_push_dummy_call (gdbarch, d10v_push_dummy_call); - set_gdbarch_store_return_value (gdbarch, d10v_store_return_value); - set_gdbarch_extract_struct_value_address (gdbarch, d10v_extract_struct_value_address); - set_gdbarch_use_struct_convention (gdbarch, d10v_use_struct_convention); set_gdbarch_skip_prologue (gdbarch, d10v_skip_prologue); set_gdbarch_inner_than (gdbarch, core_addr_lessthan); set_gdbarch_decr_pc_after_break (gdbarch, 4); - set_gdbarch_function_start_offset (gdbarch, 0); set_gdbarch_breakpoint_from_pc (gdbarch, d10v_breakpoint_from_pc); - set_gdbarch_remote_translate_xfer_address (gdbarch, remote_d10v_translate_xfer_address); - - set_gdbarch_frame_args_skip (gdbarch, 0); - set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue); + set_gdbarch_remote_translate_xfer_address (gdbarch, + remote_d10v_translate_xfer_address); - set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); set_gdbarch_frame_align (gdbarch, d10v_frame_align); set_gdbarch_register_sim_regno (gdbarch, d10v_register_sim_regno); set_gdbarch_print_registers_info (gdbarch, d10v_print_registers_info); - frame_unwind_append_predicate (gdbarch, d10v_frame_p); + frame_unwind_append_sniffer (gdbarch, d10v_frame_sniffer); frame_base_set_default (gdbarch, &d10v_frame_base); - /* Methods for saving / extracting a dummy frame's ID. */ + /* Methods for saving / extracting a dummy frame's ID. The ID's + stack address must match the SP value returned by + PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ set_gdbarch_unwind_dummy_id (gdbarch, d10v_unwind_dummy_id); - set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); /* Return the unwound PC value. */ set_gdbarch_unwind_pc (gdbarch, d10v_unwind_pc); @@ -1683,10 +1542,11 @@ _initialize_d10v_tdep (void) { register_gdbarch_init (bfd_arch_d10v, d10v_gdbarch_init); - target_resume_hook = d10v_eva_prepare_to_trace; - target_wait_loop_hook = d10v_eva_get_trace_data; + deprecated_target_resume_hook = d10v_eva_prepare_to_trace; + deprecated_target_wait_loop_hook = d10v_eva_get_trace_data; - deprecate_cmd (add_com ("regs", class_vars, show_regs, "Print all registers"), + deprecate_cmd (add_com ("regs", class_vars, show_regs, + "Print all registers"), "info registers"); add_com ("itrace", class_support, trace_command,