X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Fd10v-tdep.c;h=b0da9bee9c0be2f55635e8d42a51afd1e399150f;hb=aa8698122b7460cede3dc17abe499fd77ef10883;hp=addf9caee9683b8f2b5ee5119bd98902b7340604;hpb=a0ed55327d141094e07c8cdb3ac6f877109d917c;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/d10v-tdep.c b/gdb/d10v-tdep.c index addf9caee9..b0da9bee9c 100644 --- a/gdb/d10v-tdep.c +++ b/gdb/d10v-tdep.c @@ -1,4 +1,4 @@ -/* Target-dependent code for Mitsubishi D10V, for GDB. +/* Target-dependent code for Renesas D10V, for GDB. Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. @@ -25,6 +25,7 @@ #include "defs.h" #include "frame.h" #include "frame-unwind.h" +#include "frame-base.h" #include "symtab.h" #include "gdbtypes.h" #include "gdbcmd.h" @@ -38,30 +39,25 @@ #include "language.h" #include "arch-utils.h" #include "regcache.h" - +#include "remote.h" #include "floatformat.h" #include "gdb/sim-d10v.h" #include "sim-regno.h" +#include "disasm.h" +#include "trad-frame.h" #include "gdb_assert.h" -struct frame_extra_info - { - CORE_ADDR return_pc; - int frameless; - int size; - }; - struct gdbarch_tdep { int a0_regnum; int nr_dmap_regs; - unsigned long (*dmap_register) (int nr); - unsigned long (*imap_register) (int nr); + unsigned long (*dmap_register) (void *regcache, int nr); + unsigned long (*imap_register) (void *regcache, int nr); }; /* These are the addresses the D10V-EVA board maps data and - instruction memory to. */ + instruction memory to. */ enum memspace { DMEM_START = 0x2000000, @@ -69,86 +65,54 @@ enum memspace { STACK_START = 0x200bffe }; -/* d10v register names. */ +/* d10v register names. */ enum { R0_REGNUM = 0, R3_REGNUM = 3, - _FP_REGNUM = 11, + D10V_FP_REGNUM = 11, LR_REGNUM = 13, - _SP_REGNUM = 15, + D10V_SP_REGNUM = 15, PSW_REGNUM = 16, - _PC_REGNUM = 18, + D10V_PC_REGNUM = 18, NR_IMAP_REGS = 2, NR_A_REGS = 2, TS2_NUM_REGS = 37, TS3_NUM_REGS = 42, - /* d10v calling convention. */ + /* d10v calling convention. */ ARG1_REGNUM = R0_REGNUM, - ARGN_REGNUM = R3_REGNUM, - RET1_REGNUM = R0_REGNUM, + ARGN_REGNUM = R3_REGNUM }; -#define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs) -#define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum) +static int +nr_dmap_regs (struct gdbarch *gdbarch) +{ + return gdbarch_tdep (gdbarch)->nr_dmap_regs; +} + +static int +a0_regnum (struct gdbarch *gdbarch) +{ + return gdbarch_tdep (gdbarch)->a0_regnum; +} /* Local functions */ extern void _initialize_d10v_tdep (void); -static CORE_ADDR d10v_read_sp (void); - -static CORE_ADDR d10v_read_fp (void); - static void d10v_eva_prepare_to_trace (void); static void d10v_eva_get_trace_data (void); static CORE_ADDR -d10v_stack_align (CORE_ADDR len) +d10v_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) { - return (len + 1) & ~1; + /* Align to the size of an instruction (so that they can safely be + pushed onto the stack. */ + return sp & ~3; } -/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of - EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc - and TYPE is the type (which is known to be struct, union or array). - - The d10v returns anything less than 8 bytes in size in - registers. */ - -static int -d10v_use_struct_convention (int gcc_p, struct type *type) -{ - long alignment; - int i; - /* The d10v only passes a struct in a register when that structure - has an alignment that matches the size of a register. */ - /* If the structure doesn't fit in 4 registers, put it on the - stack. */ - if (TYPE_LENGTH (type) > 8) - return 1; - /* If the struct contains only one field, don't put it on the stack - - gcc can fit it in one or more registers. */ - if (TYPE_NFIELDS (type) == 1) - return 0; - alignment = TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)); - for (i = 1; i < TYPE_NFIELDS (type); i++) - { - /* If the alignment changes, just assume it goes on the - stack. */ - if (TYPE_LENGTH (TYPE_FIELD_TYPE (type, i)) != alignment) - return 1; - } - /* If the alignment is suitable for the d10v's 16 bit registers, - don't put it on the stack. */ - if (alignment == 2 || alignment == 4) - return 0; - return 1; -} - - static const unsigned char * d10v_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) { @@ -159,7 +123,7 @@ d10v_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) } /* Map the REG_NR onto an ascii name. Return NULL or an empty string - when the reg_nr isn't valid. */ + when the reg_nr isn't valid. */ enum ts2_regnums { @@ -232,7 +196,7 @@ d10v_ts3_register_name (int reg_nr) one of the segments. */ static unsigned long -d10v_ts2_dmap_register (int reg_nr) +d10v_ts2_dmap_register (void *regcache, int reg_nr) { switch (reg_nr) { @@ -240,51 +204,49 @@ d10v_ts2_dmap_register (int reg_nr) case 1: return 0x2000; case 2: - return read_register (TS2_DMAP_REGNUM); + { + ULONGEST reg; + regcache_cooked_read_unsigned (regcache, TS2_DMAP_REGNUM, ®); + return reg; + } default: return 0; } } static unsigned long -d10v_ts3_dmap_register (int reg_nr) +d10v_ts3_dmap_register (void *regcache, int reg_nr) { - return read_register (TS3_DMAP0_REGNUM + reg_nr); + ULONGEST reg; + regcache_cooked_read_unsigned (regcache, TS3_DMAP0_REGNUM + reg_nr, ®); + return reg; } static unsigned long -d10v_dmap_register (int reg_nr) +d10v_ts2_imap_register (void *regcache, int reg_nr) { - return gdbarch_tdep (current_gdbarch)->dmap_register (reg_nr); + ULONGEST reg; + regcache_cooked_read_unsigned (regcache, TS2_IMAP0_REGNUM + reg_nr, ®); + return reg; } static unsigned long -d10v_ts2_imap_register (int reg_nr) +d10v_ts3_imap_register (void *regcache, int reg_nr) { - return read_register (TS2_IMAP0_REGNUM + reg_nr); + ULONGEST reg; + regcache_cooked_read_unsigned (regcache, TS3_IMAP0_REGNUM + reg_nr, ®); + return reg; } -static unsigned long -d10v_ts3_imap_register (int reg_nr) -{ - return read_register (TS3_IMAP0_REGNUM + reg_nr); -} - -static unsigned long -d10v_imap_register (int reg_nr) -{ - return gdbarch_tdep (current_gdbarch)->imap_register (reg_nr); -} - -/* MAP GDB's internal register numbering (determined by the layout fo - the REGISTER_BYTE array) onto the simulator's register - numbering. */ +/* MAP GDB's internal register numbering (determined by the layout + from the DEPRECATED_REGISTER_BYTE array) onto the simulator's + register numbering. */ static int d10v_ts2_register_sim_regno (int nr) { - if (legacy_register_sim_regno (nr) < 0) - return legacy_register_sim_regno (nr); + /* Only makes sense to supply raw registers. */ + gdb_assert (nr >= 0 && nr < NUM_REGS); if (nr >= TS2_IMAP0_REGNUM && nr < TS2_IMAP0_REGNUM + NR_IMAP_REGS) return nr - TS2_IMAP0_REGNUM + SIM_D10V_IMAP0_REGNUM; @@ -299,8 +261,8 @@ d10v_ts2_register_sim_regno (int nr) static int d10v_ts3_register_sim_regno (int nr) { - if (legacy_register_sim_regno (nr) < 0) - return legacy_register_sim_regno (nr); + /* Only makes sense to supply raw registers. */ + gdb_assert (nr >= 0 && nr < NUM_REGS); if (nr >= TS3_IMAP0_REGNUM && nr < TS3_IMAP0_REGNUM + NR_IMAP_REGS) return nr - TS3_IMAP0_REGNUM + SIM_D10V_IMAP0_REGNUM; @@ -313,60 +275,23 @@ d10v_ts3_register_sim_regno (int nr) return nr; } -/* Index within `registers' of the first byte of the space for - register REG_NR. */ - -static int -d10v_register_byte (int reg_nr) -{ - if (reg_nr < A0_REGNUM) - return (reg_nr * 2); - else if (reg_nr < (A0_REGNUM + NR_A_REGS)) - return (A0_REGNUM * 2 - + (reg_nr - A0_REGNUM) * 8); - else - return (A0_REGNUM * 2 - + NR_A_REGS * 8 - + (reg_nr - A0_REGNUM - NR_A_REGS) * 2); -} - -/* Number of bytes of storage in the actual machine representation for - register REG_NR. */ - -static int -d10v_register_raw_size (int reg_nr) -{ - if (reg_nr < A0_REGNUM) - return 2; - else if (reg_nr < (A0_REGNUM + NR_A_REGS)) - return 8; - else - return 2; -} - /* Return the GDB type object for the "standard" data type of data in register N. */ static struct type * d10v_register_type (struct gdbarch *gdbarch, int reg_nr) { - if (reg_nr == PC_REGNUM) - return builtin_type_void_func_ptr; - if (reg_nr == _SP_REGNUM || reg_nr == _FP_REGNUM) - return builtin_type_void_data_ptr; - else if (reg_nr >= A0_REGNUM - && reg_nr < (A0_REGNUM + NR_A_REGS)) + if (reg_nr == D10V_PC_REGNUM) + return builtin_type (gdbarch)->builtin_func_ptr; + if (reg_nr == D10V_SP_REGNUM || reg_nr == D10V_FP_REGNUM) + return builtin_type (gdbarch)->builtin_data_ptr; + else if (reg_nr >= a0_regnum (gdbarch) + && reg_nr < (a0_regnum (gdbarch) + NR_A_REGS)) return builtin_type_int64; else return builtin_type_int16; } -static int -d10v_daddr_p (CORE_ADDR x) -{ - return (((x) & 0x3000000) == DMEM_START); -} - static int d10v_iaddr_p (CORE_ADDR x) { @@ -383,7 +308,7 @@ static CORE_ADDR d10v_make_iaddr (CORE_ADDR x) { if (d10v_iaddr_p (x)) - return x; /* Idempotency -- x is already in the IMEM space. */ + return x; /* Idempotency -- x is already in the IMEM space. */ else return (((x) << 2) | IMEM_START); } @@ -421,8 +346,7 @@ d10v_address_to_pointer (struct type *type, void *buf, CORE_ADDR addr) static CORE_ADDR d10v_pointer_to_address (struct type *type, const void *buf) { - CORE_ADDR addr = extract_address (buf, TYPE_LENGTH (type)); - + CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type)); /* Is it a code address? */ if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD @@ -444,77 +368,88 @@ d10v_integer_to_address (struct type *type, void *buf) return val; } -/* Store the address of the place in which to copy the structure the - subroutine will return. This is called from call_function. - - We store structs through a pointer passed in the first Argument - register. */ - -static void -d10v_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) -{ - write_register (ARG1_REGNUM, (addr)); -} - -/* Write into appropriate registers a function return value - of type TYPE, given in virtual format. - - Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */ - -static void -d10v_store_return_value (struct type *type, struct regcache *regcache, - const void *valbuf) -{ - /* Only char return values need to be shifted right within the first - regnum. */ - if (TYPE_LENGTH (type) == 1 - && TYPE_CODE (type) == TYPE_CODE_INT) +/* Handle the d10v's return_value convention. */ + +static enum return_value_convention +d10v_return_value (struct gdbarch *gdbarch, struct type *valtype, + struct regcache *regcache, void *readbuf, + const void *writebuf) +{ + if (TYPE_LENGTH (valtype) > 8) + /* Anything larger than 8 bytes (4 registers) goes on the stack. */ + return RETURN_VALUE_STRUCT_CONVENTION; + if (TYPE_LENGTH (valtype) == 5 + || TYPE_LENGTH (valtype) == 6) + /* Anything 5 or 6 bytes in size goes in memory. Contents don't + appear to matter. Note that 7 and 8 byte objects do end up in + registers! */ + return RETURN_VALUE_STRUCT_CONVENTION; + if (TYPE_LENGTH (valtype) == 1) { - bfd_byte tmp[2]; - tmp[1] = *(bfd_byte *)valbuf; - regcache_cooked_write (regcache, RET1_REGNUM, tmp); + /* All single byte values go in a register stored right-aligned. + Note: 2 byte integer values are handled further down. */ + if (readbuf) + { + /* Since TYPE is smaller than the register, there isn't a + sign extension problem. Let the extraction truncate the + register value. */ + ULONGEST regval; + regcache_cooked_read_unsigned (regcache, R0_REGNUM, + ®val); + store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval); + + } + if (writebuf) + { + ULONGEST regval; + if (TYPE_CODE (valtype) == TYPE_CODE_INT) + /* Some sort of integer value stored in R0. Use + unpack_long since that should handle any required sign + extension. */ + regval = unpack_long (valtype, writebuf); + else + /* Some other type. Don't sign-extend the value when + storing it in the register. */ + regval = extract_unsigned_integer (writebuf, 1); + regcache_cooked_write_unsigned (regcache, R0_REGNUM, regval); + } + return RETURN_VALUE_REGISTER_CONVENTION; } - else + if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT + || TYPE_CODE (valtype) == TYPE_CODE_UNION) + && TYPE_NFIELDS (valtype) > 1 + && TYPE_FIELD_BITPOS (valtype, 1) == 8) + /* If a composite is 8 bit aligned (determined by looking at the + start address of the second field), put it in memory. */ + return RETURN_VALUE_STRUCT_CONVENTION; + /* Assume it is in registers. */ + if (writebuf || readbuf) { int reg; - /* A structure is never more than 8 bytes long. See - use_struct_convention(). */ - gdb_assert (TYPE_LENGTH (type) <= 8); - /* Write out most registers, stop loop before trying to write - out any dangling byte at the end of the buffer. */ - for (reg = 0; (reg * 2) + 1 < TYPE_LENGTH (type); reg++) + /* Per above, the value is never more than 8 bytes long. */ + gdb_assert (TYPE_LENGTH (valtype) <= 8); + /* Xfer 2 bytes at a time. */ + for (reg = 0; (reg * 2) + 1 < TYPE_LENGTH (valtype); reg++) + { + if (readbuf) + regcache_cooked_read (regcache, R0_REGNUM + reg, + (bfd_byte *) readbuf + reg * 2); + if (writebuf) + regcache_cooked_write (regcache, R0_REGNUM + reg, + (bfd_byte *) writebuf + reg * 2); + } + /* Any trailing byte ends up _left_ aligned. */ + if ((reg * 2) < TYPE_LENGTH (valtype)) { - regcache_cooked_write (regcache, RET1_REGNUM + reg, - (bfd_byte *) valbuf + reg * 2); + if (readbuf) + regcache_cooked_read_part (regcache, R0_REGNUM + reg, + 0, 1, (bfd_byte *) readbuf + reg * 2); + if (writebuf) + regcache_cooked_write_part (regcache, R0_REGNUM + reg, + 0, 1, (bfd_byte *) writebuf + reg * 2); } - /* Write out any dangling byte at the end of the buffer. */ - if ((reg * 2) + 1 == TYPE_LENGTH (type)) - regcache_cooked_write_part (regcache, reg, 0, 1, - (bfd_byte *) valbuf + reg * 2); } -} - -/* Extract from an array REGBUF containing the (raw) register state - the address in which a function should return its structure value, - as a CORE_ADDR (or an expression that can be used as one). */ - -static CORE_ADDR -d10v_extract_struct_value_address (struct regcache *regcache) -{ - ULONGEST addr; - regcache_cooked_read_unsigned (regcache, ARG1_REGNUM, &addr); - return (addr | DMEM_START); -} - -/* Immediately after a function call, return the saved pc. We can't - use frame->return_pc beause that is determined by reading R13 off - the stack and that may not be written yet. */ - -static CORE_ADDR -d10v_saved_pc_after_call (struct frame_info *frame) -{ - return ((read_register (LR_REGNUM) << 2) - | IMEM_START); + return RETURN_VALUE_REGISTER_CONVENTION; } static int @@ -559,8 +494,8 @@ d10v_skip_prologue (CORE_ADDR pc) CORE_ADDR func_addr, func_end; struct symtab_and_line sal; - /* If we have line debugging information, then the end of the */ - /* prologue should the first assembly instruction of the first source line */ + /* If we have line debugging information, then the end of the prologue + should be the first assembly instruction of the first source line. */ if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) { sal = find_pc_line (func_addr, 0); @@ -569,7 +504,7 @@ d10v_skip_prologue (CORE_ADDR pc) } if (target_read_memory (pc, (char *) &op, 4)) - return pc; /* Can't access it -- assume no prologue. */ + return pc; /* Can't access it -- assume no prologue. */ while (1) { @@ -599,8 +534,9 @@ d10v_skip_prologue (CORE_ADDR pc) { if (!check_prologue (op2)) { - /* if the previous opcode was really part of the prologue */ - /* and not just a NOP, then we want to break after both instructions */ + /* If the previous opcode was really part of the + prologue and not just a NOP, then we want to + break after both instructions. */ if (op1 != 0x5E00) pc += 4; break; @@ -616,13 +552,20 @@ d10v_skip_prologue (CORE_ADDR pc) struct d10v_unwind_cache { - CORE_ADDR return_pc; - int frameless; + /* The previous frame's inner most stack address. Used as this + frame ID's stack_addr. */ + CORE_ADDR prev_sp; + /* The frame's base, optionally used by the high-level debug info. */ + CORE_ADDR base; int size; - CORE_ADDR *saved_regs; - CORE_ADDR next_addr; + /* How far the SP and r11 (FP) have been offset from the start of + the stack frame (as defined by the previous frame's stack + pointer). */ + LONGEST sp_offset; + LONGEST r11_offset; int uses_frame; - void **regs; + /* Table indicating the location of each and every register. */ + struct trad_frame_saved_reg *saved_regs; }; static int @@ -635,8 +578,8 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, if ((op & 0x7E1F) == 0x6C1F) { n = (op & 0x1E0) >> 5; - info->next_addr -= 2; - info->saved_regs[n] = info->next_addr; + info->sp_offset -= 2; + info->saved_regs[n].addr = info->sp_offset; return 1; } @@ -644,9 +587,9 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, else if ((op & 0x7E3F) == 0x6E1F) { n = (op & 0x1E0) >> 5; - info->next_addr -= 4; - info->saved_regs[n] = info->next_addr; - info->saved_regs[n + 1] = info->next_addr + 2; + info->sp_offset -= 4; + info->saved_regs[n + 0].addr = info->sp_offset + 0; + info->saved_regs[n + 1].addr = info->sp_offset + 2; return 1; } @@ -656,7 +599,7 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, n = (op & 0x1E) >> 1; if (n == 0) n = 16; - info->next_addr -= n; + info->sp_offset -= n; return 1; } @@ -664,6 +607,15 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, if (op == 0x417E) { info->uses_frame = 1; + info->r11_offset = info->sp_offset; + return 1; + } + + /* st rn, @r11 */ + if ((op & 0x7E1F) == 0x6816) + { + n = (op & 0x1E0) >> 5; + info->saved_regs[n].addr = info->r11_offset; return 1; } @@ -675,7 +627,7 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, if ((op & 0x7E1F) == 0x681E) { n = (op & 0x1E0) >> 5; - info->saved_regs[n] = info->next_addr; + info->saved_regs[n].addr = info->sp_offset; return 1; } @@ -683,8 +635,8 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, if ((op & 0x7E3F) == 0x3A1E) { n = (op & 0x1E0) >> 5; - info->saved_regs[n] = info->next_addr; - info->saved_regs[n + 1] = info->next_addr + 2; + info->saved_regs[n + 0].addr = info->sp_offset + 0; + info->saved_regs[n + 1].addr = info->sp_offset + 2; return 1; } @@ -695,38 +647,37 @@ prologue_find_regs (struct d10v_unwind_cache *info, unsigned short op, the saved registers of frame described by FRAME_INFO. This includes special registers such as pc and fp saved in special ways in the stack frame. sp is even more special: the address we return - for it IS the sp for the next frame. */ + for it IS the sp for the next frame. */ -struct d10v_unwind_cache * -d10v_frame_unwind_cache (struct frame_info *fi, - void **cache) +static struct d10v_unwind_cache * +d10v_frame_unwind_cache (struct frame_info *next_frame, + void **this_prologue_cache) { - CORE_ADDR fp, pc; + struct gdbarch *gdbarch = get_frame_arch (next_frame); + CORE_ADDR pc; + ULONGEST prev_sp; + ULONGEST this_base; unsigned long op; unsigned short op1, op2; int i; struct d10v_unwind_cache *info; - if ((*cache)) - return (*cache); + if ((*this_prologue_cache)) + return (*this_prologue_cache); info = FRAME_OBSTACK_ZALLOC (struct d10v_unwind_cache); - (*cache) = info; - info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS); + (*this_prologue_cache) = info; + info->saved_regs = trad_frame_alloc_saved_regs (next_frame); - info->frameless = 0; info->size = 0; - info->return_pc = 0; - - fp = get_frame_base (fi); - info->next_addr = 0; - - pc = get_pc_function_start (get_frame_pc (fi)); + info->sp_offset = 0; info->uses_frame = 0; - while (1) + for (pc = frame_func_unwind (next_frame); + pc > 0 && pc < frame_pc_unwind (next_frame); + pc += 4) { - op = (unsigned long) read_memory_integer (pc, 4); + op = get_frame_memory_unsigned (next_frame, pc, 4); if ((op & 0xC0000000) == 0xC0000000) { /* long instruction */ @@ -734,22 +685,22 @@ d10v_frame_unwind_cache (struct frame_info *fi, { /* add3 sp,sp,n */ short n = op & 0xFFFF; - info->next_addr += n; + info->sp_offset += n; } else if ((op & 0x3F0F0000) == 0x340F0000) { /* st rn, @(offset,sp) */ short offset = op & 0xFFFF; short n = (op >> 20) & 0xF; - info->saved_regs[n] = info->next_addr + offset; + info->saved_regs[n].addr = info->sp_offset + offset; } else if ((op & 0x3F1F0000) == 0x350F0000) { /* st2w rn, @(offset,sp) */ short offset = op & 0xFFFF; short n = (op >> 20) & 0xF; - info->saved_regs[n] = info->next_addr + offset; - info->saved_regs[n + 1] = info->next_addr + offset + 2; + info->saved_regs[n + 0].addr = info->sp_offset + offset + 0; + info->saved_regs[n + 1].addr = info->sp_offset + offset + 2; } else break; @@ -771,49 +722,52 @@ d10v_frame_unwind_cache (struct frame_info *fi, || !prologue_find_regs (info, op2, pc)) break; } - pc += 4; } - info->size = -info->next_addr; - - if (!(fp & 0xffff)) - fp = d10v_read_sp (); + info->size = -info->sp_offset; - for (i = 0; i < NUM_REGS - 1; i++) - if (info->saved_regs[i]) - { - info->saved_regs[i] = fp - (info->next_addr - info->saved_regs[i]); - } - - if (info->saved_regs[LR_REGNUM]) + /* Compute the previous frame's stack pointer (which is also the + frame's ID's stack address), and this frame's base pointer. */ + if (info->uses_frame) { - CORE_ADDR return_pc - = read_memory_unsigned_integer (info->saved_regs[LR_REGNUM], - register_size (current_gdbarch, LR_REGNUM)); - info->return_pc = d10v_make_iaddr (return_pc); + /* The SP was moved to the FP. This indicates that a new frame + was created. Get THIS frame's FP value by unwinding it from + the next frame. */ + frame_unwind_unsigned_register (next_frame, D10V_FP_REGNUM, &this_base); + /* The FP points at the last saved register. Adjust the FP back + to before the first saved register giving the SP. */ + prev_sp = this_base + info->size; } else { - ULONGEST return_pc; - frame_read_unsigned_register (fi, LR_REGNUM, &return_pc); - info->return_pc = d10v_make_iaddr (return_pc); + /* Assume that the FP is this frame's SP but with that pushed + stack space added back. */ + frame_unwind_unsigned_register (next_frame, D10V_SP_REGNUM, &this_base); + prev_sp = this_base + info->size; } - /* The SP is not normally (ever?) saved, but check anyway */ - if (!info->saved_regs[SP_REGNUM]) - { - /* if the FP was saved, that means the current FP is valid, */ - /* otherwise, it isn't being used, so we use the SP instead */ - if (info->uses_frame) - info->saved_regs[SP_REGNUM] - = d10v_read_fp () + info->size; - else - { - info->saved_regs[SP_REGNUM] = fp + info->size; - info->frameless = 1; - info->saved_regs[FP_REGNUM] = 0; - } - } + /* Convert that SP/BASE into real addresses. */ + info->prev_sp = d10v_make_daddr (prev_sp); + info->base = d10v_make_daddr (this_base); + + /* Adjust all the saved registers so that they contain addresses and + not offsets. */ + for (i = 0; i < NUM_REGS - 1; i++) + if (trad_frame_addr_p (info->saved_regs, i)) + { + info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr); + } + + /* The call instruction moves the caller's PC in the callee's LR. + Since this is an unwind, do the reverse. Copy the location of LR + into PC (the address / regnum) so that a request for PC will be + converted into a request for the LR. */ + info->saved_regs[D10V_PC_REGNUM] = info->saved_regs[LR_REGNUM]; + + /* The previous frame's SP needed to be computed. Save the computed + value. */ + trad_frame_set_value (info->saved_regs, D10V_SP_REGNUM, + d10v_make_daddr (prev_sp)); return info; } @@ -822,6 +776,7 @@ static void d10v_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, struct frame_info *frame, int regnum, int all) { + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); if (regnum >= 0) { default_print_registers_info (gdbarch, file, frame, regnum, all); @@ -830,11 +785,11 @@ d10v_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, { ULONGEST pc, psw, rpt_s, rpt_e, rpt_c; - frame_read_unsigned_register (frame, PC_REGNUM, &pc); - frame_read_unsigned_register (frame, PSW_REGNUM, &psw); - frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_s", -1), &rpt_s); - frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_e", -1), &rpt_e); - frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_c", -1), &rpt_c); + pc = get_frame_register_unsigned (frame, D10V_PC_REGNUM); + psw = get_frame_register_unsigned (frame, PSW_REGNUM); + rpt_s = get_frame_register_unsigned (frame, frame_map_name_to_regnum (frame, "rpt_s", -1)); + rpt_e = get_frame_register_unsigned (frame, frame_map_name_to_regnum (frame, "rpt_e", -1)); + rpt_c = get_frame_register_unsigned (frame, frame_map_name_to_regnum (frame, "rpt_c", -1)); fprintf_filtered (file, "PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n", (long) pc, (long) d10v_make_iaddr (pc), (long) psw, (long) rpt_s, (long) rpt_e, (long) rpt_c); @@ -849,7 +804,7 @@ d10v_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, for (r = group; r < group + 8; r++) { ULONGEST tmp; - frame_read_unsigned_register (frame, r, &tmp); + tmp = get_frame_register_unsigned (frame, r); fprintf_filtered (file, " %04lx", (long) tmp); } fprintf_filtered (file, "\n"); @@ -865,31 +820,34 @@ d10v_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, { if (a > 0) fprintf_filtered (file, " "); - fprintf_filtered (file, "IMAP%d %04lx", a, d10v_imap_register (a)); + fprintf_filtered (file, "IMAP%d %04lx", a, + tdep->imap_register (current_regcache, a)); } - if (NR_DMAP_REGS == 1) + if (nr_dmap_regs (gdbarch) == 1) /* Registers DMAP0 and DMAP1 are constant. Just return dmap2. */ - fprintf_filtered (file, " DMAP %04lx\n", d10v_dmap_register (2)); + fprintf_filtered (file, " DMAP %04lx\n", + tdep->dmap_register (current_regcache, 2)); else { - for (a = 0; a < NR_DMAP_REGS; a++) + for (a = 0; a < nr_dmap_regs (gdbarch); a++) { - fprintf_filtered (file, " DMAP%d %04lx", a, d10v_dmap_register (a)); + fprintf_filtered (file, " DMAP%d %04lx", a, + tdep->dmap_register (current_regcache, a)); } fprintf_filtered (file, "\n"); } } { - char *num = alloca (max_register_size (gdbarch)); + char num[MAX_REGISTER_SIZE]; int a; fprintf_filtered (file, "A0-A%d", NR_A_REGS - 1); - for (a = A0_REGNUM; a < A0_REGNUM + NR_A_REGS; a++) + for (a = a0_regnum (gdbarch); a < a0_regnum (gdbarch) + NR_A_REGS; a++) { int i; fprintf_filtered (file, " "); - frame_register_read (frame, a, num); - for (i = 0; i < max_register_size (current_gdbarch); i++) + get_frame_register (frame, a, num); + for (i = 0; i < register_size (gdbarch, a); i++) { fprintf_filtered (file, "%02x", (num[i] & 0xff)); } @@ -914,7 +872,7 @@ d10v_read_pc (ptid_t ptid) save_ptid = inferior_ptid; inferior_ptid = ptid; - pc = (int) read_register (PC_REGNUM); + pc = (int) read_register (D10V_PC_REGNUM); inferior_ptid = save_ptid; retval = d10v_make_iaddr (pc); return retval; @@ -927,42 +885,20 @@ d10v_write_pc (CORE_ADDR val, ptid_t ptid) save_ptid = inferior_ptid; inferior_ptid = ptid; - write_register (PC_REGNUM, d10v_convert_iaddr_to_raw (val)); + write_register (D10V_PC_REGNUM, d10v_convert_iaddr_to_raw (val)); inferior_ptid = save_ptid; } static CORE_ADDR -d10v_read_sp (void) -{ - return (d10v_make_daddr (read_register (SP_REGNUM))); -} - -static void -d10v_write_sp (CORE_ADDR val) -{ - write_register (SP_REGNUM, d10v_convert_daddr_to_raw (val)); -} - -static CORE_ADDR -d10v_read_fp (void) +d10v_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) { - return (d10v_make_daddr (read_register (FP_REGNUM))); + ULONGEST sp; + frame_unwind_unsigned_register (next_frame, D10V_SP_REGNUM, &sp); + return d10v_make_daddr (sp); } -/* Function: push_return_address (pc) - Set up the return address for the inferior function call. - Needed for targets where we don't actually execute a JSR/BSR instruction */ - -static CORE_ADDR -d10v_push_return_address (CORE_ADDR pc, CORE_ADDR sp) -{ - write_register (LR_REGNUM, d10v_convert_iaddr_to_raw (CALL_DUMMY_ADDRESS ())); - return sp; -} - - /* When arguments must be pushed onto the stack, they go on in reverse - order. The below implements a FILO (stack) to do this. */ + order. The below implements a FILO (stack) to do this. */ struct stack_item { @@ -998,21 +934,48 @@ pop_stack_item (struct stack_item *si) static CORE_ADDR -d10v_push_arguments (int nargs, struct value **args, CORE_ADDR sp, - int struct_return, CORE_ADDR struct_addr) +d10v_push_dummy_code (struct gdbarch *gdbarch, + CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc, + struct value **args, int nargs, + struct type *value_type, + CORE_ADDR *real_pc, CORE_ADDR *bp_addr) +{ + /* Allocate space sufficient for a breakpoint. */ + sp = (sp - 4) & ~3; + /* Store the address of that breakpoint taking care to first convert + it into a code (IADDR) address from a stack (DADDR) address. + This of course assumes that the two virtual addresses map onto + the same real address. */ + (*bp_addr) = d10v_make_iaddr (d10v_convert_iaddr_to_raw (sp)); + /* d10v always starts the call at the callee's entry point. */ + (*real_pc) = funaddr; + return sp; +} + +static CORE_ADDR +d10v_push_dummy_call (struct gdbarch *gdbarch, struct value *function, + struct regcache *regcache, CORE_ADDR bp_addr, + int nargs, struct value **args, CORE_ADDR sp, + int struct_return, CORE_ADDR struct_addr) { int i; int regnum = ARG1_REGNUM; struct stack_item *si = NULL; long val; - /* If struct_return is true, then the struct return address will - consume one argument-passing register. No need to actually - write the value to the register -- that's done by - d10v_store_struct_return(). */ + /* Set the return address. For the d10v, the return breakpoint is + always at BP_ADDR. */ + regcache_cooked_write_unsigned (regcache, LR_REGNUM, + d10v_convert_iaddr_to_raw (bp_addr)); + /* If STRUCT_RETURN is true, then the struct return address (in + STRUCT_ADDR) will consume the first argument-passing register. + Both adjust the register count and store that value. */ if (struct_return) - regnum++; + { + regcache_cooked_write_unsigned (regcache, regnum, struct_addr); + regnum++; + } /* Fill in registers and arg lists */ for (i = 0; i < nargs; i++) @@ -1028,7 +991,7 @@ d10v_push_arguments (int nargs, struct value **args, CORE_ADDR sp, /* fits in a single register, do not align */ { val = extract_unsigned_integer (contents, len); - write_register (regnum++, val); + regcache_cooked_write_unsigned (regcache, regnum++, val); } else if (len <= (ARGN_REGNUM - aligned_regnum + 1) * 2) /* value fits in remaining registers, store keeping left @@ -1039,12 +1002,12 @@ d10v_push_arguments (int nargs, struct value **args, CORE_ADDR sp, for (b = 0; b < (len & ~1); b += 2) { val = extract_unsigned_integer (&contents[b], 2); - write_register (regnum++, val); + regcache_cooked_write_unsigned (regcache, regnum++, val); } if (b < len) { val = extract_unsigned_integer (&contents[b], 1); - write_register (regnum++, (val << 8)); + regcache_cooked_write_unsigned (regcache, regnum++, (val << 8)); } } else @@ -1062,71 +1025,30 @@ d10v_push_arguments (int nargs, struct value **args, CORE_ADDR sp, si = pop_stack_item (si); } - return sp; -} - - -/* Given a return value in `regbuf' with a type `valtype', - extract and copy its value into `valbuf'. */ + /* Finally, update the SP register. */ + regcache_cooked_write_unsigned (regcache, D10V_SP_REGNUM, + d10v_convert_daddr_to_raw (sp)); -static void -d10v_extract_return_value (struct type *type, struct regcache *regcache, - void *valbuf) -{ - int len; -#if 0 - printf("RET: TYPE=%d len=%d r%d=0x%x\n", TYPE_CODE (type), - TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, - (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), - register_size (current_gdbarch, RET1_REGNUM))); -#endif - if (TYPE_LENGTH (type) == 1) - { - ULONGEST c; - regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &c); - store_unsigned_integer (valbuf, 1, c); - } - else - { - /* For return values of odd size, the first byte is in the - least significant part of the first register. The - remaining bytes in remaining registers. Interestingly, when - such values are passed in, the last byte is in the most - significant byte of that same register - wierd. */ - int reg = RET1_REGNUM; - int off = 0; - if (TYPE_LENGTH (type) & 1) - { - regcache_cooked_read_part (regcache, RET1_REGNUM, 1, 1, - (bfd_byte *)valbuf + off); - off++; - reg++; - } - /* Transfer the remaining registers. */ - for (; off < TYPE_LENGTH (type); reg++, off += 2) - { - regcache_cooked_read (regcache, RET1_REGNUM + reg, - (bfd_byte *) valbuf + off); - } - } + return sp; } /* Translate a GDB virtual ADDR/LEN into a format the remote target understands. Returns number of bytes that can be transfered starting at TARG_ADDR. Return ZERO if no bytes can be transfered (segmentation fault). Since the simulator knows all about how the - VM system works, we just call that to do the translation. */ + VM system works, we just call that to do the translation. */ static void -remote_d10v_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes, +remote_d10v_translate_xfer_address (struct gdbarch *gdbarch, + struct regcache *regcache, + CORE_ADDR memaddr, int nr_bytes, CORE_ADDR *targ_addr, int *targ_len) { + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); long out_addr; long out_len; - out_len = sim_d10v_translate_addr (memaddr, nr_bytes, - &out_addr, - d10v_dmap_register, - d10v_imap_register); + out_len = sim_d10v_translate_addr (memaddr, nr_bytes, &out_addr, regcache, + tdep->dmap_register, tdep->imap_register); *targ_addr = out_addr; *targ_len = out_len; } @@ -1198,9 +1120,9 @@ trace_command (char *args, int from_tty) /* Clear the host-side trace buffer, allocating space if needed. */ trace_data.size = 0; if (trace_data.counts == NULL) - trace_data.counts = (short *) xmalloc (65536 * sizeof (short)); + trace_data.counts = XCALLOC (65536, short); if (trace_data.addrs == NULL) - trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof (CORE_ADDR)); + trace_data.addrs = XCALLOC (65536, CORE_ADDR); tracing = 1; @@ -1239,31 +1161,13 @@ trace_info (char *args, int from_tty) printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off")); } -/* Print the instruction at address MEMADDR in debugged memory, - on STREAM. Returns length of the instruction, in bytes. */ - -static int -print_insn (CORE_ADDR memaddr, struct ui_file *stream) -{ - /* If there's no disassembler, something is very wrong. */ - if (tm_print_insn == NULL) - internal_error (__FILE__, __LINE__, - "print_insn: no disassembler"); - - if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) - tm_print_insn_info.endian = BFD_ENDIAN_BIG; - else - tm_print_insn_info.endian = BFD_ENDIAN_LITTLE; - return TARGET_PRINT_INSN (memaddr, &tm_print_insn_info); -} - static void d10v_eva_prepare_to_trace (void) { if (!tracing) return; - last_pc = read_register (PC_REGNUM); + last_pc = read_register (D10V_PC_REGNUM); } /* Collect trace data from the target board and format it into a form @@ -1334,29 +1238,33 @@ tdisassemble_command (char *arg, int from_tty) { int i, count; CORE_ADDR low, high; - char *space_index; if (!arg) { low = 0; high = trace_data.size; } - else if (!(space_index = (char *) strchr (arg, ' '))) - { - low = parse_and_eval_address (arg); - high = low + 5; - } else - { - /* Two arguments. */ - *space_index = '\0'; - low = parse_and_eval_address (arg); - high = parse_and_eval_address (space_index + 1); - if (high < low) - high = low; + { + char *space_index = strchr (arg, ' '); + if (space_index == NULL) + { + low = parse_and_eval_address (arg); + high = low + 5; + } + else + { + /* Two arguments. */ + *space_index = '\0'; + low = parse_and_eval_address (arg); + high = parse_and_eval_address (space_index + 1); + if (high < low) + high = low; + } } - printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low), paddr_u (high)); + printf_filtered ("Dump of trace from %s to %s:\n", + paddr_u (low), paddr_u (high)); display_trace (low, high); @@ -1405,7 +1313,7 @@ display_trace (int low, int high) if (!suppress) /* FIXME-32x64--assumes sal.pc fits in long. */ printf_filtered ("No source file for address %s.\n", - local_hex_string ((unsigned long) sal.pc)); + hex_string ((unsigned long) sal.pc)); suppress = 1; } } @@ -1414,178 +1322,100 @@ display_trace (int low, int high) printf_filtered (":"); printf_filtered ("\t"); wrap_here (" "); - next_address = next_address + print_insn (next_address, gdb_stdout); + next_address += gdb_print_insn (next_address, gdb_stdout); printf_filtered ("\n"); gdb_flush (gdb_stdout); } } } - static CORE_ADDR -d10v_frame_pc_unwind (struct frame_info *frame, - void **cache) +d10v_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) { - struct d10v_unwind_cache *info = d10v_frame_unwind_cache (frame, cache); - return info->return_pc; + ULONGEST pc; + frame_unwind_unsigned_register (next_frame, D10V_PC_REGNUM, &pc); + return d10v_make_iaddr (pc); } /* Given a GDB frame, determine the address of the calling function's frame. This will be used to create a new GDB frame struct. */ static void -d10v_frame_id_unwind (struct frame_info *frame, - void **cache, - struct frame_id *id) -{ - struct d10v_unwind_cache *info = d10v_frame_unwind_cache (frame, cache); - CORE_ADDR addr; - - /* Start with a NULL frame ID. */ - (*id) = null_frame_id; - - if (info->return_pc == IMEM_START - || info->return_pc <= IMEM_START - || inside_entry_file (info->return_pc)) - { - /* This is meant to halt the backtrace at "_start". - Make sure we don't halt it at a generic dummy frame. */ - return; - } - - if (!info->saved_regs[FP_REGNUM]) - { - if (!info->saved_regs[SP_REGNUM] - || info->saved_regs[SP_REGNUM] == STACK_START) - return; - - id->base = info->saved_regs[SP_REGNUM]; - id->pc = info->return_pc; - } - - addr = read_memory_unsigned_integer (info->saved_regs[FP_REGNUM], - register_size (current_gdbarch, FP_REGNUM)); - if (addr == 0) +d10v_frame_this_id (struct frame_info *next_frame, + void **this_prologue_cache, + struct frame_id *this_id) +{ + struct d10v_unwind_cache *info + = d10v_frame_unwind_cache (next_frame, this_prologue_cache); + CORE_ADDR base; + CORE_ADDR func; + struct frame_id id; + + /* The FUNC is easy. */ + func = frame_func_unwind (next_frame); + + /* Hopefully the prologue analysis either correctly determined the + frame's base (which is the SP from the previous frame), or set + that base to "NULL". */ + base = info->prev_sp; + if (base == STACK_START || base == 0) return; - id->base = d10v_make_daddr (addr); - id->pc = info->return_pc; + id = frame_id_build (base, func); + + (*this_id) = id; } static void -saved_regs_unwinder (struct frame_info *frame, - CORE_ADDR *saved_regs, - int regnum, int *optimizedp, - enum lval_type *lvalp, CORE_ADDR *addrp, - int *realnump, void *bufferp) -{ - /* If we're using generic dummy frames, we'd better not be in a call - dummy. (generic_call_dummy_register_unwind ought to have been called - instead.) */ - gdb_assert (!(DEPRECATED_USE_GENERIC_DUMMY_FRAMES - && (get_frame_type (frame) == DUMMY_FRAME))); - - if (saved_regs[regnum] != 0) - { - if (regnum == SP_REGNUM) - { - /* SP register treated specially. */ - *optimizedp = 0; - *lvalp = not_lval; - *addrp = 0; - *realnump = -1; - if (bufferp != NULL) - store_address (bufferp, register_size (current_gdbarch, regnum), - saved_regs[regnum]); - } - else - { - /* Any other register is saved in memory, fetch it but cache - a local copy of its value. */ - *optimizedp = 0; - *lvalp = lval_memory; - *addrp = saved_regs[regnum]; - *realnump = -1; - if (bufferp != NULL) - { - /* Read the value in from memory. */ - read_memory (saved_regs[regnum], bufferp, - register_size (current_gdbarch, regnum)); - } - } - return; - } - - /* No luck, assume this and the next frame have the same register - value. If a value is needed, pass the request on down the chain; - otherwise just return an indication that the value is in the same - register as the next frame. */ - frame_register (frame, regnum, optimizedp, lvalp, addrp, - realnump, bufferp); +d10v_frame_prev_register (struct frame_info *next_frame, + void **this_prologue_cache, + int regnum, int *optimizedp, + enum lval_type *lvalp, CORE_ADDR *addrp, + int *realnump, void *bufferp) +{ + struct d10v_unwind_cache *info + = d10v_frame_unwind_cache (next_frame, this_prologue_cache); + trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, + optimizedp, lvalp, addrp, realnump, bufferp); } +static const struct frame_unwind d10v_frame_unwind = { + NORMAL_FRAME, + d10v_frame_this_id, + d10v_frame_prev_register +}; -static void -d10v_frame_register_unwind (struct frame_info *frame, - void **cache, - int regnum, int *optimizedp, - enum lval_type *lvalp, CORE_ADDR *addrp, - int *realnump, void *bufferp) +static const struct frame_unwind * +d10v_frame_sniffer (struct frame_info *next_frame) { - struct d10v_unwind_cache *info = d10v_frame_unwind_cache (frame, cache); - saved_regs_unwinder (frame, info->saved_regs, regnum, optimizedp, - lvalp, addrp, realnump, bufferp); + return &d10v_frame_unwind; } - -static void -d10v_frame_pop (struct frame_info *fi, void **unwind_cache, - struct regcache *regcache) +static CORE_ADDR +d10v_frame_base_address (struct frame_info *next_frame, void **this_cache) { - struct d10v_unwind_cache *info = d10v_frame_unwind_cache (fi, unwind_cache); - CORE_ADDR fp; - int regnum; - char raw_buffer[8]; - - fp = get_frame_base (fi); - - /* now update the current registers with the old values */ - for (regnum = A0_REGNUM; regnum < A0_REGNUM + NR_A_REGS; regnum++) - { - frame_unwind_register (fi, regnum, raw_buffer); - regcache_cooked_write (regcache, regnum, raw_buffer); - } - for (regnum = 0; regnum < SP_REGNUM; regnum++) - { - frame_unwind_register (fi, regnum, raw_buffer); - regcache_cooked_write (regcache, regnum, raw_buffer); - } - frame_unwind_register (fi, PSW_REGNUM, raw_buffer); - regcache_cooked_write (regcache, PSW_REGNUM, raw_buffer); - - frame_unwind_register (fi, LR_REGNUM, raw_buffer); - regcache_cooked_write (regcache, PC_REGNUM, raw_buffer); - - store_unsigned_integer (raw_buffer, - register_size (current_gdbarch, SP_REGNUM), - fp + info->size); - regcache_cooked_write (regcache, SP_REGNUM, raw_buffer); - - target_store_registers (-1); - flush_cached_frames (); + struct d10v_unwind_cache *info + = d10v_frame_unwind_cache (next_frame, this_cache); + return info->base; } -static struct frame_unwind d10v_frame_unwind = { - d10v_frame_pop, - d10v_frame_pc_unwind, - d10v_frame_id_unwind, - d10v_frame_register_unwind +static const struct frame_base d10v_frame_base = { + &d10v_frame_unwind, + d10v_frame_base_address, + d10v_frame_base_address, + d10v_frame_base_address }; -const struct frame_unwind * -d10v_frame_p (CORE_ADDR pc) +/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that + dummy frame. The frame ID's base needs to match the TOS value + saved by save_dummy_frame_tos(), and the PC match the dummy frame's + breakpoint. */ + +static struct frame_id +d10v_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) { - return &d10v_frame_unwind; + return frame_id_build (d10v_unwind_sp (gdbarch, next_frame), + frame_pc_unwind (next_frame)); } static gdbarch_init_ftype d10v_gdbarch_init; @@ -1593,21 +1423,19 @@ static gdbarch_init_ftype d10v_gdbarch_init; static struct gdbarch * d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { - static LONGEST d10v_call_dummy_words[] = - {0}; struct gdbarch *gdbarch; int d10v_num_regs; struct gdbarch_tdep *tdep; gdbarch_register_name_ftype *d10v_register_name; gdbarch_register_sim_regno_ftype *d10v_register_sim_regno; - /* Find a candidate among the list of pre-declared architectures. */ + /* Find a candidate among the list of pre-declared architectures. */ arches = gdbarch_list_lookup_by_info (arches, &info); if (arches != NULL) return arches->gdbarch; /* None found, create a new architecture from the information - provided. */ + provided. */ tdep = XMALLOC (struct gdbarch_tdep); gdbarch = gdbarch_alloc (&info, tdep); @@ -1636,20 +1464,11 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_read_pc (gdbarch, d10v_read_pc); set_gdbarch_write_pc (gdbarch, d10v_write_pc); - set_gdbarch_read_fp (gdbarch, d10v_read_fp); - set_gdbarch_read_sp (gdbarch, d10v_read_sp); - set_gdbarch_write_sp (gdbarch, d10v_write_sp); + set_gdbarch_unwind_sp (gdbarch, d10v_unwind_sp); set_gdbarch_num_regs (gdbarch, d10v_num_regs); - set_gdbarch_sp_regnum (gdbarch, 15); - set_gdbarch_fp_regnum (gdbarch, 11); - set_gdbarch_pc_regnum (gdbarch, 18); + set_gdbarch_sp_regnum (gdbarch, D10V_SP_REGNUM); set_gdbarch_register_name (gdbarch, d10v_register_name); - set_gdbarch_register_size (gdbarch, 2); - set_gdbarch_register_bytes (gdbarch, (d10v_num_regs - 2) * 2 + 16); - set_gdbarch_register_byte (gdbarch, d10v_register_byte); - set_gdbarch_register_raw_size (gdbarch, d10v_register_raw_size); - set_gdbarch_register_virtual_size (gdbarch, generic_register_size); set_gdbarch_register_type (gdbarch, d10v_register_type); set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); @@ -1662,7 +1481,7 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long - double'' is 64 bits. */ + double'' is 64 bits. */ set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); @@ -1676,73 +1495,58 @@ d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) case BFD_ENDIAN_LITTLE: set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little); set_gdbarch_double_format (gdbarch, &floatformat_ieee_single_little); - set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_double_little); + set_gdbarch_long_double_format (gdbarch, + &floatformat_ieee_double_little); break; default: internal_error (__FILE__, __LINE__, "d10v_gdbarch_init: bad byte order for float format"); } - set_gdbarch_call_dummy_length (gdbarch, 0); - set_gdbarch_call_dummy_address (gdbarch, entry_point_address); - set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); - set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); - set_gdbarch_call_dummy_start_offset (gdbarch, 0); - set_gdbarch_call_dummy_words (gdbarch, d10v_call_dummy_words); - set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (d10v_call_dummy_words)); - set_gdbarch_call_dummy_p (gdbarch, 1); - set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); - set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); - - set_gdbarch_extract_return_value (gdbarch, d10v_extract_return_value); - set_gdbarch_push_arguments (gdbarch, d10v_push_arguments); - set_gdbarch_push_return_address (gdbarch, d10v_push_return_address); - - set_gdbarch_store_struct_return (gdbarch, d10v_store_struct_return); - set_gdbarch_store_return_value (gdbarch, d10v_store_return_value); - set_gdbarch_extract_struct_value_address (gdbarch, d10v_extract_struct_value_address); - set_gdbarch_use_struct_convention (gdbarch, d10v_use_struct_convention); + set_gdbarch_return_value (gdbarch, d10v_return_value); + set_gdbarch_push_dummy_code (gdbarch, d10v_push_dummy_code); + set_gdbarch_push_dummy_call (gdbarch, d10v_push_dummy_call); set_gdbarch_skip_prologue (gdbarch, d10v_skip_prologue); set_gdbarch_inner_than (gdbarch, core_addr_lessthan); set_gdbarch_decr_pc_after_break (gdbarch, 4); - set_gdbarch_function_start_offset (gdbarch, 0); set_gdbarch_breakpoint_from_pc (gdbarch, d10v_breakpoint_from_pc); - set_gdbarch_remote_translate_xfer_address (gdbarch, remote_d10v_translate_xfer_address); - - set_gdbarch_frame_args_skip (gdbarch, 0); - set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue); + set_gdbarch_remote_translate_xfer_address (gdbarch, + remote_d10v_translate_xfer_address); - set_gdbarch_saved_pc_after_call (gdbarch, d10v_saved_pc_after_call); - set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); - set_gdbarch_stack_align (gdbarch, d10v_stack_align); + set_gdbarch_frame_align (gdbarch, d10v_frame_align); set_gdbarch_register_sim_regno (gdbarch, d10v_register_sim_regno); - set_gdbarch_extra_stack_alignment_needed (gdbarch, 0); set_gdbarch_print_registers_info (gdbarch, d10v_print_registers_info); - frame_unwind_append_predicate (gdbarch, d10v_frame_p); + frame_unwind_append_sniffer (gdbarch, d10v_frame_sniffer); + frame_base_set_default (gdbarch, &d10v_frame_base); - return gdbarch; -} + /* Methods for saving / extracting a dummy frame's ID. The ID's + stack address must match the SP value returned by + PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ + set_gdbarch_unwind_dummy_id (gdbarch, d10v_unwind_dummy_id); + + /* Return the unwound PC value. */ + set_gdbarch_unwind_pc (gdbarch, d10v_unwind_pc); + set_gdbarch_print_insn (gdbarch, print_insn_d10v); -extern void (*target_resume_hook) (void); -extern void (*target_wait_loop_hook) (void); + return gdbarch; +} void _initialize_d10v_tdep (void) { register_gdbarch_init (bfd_arch_d10v, d10v_gdbarch_init); - tm_print_insn = print_insn_d10v; - - target_resume_hook = d10v_eva_prepare_to_trace; - target_wait_loop_hook = d10v_eva_get_trace_data; + deprecated_target_resume_hook = d10v_eva_prepare_to_trace; + deprecated_target_wait_loop_hook = d10v_eva_get_trace_data; - deprecate_cmd (add_com ("regs", class_vars, show_regs, "Print all registers"), + deprecate_cmd (add_com ("regs", class_vars, show_regs, + "Print all registers"), "info registers"); add_com ("itrace", class_support, trace_command, @@ -1759,13 +1563,17 @@ as reported by info trace (NOT addresses!)."); add_info ("itrace", trace_info, "Display info about the trace data buffer."); - add_show_from_set (add_set_cmd ("itracedisplay", no_class, - var_integer, (char *) &trace_display, - "Set automatic display of trace.\n", &setlist), - &showlist); - add_show_from_set (add_set_cmd ("itracesource", no_class, - var_integer, (char *) &default_trace_show_source, - "Set display of source code with trace.\n", &setlist), - &showlist); - + add_setshow_boolean_cmd ("itracedisplay", no_class, &trace_display, "\ +Set automatic display of trace.", "\ +Show automatic display of trace.", "\ +Controls the display of d10v specific instruction trace information.", "\ +Automatic display of trace is %s.", + NULL, NULL, &setlist, &showlist); + add_setshow_boolean_cmd ("itracesource", no_class, + &default_trace_show_source, "\ +Set display of source code with trace.", "\ +Show display of source code with trace.", "\ +When on source code is included in the d10v instruction trace display.", "\ +Display of source code with trace is %s.", + NULL, NULL, &setlist, &showlist); }