X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Fi386-tdep.c;h=e1ce81fcf0cc768991d1a8e89281d1d390c9ce1b;hb=4566dfcf80c82eafb52f417657fb81931520271d;hp=6641516b32abe9e25b77db14c60187b9f8f1bc8c;hpb=acd5c79833ffd87197b87fd5afa8c6f4de0bed13;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c index 6641516b32..e1ce81fcf0 100644 --- a/gdb/i386-tdep.c +++ b/gdb/i386-tdep.c @@ -1,7 +1,8 @@ /* Intel 386 target-dependent stuff. Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, - 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. + 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software + Foundation, Inc. This file is part of GDB. @@ -24,6 +25,7 @@ #include "arch-utils.h" #include "command.h" #include "dummy-frame.h" +#include "dwarf2-frame.h" #include "doublest.h" #include "floatformat.h" #include "frame.h" @@ -36,10 +38,12 @@ #include "osabi.h" #include "regcache.h" #include "reggroups.h" +#include "regset.h" #include "symfile.h" #include "symtab.h" #include "target.h" #include "value.h" +#include "dis-asm.h" #include "gdb_assert.h" #include "gdb_string.h" @@ -47,16 +51,6 @@ #include "i386-tdep.h" #include "i387-tdep.h" -/* Register numbers of various important registers. */ - -#define I386_EAX_REGNUM 0 /* %eax */ -#define I386_EDX_REGNUM 2 /* %edx */ -#define I386_ESP_REGNUM 4 /* %esp */ -#define I386_EBP_REGNUM 5 /* %ebp */ -#define I386_EIP_REGNUM 8 /* %eip */ -#define I386_EFLAGS_REGNUM 9 /* %eflags */ -#define I386_ST0_REGNUM 16 /* %st(0) */ - /* Names of the registers. The first 10 registers match the register numbering scheme used by GCC for stabs and DWARF. */ @@ -75,8 +69,7 @@ static char *i386_register_names[] = "mxcsr" }; -static const int i386_num_register_names = - (sizeof (i386_register_names) / sizeof (*i386_register_names)); +static const int i386_num_register_names = ARRAY_SIZE (i386_register_names); /* MMX registers. */ @@ -86,48 +79,77 @@ static char *i386_mmx_names[] = "mm4", "mm5", "mm6", "mm7" }; -static const int i386_num_mmx_regs = - (sizeof (i386_mmx_names) / sizeof (i386_mmx_names[0])); - -#define MM0_REGNUM NUM_REGS +static const int i386_num_mmx_regs = ARRAY_SIZE (i386_mmx_names); static int -i386_mmx_regnum_p (int regnum) +i386_mmx_regnum_p (struct gdbarch *gdbarch, int regnum) { - return (regnum >= MM0_REGNUM - && regnum < MM0_REGNUM + i386_num_mmx_regs); + int mm0_regnum = gdbarch_tdep (gdbarch)->mm0_regnum; + + if (mm0_regnum < 0) + return 0; + + return (regnum >= mm0_regnum && regnum < mm0_regnum + i386_num_mmx_regs); } -/* FP register? */ +/* SSE register? */ -int -i386_fp_regnum_p (int regnum) +static int +i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum) { - return (regnum < NUM_REGS - && (FP0_REGNUM && FP0_REGNUM <= regnum && regnum < FPC_REGNUM)); + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + +#define I387_ST0_REGNUM tdep->st0_regnum +#define I387_NUM_XMM_REGS tdep->num_xmm_regs + + if (I387_NUM_XMM_REGS == 0) + return 0; + + return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM); + +#undef I387_ST0_REGNUM +#undef I387_NUM_XMM_REGS } -int -i386_fpc_regnum_p (int regnum) +static int +i386_mxcsr_regnum_p (struct gdbarch *gdbarch, int regnum) { - return (regnum < NUM_REGS - && (FPC_REGNUM <= regnum && regnum < XMM0_REGNUM)); + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + +#define I387_ST0_REGNUM tdep->st0_regnum +#define I387_NUM_XMM_REGS tdep->num_xmm_regs + + if (I387_NUM_XMM_REGS == 0) + return 0; + + return (regnum == I387_MXCSR_REGNUM); + +#undef I387_ST0_REGNUM +#undef I387_NUM_XMM_REGS } -/* SSE register? */ +#define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum) +#define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum) +#define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs) + +/* FP register? */ int -i386_sse_regnum_p (int regnum) +i386_fp_regnum_p (int regnum) { - return (regnum < NUM_REGS - && (XMM0_REGNUM <= regnum && regnum < MXCSR_REGNUM)); + if (I387_ST0_REGNUM < 0) + return 0; + + return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM); } int -i386_mxcsr_regnum_p (int regnum) +i386_fpc_regnum_p (int regnum) { - return (regnum < NUM_REGS - && regnum == MXCSR_REGNUM); + if (I387_ST0_REGNUM < 0) + return 0; + + return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM); } /* Return the name of register REG. */ @@ -135,12 +157,12 @@ i386_mxcsr_regnum_p (int regnum) const char * i386_register_name (int reg) { + if (i386_mmx_regnum_p (current_gdbarch, reg)) + return i386_mmx_names[reg - I387_MM0_REGNUM]; + if (reg >= 0 && reg < i386_num_register_names) return i386_register_names[reg]; - if (i386_mmx_regnum_p (reg)) - return i386_mmx_names[reg - MM0_REGNUM]; - return NULL; } @@ -159,17 +181,17 @@ i386_stab_reg_to_regnum (int reg) else if (reg >= 12 && reg <= 19) { /* Floating-point registers. */ - return reg - 12 + FP0_REGNUM; + return reg - 12 + I387_ST0_REGNUM; } else if (reg >= 21 && reg <= 28) { /* SSE registers. */ - return reg - 21 + XMM0_REGNUM; + return reg - 21 + I387_XMM0_REGNUM; } else if (reg >= 29 && reg <= 36) { /* MMX registers. */ - return reg - 29 + MM0_REGNUM; + return reg - 29 + I387_MM0_REGNUM; } /* This will hopefully provoke a warning. */ @@ -192,7 +214,7 @@ i386_dwarf_reg_to_regnum (int reg) else if (reg >= 11 && reg <= 18) { /* Floating-point registers. */ - return reg - 11 + FP0_REGNUM; + return reg - 11 + I387_ST0_REGNUM; } else if (reg >= 21) { @@ -203,6 +225,10 @@ i386_dwarf_reg_to_regnum (int reg) /* This will hopefully provoke a warning. */ return NUM_REGS + NUM_PSEUDO_REGS; } + +#undef I387_ST0_REGNUM +#undef I387_MM0_REGNUM +#undef I387_NUM_XMM_REGS /* This is the variable that is set with "set disassembly-flavor", and @@ -248,7 +274,7 @@ i386_breakpoint_from_pc (CORE_ADDR *pc, int *len) /* The maximum number of saved registers. This should include all registers mentioned above, and %eip. */ -#define I386_NUM_SAVED_REGS 9 +#define I386_NUM_SAVED_REGS I386_NUM_GREGS struct i386_frame_cache { @@ -448,6 +474,7 @@ i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc, struct i386_frame_cache *cache) { unsigned char op; + int skip = 0; if (current_pc <= pc) return current_pc; @@ -465,25 +492,68 @@ i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc, if (current_pc <= pc + 1) return current_pc; - /* Check for `movl %esp, %ebp' -- can be written in two ways. */ op = read_memory_unsigned_integer (pc + 1, 1); + + /* Check for some special instructions that might be migrated + by GCC into the prologue. We check for + + xorl %ebx, %ebx + xorl %ecx, %ecx + xorl %edx, %edx + xorl %eax, %eax + + and the equivalent + + subl %ebx, %ebx + subl %ecx, %ecx + subl %edx, %edx + subl %eax, %eax + + Because of the symmetry, there are actually two ways to + encode these instructions; with opcode bytes 0x29 and 0x2b + for `subl' and opcode bytes 0x31 and 0x33 for `xorl'. + + Make sure we only skip these instructions if we later see the + `movl %esp, %ebp' that actually sets up the frame. */ + while (op == 0x29 || op == 0x2b || op == 0x31 || op == 0x33) + { + op = read_memory_unsigned_integer (pc + skip + 2, 1); + switch (op) + { + case 0xdb: /* %ebx */ + case 0xc9: /* %ecx */ + case 0xd2: /* %edx */ + case 0xc0: /* %eax */ + skip += 2; + break; + default: + return pc + 1; + } + + op = read_memory_unsigned_integer (pc + skip + 1, 1); + } + + /* Check for `movl %esp, %ebp' -- can be written in two ways. */ switch (op) { case 0x8b: - if (read_memory_unsigned_integer (pc + 2, 1) != 0xec) + if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xec) return pc + 1; break; case 0x89: - if (read_memory_unsigned_integer (pc + 2, 1) != 0xe5) + if (read_memory_unsigned_integer (pc + skip + 2, 1) != 0xe5) return pc + 1; break; default: return pc + 1; } - /* OK, we actually have a frame. We just don't know how large it is - yet. Set its size to zero. We'll adjust it if necessary. */ + /* OK, we actually have a frame. We just don't know how large + it is yet. Set its size to zero. We'll adjust it if + necessary. We also now commit to skipping the special + instructions mentioned before. */ cache->locals = 0; + pc += skip; /* If that's all, return now. */ if (current_pc <= pc + 3) @@ -543,23 +613,22 @@ static CORE_ADDR i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, struct i386_frame_cache *cache) { - if (cache->locals >= 0) - { - CORE_ADDR offset; - unsigned char op; - int i; + CORE_ADDR offset = 0; + unsigned char op; + int i; - offset = - 4 - cache->locals; - for (i = 0; i < 8 && pc < current_pc; i++) - { - op = read_memory_unsigned_integer (pc, 1); - if (op < 0x50 || op > 0x57) - break; + if (cache->locals > 0) + offset -= cache->locals; + for (i = 0; i < 8 && pc < current_pc; i++) + { + op = read_memory_unsigned_integer (pc, 1); + if (op < 0x50 || op > 0x57) + break; - cache->saved_regs[op - 0x50] = offset; - offset -= 4; - pc++; - } + offset -= 4; + cache->saved_regs[op - 0x50] = offset; + cache->sp_offset += 4; + pc++; } return pc; @@ -760,6 +829,7 @@ i386_frame_this_id (struct frame_info *next_frame, void **this_cache, if (cache->base == 0) return; + /* See the end of i386_push_dummy_call. */ (*this_id) = frame_id_build (cache->base + 8, cache->pc); } @@ -803,7 +873,8 @@ i386_frame_prev_register (struct frame_info *next_frame, void **this_cache, ULONGEST val; /* Clear the direction flag. */ - frame_unwind_unsigned_register (next_frame, PS_REGNUM, &val); + val = frame_unwind_register_unsigned (next_frame, + I386_EFLAGS_REGNUM); val &= ~(1 << 10); store_unsigned_integer (valuep, 4, val); } @@ -859,7 +930,7 @@ static const struct frame_unwind i386_frame_unwind = }; static const struct frame_unwind * -i386_frame_p (CORE_ADDR pc) +i386_frame_sniffer (struct frame_info *next_frame) { return &i386_frame_unwind; } @@ -884,8 +955,21 @@ i386_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache) cache->base = extract_unsigned_integer (buf, 4) - 4; addr = tdep->sigcontext_addr (next_frame); - cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; - cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; + if (tdep->sc_reg_offset) + { + int i; + + gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); + + for (i = 0; i < tdep->sc_num_regs; i++) + if (tdep->sc_reg_offset[i] != -1) + cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; + } + else + { + cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; + cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; + } *this_cache = cache; return cache; @@ -898,6 +982,7 @@ i386_sigtramp_frame_this_id (struct frame_info *next_frame, void **this_cache, struct i386_frame_cache *cache = i386_sigtramp_frame_cache (next_frame, this_cache); + /* See the end of i386_push_dummy_call. */ (*this_id) = frame_id_build (cache->base + 8, frame_pc_unwind (next_frame)); } @@ -923,10 +1008,16 @@ static const struct frame_unwind i386_sigtramp_frame_unwind = }; static const struct frame_unwind * -i386_sigtramp_frame_p (CORE_ADDR pc) +i386_sigtramp_frame_sniffer (struct frame_info *next_frame) { + CORE_ADDR pc = frame_pc_unwind (next_frame); char *name; + /* We shouldn't even bother to try if the OSABI didn't register + a sigcontext_addr handler. */ + if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) + return NULL; + find_pc_partial_function (pc, &name, NULL, NULL); if (PC_IN_SIGTRAMP (pc, name)) return &i386_sigtramp_frame_unwind; @@ -951,12 +1042,6 @@ static const struct frame_base i386_frame_base = i386_frame_base_address }; -static void -i386_save_dummy_frame_tos (CORE_ADDR sp) -{ - generic_save_dummy_frame_tos (sp + 8); -} - static struct frame_id i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) { @@ -966,6 +1051,7 @@ i386_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) frame_unwind_register (next_frame, I386_EBP_REGNUM, buf); fp = extract_unsigned_integer (buf, 4); + /* See the end of i386_push_dummy_call. */ return frame_id_build (fp + 8, frame_pc_unwind (next_frame)); } @@ -991,11 +1077,14 @@ i386_get_longjmp_target (CORE_ADDR *pc) if (jb_pc_offset == -1) return 0; - sp = read_register (SP_REGNUM); + /* Don't use I386_ESP_REGNUM here, since this function is also used + for AMD64. */ + regcache_cooked_read (current_regcache, SP_REGNUM, buf); + sp = extract_typed_address (buf, builtin_type_void_data_ptr); if (target_read_memory (sp + len, buf, len)) return 0; - jb_addr = extract_typed_address (buf, builtin_type_void_func_ptr); + jb_addr = extract_typed_address (buf, builtin_type_void_data_ptr); if (target_read_memory (jb_addr + jb_pc_offset, buf, len)) return 0; @@ -1005,9 +1094,10 @@ i386_get_longjmp_target (CORE_ADDR *pc) static CORE_ADDR -i386_push_dummy_call (struct gdbarch *gdbarch, struct regcache *regcache, - CORE_ADDR dummy_addr, int nargs, struct value **args, - CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr) +i386_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, + struct regcache *regcache, CORE_ADDR bp_addr, int nargs, + struct value **args, CORE_ADDR sp, int struct_return, + CORE_ADDR struct_addr) { char buf[4]; int i; @@ -1038,7 +1128,7 @@ i386_push_dummy_call (struct gdbarch *gdbarch, struct regcache *regcache, /* Store return address. */ sp -= 4; - store_unsigned_integer (buf, 4, dummy_addr); + store_unsigned_integer (buf, 4, bp_addr); write_memory (sp, buf, 4); /* Finally, update the stack pointer... */ @@ -1048,7 +1138,16 @@ i386_push_dummy_call (struct gdbarch *gdbarch, struct regcache *regcache, /* ...and fake a frame pointer. */ regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); - return sp; + /* MarkK wrote: This "+ 8" is all over the place: + (i386_frame_this_id, i386_sigtramp_frame_this_id, + i386_unwind_dummy_id). It's there, since all frame unwinders for + a given target have to agree (within a certain margin) on the + defenition of the stack address of a frame. Otherwise + frame_id_inner() won't work correctly. Since DWARF2/GCC uses the + stack address *before* the function call as a frame's CFA. On + the i386, when %ebp is used as a frame pointer, the offset + between the contents %ebp and the CFA as defined by GCC. */ + return sp + 8; } /* These registers are used for returning integers (and on some @@ -1057,28 +1156,20 @@ i386_push_dummy_call (struct gdbarch *gdbarch, struct regcache *regcache, #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */ #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */ -/* Extract from an array REGBUF containing the (raw) register state, a - function return value of TYPE, and copy that, in virtual format, - into VALBUF. */ +/* Read, for architecture GDBARCH, a function return value of TYPE + from REGCACHE, and copy that into VALBUF. */ static void -i386_extract_return_value (struct type *type, struct regcache *regcache, - void *dst) +i386_extract_return_value (struct gdbarch *gdbarch, struct type *type, + struct regcache *regcache, void *valbuf) { - bfd_byte *valbuf = dst; + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); int len = TYPE_LENGTH (type); char buf[I386_MAX_REGISTER_SIZE]; - if (TYPE_CODE (type) == TYPE_CODE_STRUCT - && TYPE_NFIELDS (type) == 1) - { - i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); - return; - } - if (TYPE_CODE (type) == TYPE_CODE_FLT) { - if (FP0_REGNUM < 0) + if (tdep->st0_regnum < 0) { warning ("Cannot find floating-point return value."); memset (valbuf, 0, len); @@ -1094,8 +1185,8 @@ i386_extract_return_value (struct type *type, struct regcache *regcache, } else { - int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); - int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); + int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); + int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); if (len <= low_size) { @@ -1107,7 +1198,7 @@ i386_extract_return_value (struct type *type, struct regcache *regcache, regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); memcpy (valbuf, buf, low_size); regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); - memcpy (valbuf + low_size, buf, len - low_size); + memcpy ((char *) valbuf + low_size, buf, len - low_size); } else internal_error (__FILE__, __LINE__, @@ -1115,28 +1206,26 @@ i386_extract_return_value (struct type *type, struct regcache *regcache, } } -/* Write into the appropriate registers a function return value stored - in VALBUF of type TYPE, given in virtual format. */ +/* Write, for architecture GDBARCH, a function return value of TYPE + from VALBUF into REGCACHE. */ static void -i386_store_return_value (struct type *type, struct regcache *regcache, - const void *valbuf) +i386_store_return_value (struct gdbarch *gdbarch, struct type *type, + struct regcache *regcache, const void *valbuf) { + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); int len = TYPE_LENGTH (type); - if (TYPE_CODE (type) == TYPE_CODE_STRUCT - && TYPE_NFIELDS (type) == 1) - { - i386_store_return_value (TYPE_FIELD_TYPE (type, 0), regcache, valbuf); - return; - } + /* Define I387_ST0_REGNUM such that we use the proper definitions + for the architecture. */ +#define I387_ST0_REGNUM I386_ST0_REGNUM if (TYPE_CODE (type) == TYPE_CODE_FLT) { ULONGEST fstat; - char buf[FPU_REG_RAW_SIZE]; + char buf[I386_MAX_REGISTER_SIZE]; - if (FP0_REGNUM < 0) + if (tdep->st0_regnum < 0) { warning ("Cannot set floating-point return value."); return; @@ -1157,19 +1246,19 @@ i386_store_return_value (struct type *type, struct regcache *regcache, actual value doesn't really matter, but 7 is what a normal function return would end up with if the program started out with a freshly initialized FPU. */ - regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); + regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat); fstat |= (7 << 11); - regcache_raw_write_unsigned (regcache, FSTAT_REGNUM, fstat); + regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat); /* Mark %st(1) through %st(7) as empty. Since we set the top of the floating-point register stack to 7, the appropriate value for the tag word is 0x3fff. */ - regcache_raw_write_unsigned (regcache, FTAG_REGNUM, 0x3fff); + regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff); } else { - int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM); - int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM); + int low_size = register_size (current_gdbarch, LOW_RETURN_REGNUM); + int high_size = register_size (current_gdbarch, HIGH_RETURN_REGNUM); if (len <= low_size) regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); @@ -1183,19 +1272,8 @@ i386_store_return_value (struct type *type, struct regcache *regcache, internal_error (__FILE__, __LINE__, "Cannot store return value of %d bytes long.", len); } -} -/* Extract from REGCACHE, which contains the (raw) register state, the - address in which a function should return its structure value, as a - CORE_ADDR. */ - -static CORE_ADDR -i386_extract_struct_value_address (struct regcache *regcache) -{ - char buf[4]; - - regcache_cooked_read (regcache, I386_EAX_REGNUM, buf); - return extract_unsigned_integer (buf, 4); +#undef I387_ST0_REGNUM } @@ -1213,20 +1291,62 @@ static const char *valid_conventions[] = }; static const char *struct_convention = default_struct_convention; +/* Return non-zero if TYPE, which is assumed to be a structure or + union type, should be returned in registers for architecture + GDBARCH. */ + static int -i386_use_struct_convention (int gcc_p, struct type *type) +i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type) { - enum struct_return struct_return; + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + enum type_code code = TYPE_CODE (type); + int len = TYPE_LENGTH (type); - if (struct_convention == default_struct_convention) - struct_return = gdbarch_tdep (current_gdbarch)->struct_return; - else if (struct_convention == pcc_struct_convention) - struct_return = pcc_struct_return; - else - struct_return = reg_struct_return; + gdb_assert (code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION); + + if (struct_convention == pcc_struct_convention + || (struct_convention == default_struct_convention + && tdep->struct_return == pcc_struct_return)) + return 0; + + return (len == 1 || len == 2 || len == 4 || len == 8); +} + +/* Determine, for architecture GDBARCH, how a return value of TYPE + should be returned. If it is supposed to be returned in registers, + and READBUF is non-zero, read the appropriate value from REGCACHE, + and copy it into READBUF. If WRITEBUF is non-zero, write the value + from WRITEBUF into REGCACHE. */ + +static enum return_value_convention +i386_return_value (struct gdbarch *gdbarch, struct type *type, + struct regcache *regcache, void *readbuf, + const void *writebuf) +{ + enum type_code code = TYPE_CODE (type); + + if ((code == TYPE_CODE_STRUCT || code == TYPE_CODE_UNION) + && !i386_reg_struct_return_p (gdbarch, type)) + return RETURN_VALUE_STRUCT_CONVENTION; + + /* This special case is for structures consisting of a single + `float' or `double' member. These structures are returned in + %st(0). For these structures, we call ourselves recursively, + changing TYPE into the type of the first member of the structure. + Since that should work for all structures that have only one + member, we don't bother to check the member's type here. */ + if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) + { + type = check_typedef (TYPE_FIELD_TYPE (type, 0)); + return i386_return_value (gdbarch, type, regcache, readbuf, writebuf); + } + + if (readbuf) + i386_extract_return_value (gdbarch, type, regcache, readbuf); + if (writebuf) + i386_store_return_value (gdbarch, type, regcache, writebuf); - return generic_use_struct_convention (struct_return == reg_struct_return, - type); + return RETURN_VALUE_REGISTER_CONVENTION; } @@ -1244,10 +1364,10 @@ i386_register_type (struct gdbarch *gdbarch, int regnum) if (i386_fp_regnum_p (regnum)) return builtin_type_i387_ext; - if (i386_sse_regnum_p (regnum)) + if (i386_sse_regnum_p (gdbarch, regnum)) return builtin_type_vec128i; - if (i386_mmx_regnum_p (regnum)) + if (i386_mmx_regnum_p (gdbarch, regnum)) return builtin_type_vec64i; return builtin_type_int; @@ -1259,31 +1379,37 @@ i386_register_type (struct gdbarch *gdbarch, int regnum) static int i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) { - int mmxi; + struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); + int mmxreg, fpreg; ULONGEST fstat; int tos; - int fpi; - mmxi = regnum - MM0_REGNUM; - regcache_raw_read_unsigned (regcache, FSTAT_REGNUM, &fstat); + /* Define I387_ST0_REGNUM such that we use the proper definitions + for REGCACHE's architecture. */ +#define I387_ST0_REGNUM tdep->st0_regnum + + mmxreg = regnum - tdep->mm0_regnum; + regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat); tos = (fstat >> 11) & 0x7; - fpi = (mmxi + tos) % 8; + fpreg = (mmxreg + tos) % 8; + + return (I387_ST0_REGNUM + fpreg); - return (FP0_REGNUM + fpi); +#undef I387_ST0_REGNUM } static void i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, int regnum, void *buf) { - if (i386_mmx_regnum_p (regnum)) + if (i386_mmx_regnum_p (gdbarch, regnum)) { char mmx_buf[MAX_REGISTER_SIZE]; int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); /* Extract (always little endian). */ regcache_raw_read (regcache, fpnum, mmx_buf); - memcpy (buf, mmx_buf, REGISTER_RAW_SIZE (regnum)); + memcpy (buf, mmx_buf, register_size (gdbarch, regnum)); } else regcache_raw_read (regcache, regnum, buf); @@ -1293,7 +1419,7 @@ static void i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const void *buf) { - if (i386_mmx_regnum_p (regnum)) + if (i386_mmx_regnum_p (gdbarch, regnum)) { char mmx_buf[MAX_REGISTER_SIZE]; int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); @@ -1301,72 +1427,219 @@ i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, /* Read ... */ regcache_raw_read (regcache, fpnum, mmx_buf); /* ... Modify ... (always little endian). */ - memcpy (mmx_buf, buf, REGISTER_RAW_SIZE (regnum)); + memcpy (mmx_buf, buf, register_size (gdbarch, regnum)); /* ... Write. */ regcache_raw_write (regcache, fpnum, mmx_buf); } else regcache_raw_write (regcache, regnum, buf); } + + +/* Return the register number of the register allocated by GCC after + REGNUM, or -1 if there is no such register. */ + +static int +i386_next_regnum (int regnum) +{ + /* GCC allocates the registers in the order: + + %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ... + + Since storing a variable in %esp doesn't make any sense we return + -1 for %ebp and for %esp itself. */ + static int next_regnum[] = + { + I386_EDX_REGNUM, /* Slot for %eax. */ + I386_EBX_REGNUM, /* Slot for %ecx. */ + I386_ECX_REGNUM, /* Slot for %edx. */ + I386_ESI_REGNUM, /* Slot for %ebx. */ + -1, -1, /* Slots for %esp and %ebp. */ + I386_EDI_REGNUM, /* Slot for %esi. */ + I386_EBP_REGNUM /* Slot for %edi. */ + }; + + if (regnum >= 0 && regnum < sizeof (next_regnum) / sizeof (next_regnum[0])) + return next_regnum[regnum]; + + return -1; +} -/* Return true iff register REGNUM's virtual format is different from - its raw format. Note that this definition assumes that the host - supports IEEE 32-bit floats, since it doesn't say that SSE - registers need conversion. Even if we can't find a counterexample, - this is still sloppy. */ +/* Return nonzero if a value of type TYPE stored in register REGNUM + needs any special handling. */ static int -i386_register_convertible (int regnum) +i386_convert_register_p (int regnum, struct type *type) { + int len = TYPE_LENGTH (type); + + /* Values may be spread across multiple registers. Most debugging + formats aren't expressive enough to specify the locations, so + some heuristics is involved. Right now we only handle types that + have a length that is a multiple of the word size, since GCC + doesn't seem to put any other types into registers. */ + if (len > 4 && len % 4 == 0) + { + int last_regnum = regnum; + + while (len > 4) + { + last_regnum = i386_next_regnum (last_regnum); + len -= 4; + } + + if (last_regnum != -1) + return 1; + } + return i386_fp_regnum_p (regnum); } -/* Convert data from raw format for register REGNUM in buffer FROM to - virtual format with type TYPE in buffer TO. */ +/* Read a value of type TYPE from register REGNUM in frame FRAME, and + return its contents in TO. */ static void -i386_register_convert_to_virtual (int regnum, struct type *type, - char *from, char *to) +i386_register_to_value (struct frame_info *frame, int regnum, + struct type *type, void *to) { - gdb_assert (i386_fp_regnum_p (regnum)); + int len = TYPE_LENGTH (type); + char *buf = to; - /* We only support floating-point values. */ - if (TYPE_CODE (type) != TYPE_CODE_FLT) + /* FIXME: kettenis/20030609: What should we do if REGNUM isn't + available in FRAME (i.e. if it wasn't saved)? */ + + if (i386_fp_regnum_p (regnum)) { - warning ("Cannot convert floating-point register value " - "to non-floating-point type."); - memset (to, 0, TYPE_LENGTH (type)); + i387_register_to_value (frame, regnum, type, to); return; } - /* Convert to TYPE. This should be a no-op if TYPE is equivalent to - the extended floating-point format used by the FPU. */ - convert_typed_floating (from, builtin_type_i387_ext, to, type); + /* Read a value spread accross multiple registers. */ + + gdb_assert (len > 4 && len % 4 == 0); + + while (len > 0) + { + gdb_assert (regnum != -1); + gdb_assert (register_size (current_gdbarch, regnum) == 4); + + get_frame_register (frame, regnum, buf); + regnum = i386_next_regnum (regnum); + len -= 4; + buf += 4; + } } -/* Convert data from virtual format with type TYPE in buffer FROM to - raw format for register REGNUM in buffer TO. */ +/* Write the contents FROM of a value of type TYPE into register + REGNUM in frame FRAME. */ static void -i386_register_convert_to_raw (struct type *type, int regnum, - char *from, char *to) +i386_value_to_register (struct frame_info *frame, int regnum, + struct type *type, const void *from) { - gdb_assert (i386_fp_regnum_p (regnum)); + int len = TYPE_LENGTH (type); + const char *buf = from; - /* We only support floating-point values. */ - if (TYPE_CODE (type) != TYPE_CODE_FLT) + if (i386_fp_regnum_p (regnum)) { - warning ("Cannot convert non-floating-point type " - "to floating-point register value."); - memset (to, 0, TYPE_LENGTH (type)); + i387_value_to_register (frame, regnum, type, from); return; } - /* Convert from TYPE. This should be a no-op if TYPE is equivalent - to the extended floating-point format used by the FPU. */ - convert_typed_floating (from, type, to, builtin_type_i387_ext); + /* Write a value spread accross multiple registers. */ + + gdb_assert (len > 4 && len % 4 == 0); + + while (len > 0) + { + gdb_assert (regnum != -1); + gdb_assert (register_size (current_gdbarch, regnum) == 4); + + put_frame_register (frame, regnum, buf); + regnum = i386_next_regnum (regnum); + len -= 4; + buf += 4; + } } - + +/* Supply register REGNUM from the general-purpose register set REGSET + to register cache REGCACHE. If REGNUM is -1, do this for all + registers in REGSET. */ + +void +i386_supply_gregset (const struct regset *regset, struct regcache *regcache, + int regnum, const void *gregs, size_t len) +{ + const struct gdbarch_tdep *tdep = regset->descr; + const char *regs = gregs; + int i; + + gdb_assert (len == tdep->sizeof_gregset); + + for (i = 0; i < tdep->gregset_num_regs; i++) + { + if ((regnum == i || regnum == -1) + && tdep->gregset_reg_offset[i] != -1) + regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]); + } +} + +/* Supply register REGNUM from the floating-point register set REGSET + to register cache REGCACHE. If REGNUM is -1, do this for all + registers in REGSET. */ + +static void +i386_supply_fpregset (const struct regset *regset, struct regcache *regcache, + int regnum, const void *fpregs, size_t len) +{ + const struct gdbarch_tdep *tdep = regset->descr; + + if (len == I387_SIZEOF_FXSAVE) + { + i387_supply_fxsave (regcache, regnum, fpregs); + return; + } + + gdb_assert (len == tdep->sizeof_fpregset); + i387_supply_fsave (regcache, regnum, fpregs); +} + +/* Return the appropriate register set for the core section identified + by SECT_NAME and SECT_SIZE. */ + +const struct regset * +i386_regset_from_core_section (struct gdbarch *gdbarch, + const char *sect_name, size_t sect_size) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset) + { + if (tdep->gregset == NULL) + { + tdep->gregset = XMALLOC (struct regset); + tdep->gregset->descr = tdep; + tdep->gregset->supply_regset = i386_supply_gregset; + } + return tdep->gregset; + } + + if ((strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset) + || (strcmp (sect_name, ".reg-xfp") == 0 + && sect_size == I387_SIZEOF_FXSAVE)) + { + if (tdep->fpregset == NULL) + { + tdep->fpregset = XMALLOC (struct regset); + tdep->fpregset->descr = tdep; + tdep->fpregset->supply_regset = i386_supply_fpregset; + } + return tdep->fpregset; + } + + return NULL; +} + #ifdef STATIC_TRANSFORM_NAME /* SunPRO encodes the static variables. This is not related to C++ @@ -1431,7 +1704,7 @@ i386_pc_in_sigtramp (CORE_ADDR pc, char *name) deals with switching between those. */ static int -i386_print_insn (bfd_vma pc, disassemble_info *info) +i386_print_insn (bfd_vma pc, struct disassemble_info *info) { gdb_assert (disassembly_flavor == att_flavor || disassembly_flavor == intel_flavor); @@ -1574,11 +1847,11 @@ int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, struct reggroup *group) { - int sse_regnum_p = (i386_sse_regnum_p (regnum) - || i386_mxcsr_regnum_p (regnum)); + int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum) + || i386_mxcsr_regnum_p (gdbarch, regnum)); int fp_regnum_p = (i386_fp_regnum_p (regnum) || i386_fpc_regnum_p (regnum)); - int mmx_regnum_p = (i386_mmx_regnum_p (regnum)); + int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum)); if (group == i386_mmx_reggroup) return mmx_regnum_p; @@ -1595,6 +1868,17 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, } +/* Get the ARGIth function argument for the current function. */ + +static CORE_ADDR +i386_fetch_pointer_argument (struct frame_info *frame, int argi, + struct type *type) +{ + CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM); + return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4); +} + + static struct gdbarch * i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { @@ -1610,16 +1894,46 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep = XMALLOC (struct gdbarch_tdep); gdbarch = gdbarch_alloc (&info, tdep); - /* The i386 default settings don't include the SSE registers. - FIXME: kettenis/20020614: They do include the FPU registers for - now, which probably is not quite right. */ - tdep->num_xmm_regs = 0; + /* General-purpose registers. */ + tdep->gregset = NULL; + tdep->gregset_reg_offset = NULL; + tdep->gregset_num_regs = I386_NUM_GREGS; + tdep->sizeof_gregset = 0; + + /* Floating-point registers. */ + tdep->fpregset = NULL; + tdep->sizeof_fpregset = I387_SIZEOF_FSAVE; + + /* The default settings include the FPU registers, the MMX registers + and the SSE registers. This can be overidden for a specific ABI + by adjusting the members `st0_regnum', `mm0_regnum' and + `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers + will show up in the output of "info all-registers". Ideally we + should try to autodetect whether they are available, such that we + can prevent "info all-registers" from displaying registers that + aren't available. + + NOTE: kevinb/2003-07-13: ... if it's a choice between printing + [the SSE registers] always (even when they don't exist) or never + showing them to the user (even when they do exist), I prefer the + former over the latter. */ + + tdep->st0_regnum = I386_ST0_REGNUM; + + /* The MMX registers are implemented as pseudo-registers. Put off + caclulating the register number for %mm0 until we know the number + of raw registers. */ + tdep->mm0_regnum = 0; + + /* I386_NUM_XREGS includes %mxcsr, so substract one. */ + tdep->num_xmm_regs = I386_NUM_XREGS - 1; tdep->jb_pc_offset = -1; tdep->struct_return = pcc_struct_return; tdep->sigtramp_start = 0; tdep->sigtramp_end = 0; tdep->sigcontext_addr = NULL; + tdep->sc_reg_offset = NULL; tdep->sc_pc_offset = -1; tdep->sc_sp_offset = -1; @@ -1634,9 +1948,9 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) alignment. */ set_gdbarch_long_double_bit (gdbarch, 96); - /* The default ABI includes general-purpose registers and - floating-point registers. */ - set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS); + /* The default ABI includes general-purpose registers, + floating-point registers, and the SSE registers. */ + set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS); set_gdbarch_register_name (gdbarch, i386_register_name); set_gdbarch_register_type (gdbarch, i386_register_type); @@ -1664,16 +1978,11 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* Call dummy code. */ set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); - set_gdbarch_register_convertible (gdbarch, i386_register_convertible); - set_gdbarch_register_convert_to_virtual (gdbarch, - i386_register_convert_to_virtual); - set_gdbarch_register_convert_to_raw (gdbarch, i386_register_convert_to_raw); + set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p); + set_gdbarch_register_to_value (gdbarch, i386_register_to_value); + set_gdbarch_value_to_register (gdbarch, i386_value_to_register); - set_gdbarch_extract_return_value (gdbarch, i386_extract_return_value); - set_gdbarch_store_return_value (gdbarch, i386_store_return_value); - set_gdbarch_extract_struct_value_address (gdbarch, - i386_extract_struct_value_address); - set_gdbarch_use_struct_convention (gdbarch, i386_use_struct_convention); + set_gdbarch_return_value (gdbarch, i386_return_value); set_gdbarch_skip_prologue (gdbarch, i386_skip_prologue); @@ -1682,10 +1991,8 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); set_gdbarch_decr_pc_after_break (gdbarch, 1); - set_gdbarch_function_start_offset (gdbarch, 0); set_gdbarch_frame_args_skip (gdbarch, 8); - set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); set_gdbarch_pc_in_sigtramp (gdbarch, i386_pc_in_sigtramp); /* Wire in the MMX registers. */ @@ -1696,7 +2003,6 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_print_insn (gdbarch, i386_print_insn); set_gdbarch_unwind_dummy_id (gdbarch, i386_unwind_dummy_id); - set_gdbarch_save_dummy_frame_tos (gdbarch, i386_save_dummy_frame_tos); set_gdbarch_unwind_pc (gdbarch, i386_unwind_pc); @@ -1704,13 +2010,31 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) i386_add_reggroups (gdbarch); set_gdbarch_register_reggroup_p (gdbarch, i386_register_reggroup_p); + /* Helper for function argument information. */ + set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument); + + /* Hook in the DWARF CFI frame unwinder. */ + frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); + frame_base_set_default (gdbarch, &i386_frame_base); /* Hook in ABI-specific overrides, if they have been registered. */ gdbarch_init_osabi (info, gdbarch); - frame_unwind_append_predicate (gdbarch, i386_sigtramp_frame_p); - frame_unwind_append_predicate (gdbarch, i386_frame_p); + frame_unwind_append_sniffer (gdbarch, i386_sigtramp_frame_sniffer); + frame_unwind_append_sniffer (gdbarch, i386_frame_sniffer); + + /* If we have a register mapping, enable the generic core file + support, unless it has already been enabled. */ + if (tdep->gregset_reg_offset + && !gdbarch_regset_from_core_section_p (gdbarch)) + set_gdbarch_regset_from_core_section (gdbarch, + i386_regset_from_core_section); + + /* Unless support for MMX has been disabled, make %mm0 the first + pseudo-register. */ + if (tdep->mm0_regnum == 0) + tdep->mm0_regnum = gdbarch_num_regs (gdbarch); return gdbarch; }