X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Fppcnbsd-tdep.c;h=0028e51be06dcfc2153d41e76626d0b5c6c0026d;hb=7bab9b58fd9c05c20cbd56d778ffa05d9fe3af3e;hp=21ab858768e792be1b74fef812c5b1a822596e85;hpb=516034834f1bcade05e3dcd85e9c7c8b899adbd6;p=deliverable%2Fbinutils-gdb.git

diff --git a/gdb/ppcnbsd-tdep.c b/gdb/ppcnbsd-tdep.c
index 21ab858768..0028e51be0 100644
--- a/gdb/ppcnbsd-tdep.c
+++ b/gdb/ppcnbsd-tdep.c
@@ -1,12 +1,14 @@
-/* Target-dependent code for PowerPC systems running NetBSD.
-   Copyright 2002, 2003 Free Software Foundation, Inc.
+/* Target-dependent code for NetBSD/powerpc.
+
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+
    Contributed by Wasabi Systems, Inc.
 
    This file is part of GDB.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
+   the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
@@ -15,204 +17,180 @@
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place - Suite 330,
-   Boston, MA 02111-1307, USA.  */
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 #include "defs.h"
-#include "gdbcore.h"
-#include "regcache.h"
-#include "target.h"
-#include "breakpoint.h"
-#include "value.h"
+#include "gdbtypes.h"
 #include "osabi.h"
+#include "regcache.h"
+#include "regset.h"
+#include "trad-frame.h"
+#include "tramp-frame.h"
 
 #include "ppc-tdep.h"
 #include "ppcnbsd-tdep.h"
-#include "nbsd-tdep.h"
-
 #include "solib-svr4.h"
 
-#define REG_FIXREG_OFFSET(x)	((x) * 4)
-#define REG_LR_OFFSET		(32 * 4)
-#define REG_CR_OFFSET		(33 * 4)
-#define REG_XER_OFFSET		(34 * 4)
-#define REG_CTR_OFFSET		(35 * 4)
-#define REG_PC_OFFSET		(36 * 4)
-#define SIZEOF_STRUCT_REG	(37 * 4)
-
-#define FPREG_FPR_OFFSET(x)	((x) * 8)
-#define FPREG_FPSCR_OFFSET	(32 * 8)
-#define SIZEOF_STRUCT_FPREG	(33 * 8)
-
-void
-ppcnbsd_supply_reg (char *regs, int regno)
-{
-  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-  int i;
-
-  for (i = 0; i <= 31; i++)
-    {
-      if (regno == i || regno == -1)
-	supply_register (i, regs + REG_FIXREG_OFFSET (i));
-    }
-
-  if (regno == tdep->ppc_lr_regnum || regno == -1)
-    supply_register (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
-
-  if (regno == tdep->ppc_cr_regnum || regno == -1)
-    supply_register (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
+/* Register offsets from <machine/reg.h>.  */
+struct ppc_reg_offsets ppcnbsd_reg_offsets;
+
 
-  if (regno == tdep->ppc_xer_regnum || regno == -1)
-    supply_register (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
+/* Core file support.  */
 
-  if (regno == tdep->ppc_ctr_regnum || regno == -1)
-    supply_register (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
-
-  if (regno == PC_REGNUM || regno == -1)
-    supply_register (PC_REGNUM, regs + REG_PC_OFFSET);
-}
-
-void
-ppcnbsd_fill_reg (char *regs, int regno)
-{
-  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-  int i;
-
-  for (i = 0; i <= 31; i++)
-    {
-      if (regno == i || regno == -1)
-	regcache_collect (i, regs + REG_FIXREG_OFFSET (i));
-    }
-
-  if (regno == tdep->ppc_lr_regnum || regno == -1)
-    regcache_collect (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
-
-  if (regno == tdep->ppc_cr_regnum || regno == -1)
-    regcache_collect (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
-
-  if (regno == tdep->ppc_xer_regnum || regno == -1)
-    regcache_collect (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
-
-  if (regno == tdep->ppc_ctr_regnum || regno == -1)
-    regcache_collect (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
-
-  if (regno == PC_REGNUM || regno == -1)
-    regcache_collect (PC_REGNUM, regs + REG_PC_OFFSET);
-}
+/* NetBSD/powerpc register sets.  */
 
-void
-ppcnbsd_supply_fpreg (char *fpregs, int regno)
+const struct regset ppcnbsd_gregset =
 {
-  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-  int i;
-
-  for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
-    {
-      if (regno == i || regno == -1)
-	supply_register (i, fpregs + FPREG_FPR_OFFSET (i - FP0_REGNUM));
-    }
-
-  if (regno == tdep->ppc_fpscr_regnum || regno == -1)
-    supply_register (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
-}
+  &ppcnbsd_reg_offsets,
+  ppc_supply_gregset
+};
 
-void
-ppcnbsd_fill_fpreg (char *fpregs, int regno)
+const struct regset ppcnbsd_fpregset =
 {
-  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
-  int i;
-
-  for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
-    {
-      if (regno == i || regno == -1)
-	regcache_collect (i, fpregs + FPREG_FPR_OFFSET (i - FP0_REGNUM));
-    }
+  &ppcnbsd_reg_offsets,
+  ppc_supply_fpregset
+};
 
-  if (regno == tdep->ppc_fpscr_regnum || regno == -1)
-    regcache_collect (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
-}
+/* Iterate over core file register note sections.  */
 
 static void
-fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
-                      CORE_ADDR ignore)
+ppcnbsd_iterate_over_regset_sections (struct gdbarch *gdbarch,
+				      iterate_over_regset_sections_cb *cb,
+				      void *cb_data,
+				      const struct regcache *regcache)
 {
-  char *regs, *fpregs;
+  cb (".reg", 148, &ppcnbsd_gregset, NULL, cb_data);
+  cb (".reg2", 264, &ppcnbsd_fpregset, NULL, cb_data);
+}
+
 
-  /* We get everything from one section.  */
-  if (which != 0)
-    return;
+/* NetBSD is confused.  It appears that 1.5 was using the correct SVR4
+   convention but, 1.6 switched to the below broken convention.  For
+   the moment use the broken convention.  Ulgh!  */
 
-  regs = core_reg_sect;
-  fpregs = core_reg_sect + SIZEOF_STRUCT_REG;
+static enum return_value_convention
+ppcnbsd_return_value (struct gdbarch *gdbarch, struct value *function,
+		      struct type *valtype, struct regcache *regcache,
+		      gdb_byte *readbuf, const gdb_byte *writebuf)
+{
+#if 0
+  if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
+       || TYPE_CODE (valtype) == TYPE_CODE_UNION)
+      && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
+	    && TYPE_VECTOR (valtype))
+      && !(TYPE_LENGTH (valtype) == 1
+	   || TYPE_LENGTH (valtype) == 2
+	   || TYPE_LENGTH (valtype) == 4
+	   || TYPE_LENGTH (valtype) == 8))
+    return RETURN_VALUE_STRUCT_CONVENTION;
+  else
+#endif
+    return ppc_sysv_abi_broken_return_value (gdbarch, function, valtype,
+					     regcache, readbuf, writebuf);
+}
+
 
-  /* Integer registers.  */
-  ppcnbsd_supply_reg (regs, -1);
+/* Signal trampolines.  */
 
-  /* Floating point registers.  */
-  ppcnbsd_supply_fpreg (fpregs, -1);
-}
+static const struct tramp_frame ppcnbsd2_sigtramp;
 
 static void
-fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
-                         CORE_ADDR ignore)
+ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self,
+			     struct frame_info *this_frame,
+			     struct trad_frame_cache *this_cache,
+			     CORE_ADDR func)
 {
-  switch (which)
+  struct gdbarch *gdbarch = get_frame_arch (this_frame);
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+  CORE_ADDR addr, base;
+  int i;
+
+  base = get_frame_register_unsigned (this_frame,
+				      gdbarch_sp_regnum (gdbarch));
+  if (self == &ppcnbsd2_sigtramp)
+    addr = base + 0x10 + 2 * tdep->wordsize;
+  else
+    addr = base + 0x18 + 2 * tdep->wordsize;
+  for (i = 0; i < ppc_num_gprs; i++, addr += tdep->wordsize)
     {
-    case 0:  /* Integer registers.  */
-      if (core_reg_size != SIZEOF_STRUCT_REG)
-	warning ("Wrong size register set in core file.");
-      else
-	ppcnbsd_supply_reg (core_reg_sect, -1);
-      break;
-
-    case 2:  /* Floating point registers.  */
-      if (core_reg_size != SIZEOF_STRUCT_FPREG)
-	warning ("Wrong size FP register set in core file.");
-      else
-	ppcnbsd_supply_fpreg (core_reg_sect, -1);
-      break;
-
-    default:
-      /* Don't know what kind of register request this is; just ignore it.  */
-      break;
+      int regnum = i + tdep->ppc_gp0_regnum;
+      trad_frame_set_reg_addr (this_cache, regnum, addr);
     }
+  trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, addr);
+  addr += tdep->wordsize;
+  trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, addr);
+  addr += tdep->wordsize;
+  trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, addr);
+  addr += tdep->wordsize;
+  trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, addr);
+  addr += tdep->wordsize;
+  trad_frame_set_reg_addr (this_cache, gdbarch_pc_regnum (gdbarch),
+			   addr); /* SRR0?  */
+  addr += tdep->wordsize;
+
+  /* Construct the frame ID using the function start.  */
+  trad_frame_set_id (this_cache, frame_id_build (base, func));
 }
 
-static struct core_fns ppcnbsd_core_fns =
+static const struct tramp_frame ppcnbsd_sigtramp =
 {
-  bfd_target_unknown_flavour,		/* core_flavour */
-  default_check_format,			/* check_format */
-  default_core_sniffer,			/* core_sniffer */
-  fetch_core_registers,			/* core_read_registers */
-  NULL					/* next */
+  SIGTRAMP_FRAME,
+  4,
+  {
+    { 0x3821fff0, -1 },		/* add r1,r1,-16 */
+    { 0x4e800021, -1 },		/* blrl */
+    { 0x38610018, -1 },		/* addi r3,r1,24 */
+    { 0x38000127, -1 },		/* li r0,295 */
+    { 0x44000002, -1 },		/* sc */
+    { 0x38000001, -1 },		/* li r0,1 */
+    { 0x44000002, -1 },		/* sc */
+    { TRAMP_SENTINEL_INSN, -1 }
+  },
+  ppcnbsd_sigtramp_cache_init
 };
 
-static struct core_fns ppcnbsd_elfcore_fns =
-{
-  bfd_target_elf_flavour,		/* core_flavour */
-  default_check_format,			/* check_format */
-  default_core_sniffer,			/* core_sniffer */
-  fetch_elfcore_registers,		/* core_read_registers */
-  NULL					/* next */
-};
+/* NetBSD 2.0 introduced a slightly different signal trampoline.  */
 
-static int
-ppcnbsd_pc_in_sigtramp (CORE_ADDR pc, char *func_name)
+static const struct tramp_frame ppcnbsd2_sigtramp =
 {
-  /* FIXME: Need to add support for kernel-provided signal trampolines.  */
-  return (nbsd_pc_in_sigtramp (pc, func_name));
-}
+  SIGTRAMP_FRAME,
+  4,
+  {
+    { 0x3821fff0, -1 },		/* add r1,r1,-16 */
+    { 0x4e800021, -1 },		/* blrl */
+    { 0x38610010, -1 },		/* addi r3,r1,16 */
+    { 0x38000127, -1 },		/* li r0,295 */
+    { 0x44000002, -1 },		/* sc */
+    { 0x38000001, -1 },		/* li r0,1 */
+    { 0x44000002, -1 },		/* sc */
+    { TRAMP_SENTINEL_INSN, -1 }
+  },
+  ppcnbsd_sigtramp_cache_init
+};
+
 
 static void
 ppcnbsd_init_abi (struct gdbarch_info info,
                   struct gdbarch *gdbarch)
 {
-  set_gdbarch_pc_in_sigtramp (gdbarch, ppcnbsd_pc_in_sigtramp);
+  /* For NetBSD, this is an on again, off again thing.  Some systems
+     do use the broken struct convention, and some don't.  */
+  set_gdbarch_return_value (gdbarch, ppcnbsd_return_value);
+
+  /* NetBSD uses SVR4-style shared libraries.  */
+  set_solib_svr4_fetch_link_map_offsets
+    (gdbarch, svr4_ilp32_fetch_link_map_offsets);
+
+  set_gdbarch_iterate_over_regset_sections
+    (gdbarch, ppcnbsd_iterate_over_regset_sections);
 
-  set_solib_svr4_fetch_link_map_offsets (gdbarch,
-                                nbsd_ilp32_solib_svr4_fetch_link_map_offsets);
+  tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp);
+  tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd2_sigtramp);
 }
+
+
+/* Provide a prototype to silence -Wmissing-prototypes.  */
+void _initialize_ppcnbsd_tdep (void);
 
 void
 _initialize_ppcnbsd_tdep (void)
@@ -220,6 +198,30 @@ _initialize_ppcnbsd_tdep (void)
   gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF,
 			  ppcnbsd_init_abi);
 
-  add_core_fns (&ppcnbsd_core_fns);
-  add_core_fns (&ppcnbsd_elfcore_fns);
+  /* Avoid initializing the register offsets again if they were
+     already initailized by ppcnbsd-nat.c.  */
+  if (ppcnbsd_reg_offsets.pc_offset == 0)
+    {
+      /* General-purpose registers.  */
+      ppcnbsd_reg_offsets.r0_offset = 0;
+      ppcnbsd_reg_offsets.gpr_size = 4;
+      ppcnbsd_reg_offsets.xr_size = 4;
+      ppcnbsd_reg_offsets.lr_offset = 128;
+      ppcnbsd_reg_offsets.cr_offset = 132;
+      ppcnbsd_reg_offsets.xer_offset = 136;
+      ppcnbsd_reg_offsets.ctr_offset = 140;
+      ppcnbsd_reg_offsets.pc_offset = 144;
+      ppcnbsd_reg_offsets.ps_offset = -1;
+      ppcnbsd_reg_offsets.mq_offset = -1;
+
+      /* Floating-point registers.  */
+      ppcnbsd_reg_offsets.f0_offset = 0;
+      ppcnbsd_reg_offsets.fpscr_offset = 256;
+      ppcnbsd_reg_offsets.fpscr_size = 4;
+
+      /* AltiVec registers.  */
+      ppcnbsd_reg_offsets.vr0_offset = 0;
+      ppcnbsd_reg_offsets.vrsave_offset = 512;
+      ppcnbsd_reg_offsets.vscr_offset = 524;
+    }
 }