X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Fppcnbsd-tdep.c;h=ccf1b2ca64086a4ceae88e3eba65c4f802f13d74;hb=e34838f0f74e1fdb249bcdd822136c98375e4f4b;hp=6bbdf4f6ad1e4fff0e4c5422b663dbc129329b30;hpb=def18405fbc42d460b2282b273b8d597eff96ebf;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/ppcnbsd-tdep.c b/gdb/ppcnbsd-tdep.c index 6bbdf4f6ad..ccf1b2ca64 100644 --- a/gdb/ppcnbsd-tdep.c +++ b/gdb/ppcnbsd-tdep.c @@ -1,6 +1,7 @@ /* Target-dependent code for NetBSD/powerpc. - Copyright (C) 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. + Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + Free Software Foundation, Inc. Contributed by Wasabi Systems, Inc. @@ -8,7 +9,7 @@ This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or + the Free Software Foundation; either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, @@ -17,9 +18,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, - Boston, MA 02110-1301, USA. */ + along with this program. If not, see . */ #include "defs.h" #include "gdbtypes.h" @@ -42,7 +41,7 @@ struct ppc_reg_offsets ppcnbsd_reg_offsets; /* Core file support. */ -/* NetBSD/powerpc register set. */ +/* NetBSD/powerpc register sets. */ struct regset ppcnbsd_gregset = { @@ -78,9 +77,9 @@ ppcnbsd_regset_from_core_section (struct gdbarch *gdbarch, the moment use the broken convention. Ulgh!. */ static enum return_value_convention -ppcnbsd_return_value (struct gdbarch *gdbarch, struct type *valtype, - struct regcache *regcache, gdb_byte *readbuf, - const gdb_byte *writebuf) +ppcnbsd_return_value (struct gdbarch *gdbarch, struct type *func_type, + struct type *valtype, struct regcache *regcache, + gdb_byte *readbuf, const gdb_byte *writebuf) { #if 0 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT @@ -94,8 +93,8 @@ ppcnbsd_return_value (struct gdbarch *gdbarch, struct type *valtype, return RETURN_VALUE_STRUCT_CONVENTION; else #endif - return ppc_sysv_abi_broken_return_value (gdbarch, valtype, regcache, - readbuf, writebuf); + return ppc_sysv_abi_broken_return_value (gdbarch, func_type, valtype, + regcache, readbuf, writebuf); } @@ -105,16 +104,17 @@ static const struct tramp_frame ppcnbsd2_sigtramp; static void ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self, - struct frame_info *next_frame, + struct frame_info *this_frame, struct trad_frame_cache *this_cache, CORE_ADDR func) { - struct gdbarch *gdbarch = get_frame_arch (next_frame); + struct gdbarch *gdbarch = get_frame_arch (this_frame); struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); CORE_ADDR addr, base; int i; - base = frame_unwind_register_unsigned (next_frame, SP_REGNUM); + base = get_frame_register_unsigned (this_frame, + gdbarch_sp_regnum (gdbarch)); if (self == &ppcnbsd2_sigtramp) addr = base + 0x10 + 2 * tdep->wordsize; else @@ -132,7 +132,8 @@ ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self, addr += tdep->wordsize; trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, addr); addr += tdep->wordsize; - trad_frame_set_reg_addr (this_cache, PC_REGNUM, addr); /* SRR0? */ + trad_frame_set_reg_addr (this_cache, gdbarch_pc_regnum (gdbarch), + addr); /* SRR0? */ addr += tdep->wordsize; /* Construct the frame ID using the function start. */ @@ -211,6 +212,8 @@ _initialize_ppcnbsd_tdep (void) { /* General-purpose registers. */ ppcnbsd_reg_offsets.r0_offset = 0; + ppcnbsd_reg_offsets.gpr_size = 4; + ppcnbsd_reg_offsets.xr_size = 4; ppcnbsd_reg_offsets.lr_offset = 128; ppcnbsd_reg_offsets.cr_offset = 132; ppcnbsd_reg_offsets.xer_offset = 136; @@ -222,6 +225,7 @@ _initialize_ppcnbsd_tdep (void) /* Floating-point registers. */ ppcnbsd_reg_offsets.f0_offset = 0; ppcnbsd_reg_offsets.fpscr_offset = 256; + ppcnbsd_reg_offsets.fpscr_size = 4; /* AltiVec registers. */ ppcnbsd_reg_offsets.vr0_offset = 0;