X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Frl78-tdep.c;h=f66cda88179b7f27be99cd52a8cd9c0c17515b61;hb=db178f47dd4c9d2882da42a8915018d1fb90ea17;hp=1e9d4358978eadc002b98cdd999ba4fd9eb21c4a;hpb=598cc9dc84aeaa66e4a77efa9dc8ff03d5532620;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/rl78-tdep.c b/gdb/rl78-tdep.c index 1e9d435897..f66cda8817 100644 --- a/gdb/rl78-tdep.c +++ b/gdb/rl78-tdep.c @@ -1,6 +1,6 @@ /* Target-dependent code for the Renesas RL78 for GDB, the GNU debugger. - Copyright (C) 2011-2016 Free Software Foundation, Inc. + Copyright (C) 2011-2019 Free Software Foundation, Inc. Contributed by Red Hat, Inc. @@ -261,6 +261,30 @@ struct rl78_prologue int reg_offset[RL78_NUM_TOTAL_REGS]; }; +/* Construct type for PSW register. */ + +static struct type * +rl78_psw_type (struct gdbarch *gdbarch) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + if (tdep->rl78_psw_type == NULL) + { + tdep->rl78_psw_type = arch_flags_type (gdbarch, + "builtin_type_rl78_psw", 8); + append_flags_type_flag (tdep->rl78_psw_type, 0, "CY"); + append_flags_type_flag (tdep->rl78_psw_type, 1, "ISP0"); + append_flags_type_flag (tdep->rl78_psw_type, 2, "ISP1"); + append_flags_type_flag (tdep->rl78_psw_type, 3, "RBS0"); + append_flags_type_flag (tdep->rl78_psw_type, 4, "AC"); + append_flags_type_flag (tdep->rl78_psw_type, 5, "RBS1"); + append_flags_type_flag (tdep->rl78_psw_type, 6, "Z"); + append_flags_type_flag (tdep->rl78_psw_type, 7, "IE"); + } + + return tdep->rl78_psw_type; +} + /* Implement the "register_type" gdbarch method. */ static struct type * @@ -273,7 +297,7 @@ rl78_register_type (struct gdbarch *gdbarch, int reg_nr) else if (reg_nr == RL78_RAW_PC_REGNUM) return tdep->rl78_uint32; else if (reg_nr == RL78_PSW_REGNUM) - return (tdep->rl78_psw_type); + return rl78_psw_type (gdbarch); else if (reg_nr <= RL78_MEM_REGNUM || (RL78_X_REGNUM <= reg_nr && reg_nr <= RL78_H_REGNUM) || (RL78_BANK0_R0_REGNUM <= reg_nr @@ -616,7 +640,7 @@ rl78_make_data_address (CORE_ADDR addr) static enum register_status rl78_pseudo_register_read (struct gdbarch *gdbarch, - struct regcache *regcache, + readable_regcache *regcache, int reg, gdb_byte *buffer) { enum register_status status; @@ -626,68 +650,67 @@ rl78_pseudo_register_read (struct gdbarch *gdbarch, int raw_regnum = RL78_RAW_BANK0_R0_REGNUM + (reg - RL78_BANK0_R0_REGNUM); - status = regcache_raw_read (regcache, raw_regnum, buffer); + status = regcache->raw_read (raw_regnum, buffer); } else if (RL78_BANK0_RP0_REGNUM <= reg && reg <= RL78_BANK3_RP3_REGNUM) { int raw_regnum = 2 * (reg - RL78_BANK0_RP0_REGNUM) + RL78_RAW_BANK0_R0_REGNUM; - status = regcache_raw_read (regcache, raw_regnum, buffer); + status = regcache->raw_read (raw_regnum, buffer); if (status == REG_VALID) - status = regcache_raw_read (regcache, raw_regnum + 1, buffer + 1); + status = regcache->raw_read (raw_regnum + 1, buffer + 1); } else if (RL78_BANK0_RP0_PTR_REGNUM <= reg && reg <= RL78_BANK3_RP3_PTR_REGNUM) { int raw_regnum = 2 * (reg - RL78_BANK0_RP0_PTR_REGNUM) + RL78_RAW_BANK0_R0_REGNUM; - status = regcache_raw_read (regcache, raw_regnum, buffer); + status = regcache->raw_read (raw_regnum, buffer); if (status == REG_VALID) - status = regcache_raw_read (regcache, raw_regnum + 1, buffer + 1); + status = regcache->raw_read (raw_regnum + 1, buffer + 1); } else if (reg == RL78_SP_REGNUM) { - status = regcache_raw_read (regcache, RL78_SPL_REGNUM, buffer); + status = regcache->raw_read (RL78_SPL_REGNUM, buffer); if (status == REG_VALID) - status = regcache_raw_read (regcache, RL78_SPH_REGNUM, buffer + 1); + status = regcache->raw_read (RL78_SPH_REGNUM, buffer + 1); } else if (reg == RL78_PC_REGNUM) { gdb_byte rawbuf[4]; - status = regcache_raw_read (regcache, RL78_RAW_PC_REGNUM, rawbuf); + status = regcache->raw_read (RL78_RAW_PC_REGNUM, rawbuf); memcpy (buffer, rawbuf, 3); } else if (RL78_X_REGNUM <= reg && reg <= RL78_H_REGNUM) { ULONGEST psw; - status = regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw); + status = regcache->raw_read (RL78_PSW_REGNUM, &psw); if (status == REG_VALID) { /* RSB0 is at bit 3; RSBS1 is at bit 5. */ int bank = ((psw >> 3) & 1) | ((psw >> 4) & 1); int raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK + (reg - RL78_X_REGNUM); - status = regcache_raw_read (regcache, raw_regnum, buffer); + status = regcache->raw_read (raw_regnum, buffer); } } else if (RL78_AX_REGNUM <= reg && reg <= RL78_HL_REGNUM) { ULONGEST psw; - status = regcache_raw_read_unsigned (regcache, RL78_PSW_REGNUM, &psw); + status = regcache->raw_read (RL78_PSW_REGNUM, &psw); if (status == REG_VALID) { /* RSB0 is at bit 3; RSBS1 is at bit 5. */ int bank = ((psw >> 3) & 1) | ((psw >> 4) & 1); int raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK + 2 * (reg - RL78_AX_REGNUM); - status = regcache_raw_read (regcache, raw_regnum, buffer); + status = regcache->raw_read (raw_regnum, buffer); if (status == REG_VALID) - status = regcache_raw_read (regcache, raw_regnum + 1, - buffer + 1); + status = regcache->raw_read (raw_regnum + 1, buffer + 1); } } else @@ -707,28 +730,28 @@ rl78_pseudo_register_write (struct gdbarch *gdbarch, int raw_regnum = RL78_RAW_BANK0_R0_REGNUM + (reg - RL78_BANK0_R0_REGNUM); - regcache_raw_write (regcache, raw_regnum, buffer); + regcache->raw_write (raw_regnum, buffer); } else if (RL78_BANK0_RP0_REGNUM <= reg && reg <= RL78_BANK3_RP3_REGNUM) { int raw_regnum = 2 * (reg - RL78_BANK0_RP0_REGNUM) + RL78_RAW_BANK0_R0_REGNUM; - regcache_raw_write (regcache, raw_regnum, buffer); - regcache_raw_write (regcache, raw_regnum + 1, buffer + 1); + regcache->raw_write (raw_regnum, buffer); + regcache->raw_write (raw_regnum + 1, buffer + 1); } else if (RL78_BANK0_RP0_PTR_REGNUM <= reg && reg <= RL78_BANK3_RP3_PTR_REGNUM) { int raw_regnum = 2 * (reg - RL78_BANK0_RP0_PTR_REGNUM) + RL78_RAW_BANK0_R0_REGNUM; - regcache_raw_write (regcache, raw_regnum, buffer); - regcache_raw_write (regcache, raw_regnum + 1, buffer + 1); + regcache->raw_write (raw_regnum, buffer); + regcache->raw_write (raw_regnum + 1, buffer + 1); } else if (reg == RL78_SP_REGNUM) { - regcache_raw_write (regcache, RL78_SPL_REGNUM, buffer); - regcache_raw_write (regcache, RL78_SPH_REGNUM, buffer + 1); + regcache->raw_write (RL78_SPL_REGNUM, buffer); + regcache->raw_write (RL78_SPH_REGNUM, buffer + 1); } else if (reg == RL78_PC_REGNUM) { @@ -736,7 +759,7 @@ rl78_pseudo_register_write (struct gdbarch *gdbarch, memcpy (rawbuf, buffer, 3); rawbuf[3] = 0; - regcache_raw_write (regcache, RL78_RAW_PC_REGNUM, rawbuf); + regcache->raw_write (RL78_RAW_PC_REGNUM, rawbuf); } else if (RL78_X_REGNUM <= reg && reg <= RL78_H_REGNUM) { @@ -749,7 +772,7 @@ rl78_pseudo_register_write (struct gdbarch *gdbarch, /* RSB0 is at bit 3; RSBS1 is at bit 5. */ raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK + (reg - RL78_X_REGNUM); - regcache_raw_write (regcache, raw_regnum, buffer); + regcache->raw_write (raw_regnum, buffer); } else if (RL78_AX_REGNUM <= reg && reg <= RL78_HL_REGNUM) { @@ -761,8 +784,8 @@ rl78_pseudo_register_write (struct gdbarch *gdbarch, /* RSB0 is at bit 3; RSBS1 is at bit 5. */ raw_regnum = RL78_RAW_BANK0_R0_REGNUM + bank * RL78_REGS_PER_BANK + 2 * (reg - RL78_AX_REGNUM); - regcache_raw_write (regcache, raw_regnum, buffer); - regcache_raw_write (regcache, raw_regnum + 1, buffer + 1); + regcache->raw_write (raw_regnum, buffer); + regcache->raw_write (raw_regnum + 1, buffer + 1); } else gdb_assert_not_reached ("invalid pseudo register number"); @@ -772,9 +795,9 @@ rl78_pseudo_register_write (struct gdbarch *gdbarch, {0x61, 0xcc}, but instructions may be as short as one byte. Correspondence with Renesas revealed that the one byte sequence 0xff is used when a one byte breakpoint instruction is required. */ -static gdb_byte breakpoint[] = { 0xff }; +constexpr gdb_byte rl78_break_insn[] = { 0xff }; -GDBARCH_BREAKPOINT_MANIPULATION (rl78, breakpoint) +typedef BP_MANIPULATION (rl78_break_insn) rl78_breakpoint; /* Define a "handle" struct for fetching the next opcode. */ @@ -859,7 +882,7 @@ rl78_get_opcode_byte (void *handle) } /* Function for finding saved registers in a 'struct pv_area'; this - function is passed to pv_area_scan. + function is passed to pv_area::scan. If VALUE is a saved register, ADDR says it was saved at a constant offset from the frame base, and SIZE indicates that the whole @@ -888,8 +911,6 @@ rl78_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR pc, next_pc; int rn; pv_t reg[RL78_NUM_TOTAL_REGS]; - struct pv_area *stack; - struct cleanup *back_to; CORE_ADDR after_last_frame_setup_insn = start_pc; int bank = 0; @@ -901,12 +922,11 @@ rl78_analyze_prologue (CORE_ADDR start_pc, result->reg_offset[rn] = 1; } - stack = make_pv_area (RL78_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ())); - back_to = make_cleanup_free_pv_area (stack); + pv_area stack (RL78_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ())); /* The call instruction has saved the return address on the stack. */ reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -4); - pv_area_store (stack, reg[RL78_SP_REGNUM], 4, reg[RL78_PC_REGNUM]); + stack.store (reg[RL78_SP_REGNUM], 4, reg[RL78_PC_REGNUM]); pc = start_pc; while (pc < limit_pc) @@ -930,12 +950,12 @@ rl78_analyze_prologue (CORE_ADDR start_pc, && opc.op[1].type == RL78_Operand_Register) { int rsrc = (bank * RL78_REGS_PER_BANK) - + 2 * (opc.op[1].reg - RL78_Reg_AX); + + 2 * (opc.op[1].reg - RL78_Reg_AX); reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -1); - pv_area_store (stack, reg[RL78_SP_REGNUM], 1, reg[rsrc]); + stack.store (reg[RL78_SP_REGNUM], 1, reg[rsrc]); reg[RL78_SP_REGNUM] = pv_add_constant (reg[RL78_SP_REGNUM], -1); - pv_area_store (stack, reg[RL78_SP_REGNUM], 1, reg[rsrc + 1]); + stack.store (reg[RL78_SP_REGNUM], 1, reg[rsrc + 1]); after_last_frame_setup_insn = next_pc; } else if (opc.id == RLO_sub @@ -992,11 +1012,9 @@ rl78_analyze_prologue (CORE_ADDR start_pc, result->frame_size = reg[RL78_SP_REGNUM].k; /* Record where all the registers were saved. */ - pv_area_scan (stack, check_for_saved, (void *) result); + stack.scan (check_for_saved, (void *) result); result->prologue_end = after_last_frame_setup_insn; - - do_cleanups (back_to); } /* Implement the "addr_bits_remove" gdbarch method. */ @@ -1066,14 +1084,6 @@ rl78_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame) RL78_PC_REGNUM)); } -/* Implement the "unwind_sp" gdbarch method. */ - -static CORE_ADDR -rl78_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame) -{ - return frame_unwind_register_unsigned (next_frame, RL78_SP_REGNUM); -} - /* Given a frame described by THIS_FRAME, decode the prologue of its associated function if there is not cache entry as specified by THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and @@ -1318,7 +1328,8 @@ static CORE_ADDR rl78_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, - int struct_return, CORE_ADDR struct_addr) + function_call_return_method return_method, + CORE_ADDR struct_addr) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); gdb_byte buf[4]; @@ -1337,7 +1348,7 @@ rl78_push_dummy_call (struct gdbarch *gdbarch, struct value *function, } /* Store struct value address. */ - if (struct_return) + if (return_method == return_method_struct) { store_unsigned_integer (buf, 2, byte_order, struct_addr); sp -= 2; @@ -1388,12 +1399,13 @@ rl78_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* None found, create a new architecture from the information provided. */ - tdep = XNEW (struct gdbarch_tdep); + tdep = XCNEW (struct gdbarch_tdep); gdbarch = gdbarch_alloc (&info, tdep); tdep->elf_flags = elf_flags; /* Initialize types. */ - tdep->rl78_void = arch_type (gdbarch, TYPE_CODE_VOID, 1, "void"); + tdep->rl78_void = arch_type (gdbarch, TYPE_CODE_VOID, TARGET_CHAR_BIT, + "void"); tdep->rl78_uint8 = arch_integer_type (gdbarch, 8, 1, "uint8_t"); tdep->rl78_int8 = arch_integer_type (gdbarch, 8, 0, "int8_t"); tdep->rl78_uint16 = arch_integer_type (gdbarch, 16, 1, "uint16_t"); @@ -1406,16 +1418,6 @@ rl78_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep->rl78_code_pointer = arch_pointer_type (gdbarch, 32, "rl78_code_addr_t", tdep->rl78_void); - tdep->rl78_psw_type = arch_flags_type (gdbarch, "builtin_type_rl78_psw", 1); - append_flags_type_flag (tdep->rl78_psw_type, 0, "CY"); - append_flags_type_flag (tdep->rl78_psw_type, 1, "ISP0"); - append_flags_type_flag (tdep->rl78_psw_type, 2, "ISP1"); - append_flags_type_flag (tdep->rl78_psw_type, 3, "RBS0"); - append_flags_type_flag (tdep->rl78_psw_type, 4, "AC"); - append_flags_type_flag (tdep->rl78_psw_type, 5, "RBS1"); - append_flags_type_flag (tdep->rl78_psw_type, 6, "Z"); - append_flags_type_flag (tdep->rl78_psw_type, 7, "IE"); - /* Registers. */ set_gdbarch_num_regs (gdbarch, RL78_NUM_REGS); set_gdbarch_num_pseudo_regs (gdbarch, RL78_NUM_PSEUDO_REGS); @@ -1452,17 +1454,14 @@ rl78_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_addr_bits_remove (gdbarch, rl78_addr_bits_remove); /* Breakpoints. */ - SET_GDBARCH_BREAKPOINT_MANIPULATION (rl78); + set_gdbarch_breakpoint_kind_from_pc (gdbarch, rl78_breakpoint::kind_from_pc); + set_gdbarch_sw_breakpoint_from_kind (gdbarch, rl78_breakpoint::bp_from_kind); set_gdbarch_decr_pc_after_break (gdbarch, 1); - /* Disassembly. */ - set_gdbarch_print_insn (gdbarch, print_insn_rl78); - /* Frames, prologues, etc. */ set_gdbarch_inner_than (gdbarch, core_addr_lessthan); set_gdbarch_skip_prologue (gdbarch, rl78_skip_prologue); set_gdbarch_unwind_pc (gdbarch, rl78_unwind_pc); - set_gdbarch_unwind_sp (gdbarch, rl78_unwind_sp); set_gdbarch_frame_align (gdbarch, rl78_frame_align); dwarf2_append_unwinders (gdbarch); @@ -1479,9 +1478,6 @@ rl78_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) return gdbarch; } -/* -Wmissing-prototypes */ -extern initialize_file_ftype _initialize_rl78_tdep; - /* Register the above initialization routine. */ void