X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gdb%2Fsparc-nat.c;h=e892fe8fbda13478d0c314653454c57c0892af01;hb=8513dd2d37a6265302833384f327f064ebc569e3;hp=3f2768307cee87b8cf2923046c5d9c02f94b8e96;hpb=2ba6182bbc59b54926cfb2c462888ddad74e30bf;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/sparc-nat.c b/gdb/sparc-nat.c index 3f2768307c..e892fe8fbd 100644 --- a/gdb/sparc-nat.c +++ b/gdb/sparc-nat.c @@ -1,30 +1,42 @@ /* Functions specific to running gdb native on a SPARC running SunOS4. - Copyright 1989, 1992, 1993, 1994 Free Software Foundation, Inc. + Copyright 1989, 1992, 1993, 1994, 1996, 1997, 1998, 1999, 2000, 2001 + Free Software Foundation, Inc. -This file is part of GDB. + This file is part of GDB. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ #include "defs.h" #include "inferior.h" #include "target.h" +#include "gdbcore.h" +#include "regcache.h" +#ifdef HAVE_SYS_PARAM_H +#include +#endif #include #include #include +#ifdef __linux__ +#include +#else #include +#endif +#include /* We don't store all registers immediately when requested, since they get sent over in large chunks anyway. Instead, we accumulate most @@ -41,8 +53,7 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ marking them as valid so we won't fetch them again. */ void -fetch_inferior_registers (regno) - int regno; +fetch_inferior_registers (int regno) { struct regs inferior_registers; struct fp_status inferior_fp_registers; @@ -50,7 +61,8 @@ fetch_inferior_registers (regno) /* We should never be called with deferred stores, because a prerequisite for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */ - if (deferred_stores) abort(); + if (deferred_stores) + internal_error (__FILE__, __LINE__, "failed internal consistency check"); DO_DEFERRED_STORES; @@ -59,21 +71,21 @@ fetch_inferior_registers (regno) and the stack pointer has not yet been fetched, we have to do that first, since they're found in memory relative to the stack pointer. */ - if (regno < O7_REGNUM /* including -1 */ + if (regno < O7_REGNUM /* including -1 */ || regno >= Y_REGNUM || (!register_valid[SP_REGNUM] && regno < I7_REGNUM)) { - if (0 != ptrace (PTRACE_GETREGS, inferior_pid, - (PTRACE_ARG3_TYPE) &inferior_registers, 0)) - perror("ptrace_getregs"); - + if (0 != ptrace (PTRACE_GETREGS, PIDGET (inferior_ptid), + (PTRACE_ARG3_TYPE) & inferior_registers, 0)) + perror ("ptrace_getregs"); + registers[REGISTER_BYTE (0)] = 0; memcpy (®isters[REGISTER_BYTE (1)], &inferior_registers.r_g1, 15 * REGISTER_RAW_SIZE (G0_REGNUM)); - *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; - *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc; - *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc; - *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y; + *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; + *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc; + *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc; + *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y; for (i = G0_REGNUM; i <= O7_REGNUM; i++) register_valid[i] = 1; @@ -82,7 +94,7 @@ fetch_inferior_registers (regno) register_valid[PC_REGNUM] = 1; register_valid[NPC_REGNUM] = 1; /* If we don't set these valid, read_register_bytes() rereads - all the regs every time it is called! FIXME. */ + all the regs every time it is called! FIXME. */ register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */ register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */ register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */ @@ -93,16 +105,16 @@ fetch_inferior_registers (regno) regno == FPS_REGNUM || (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31)) { - if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid, - (PTRACE_ARG3_TYPE) &inferior_fp_registers, + if (0 != ptrace (PTRACE_GETFPREGS, PIDGET (inferior_ptid), + (PTRACE_ARG3_TYPE) & inferior_fp_registers, 0)) - perror("ptrace_getfpregs"); + perror ("ptrace_getfpregs"); memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers, sizeof inferior_fp_registers.fpu_fr); memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], - &inferior_fp_registers.Fpu_fsr, - sizeof (FPU_FSR_TYPE)); - for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++) + &inferior_fp_registers.Fpu_fsr, + sizeof (FPU_FSR_TYPE)); + for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++) register_valid[i] = 1; register_valid[FPS_REGNUM] = 1; } @@ -111,20 +123,20 @@ fetch_inferior_registers (regno) all (16 ptrace calls!) if we really need them. */ if (regno == -1) { - target_xfer_memory (*(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)], - ®isters[REGISTER_BYTE (L0_REGNUM)], - 16*REGISTER_RAW_SIZE (L0_REGNUM), 0); + CORE_ADDR sp = *(unsigned int *) & registers[REGISTER_BYTE (SP_REGNUM)]; + target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], + 16 * REGISTER_RAW_SIZE (L0_REGNUM)); for (i = L0_REGNUM; i <= I7_REGNUM; i++) register_valid[i] = 1; } else if (regno >= L0_REGNUM && regno <= I7_REGNUM) { - CORE_ADDR sp = *(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)]; + CORE_ADDR sp = *(unsigned int *) & registers[REGISTER_BYTE (SP_REGNUM)]; i = REGISTER_BYTE (regno); if (register_valid[regno]) - printf_unfiltered("register %d valid and read\n", regno); - target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM), - ®isters[i], REGISTER_RAW_SIZE (regno), 0); + printf_unfiltered ("register %d valid and read\n", regno); + target_read_memory (sp + i - REGISTER_BYTE (L0_REGNUM), + ®isters[i], REGISTER_RAW_SIZE (regno)); register_valid[regno] = 1; } } @@ -134,8 +146,7 @@ fetch_inferior_registers (regno) Otherwise, REGNO specifies which register (so we can save time). */ void -store_inferior_registers (regno) - int regno; +store_inferior_registers (int regno) { struct regs inferior_registers; struct fp_status inferior_fp_registers; @@ -144,21 +155,23 @@ store_inferior_registers (regno) /* First decide which pieces of machine-state we need to modify. Default for regno == -1 case is all pieces. */ if (regno >= 0) - if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32) - { - wanna_store = FP_REGS; - } - else - { - if (regno == SP_REGNUM) - wanna_store = INT_REGS + STACK_REGS; - else if (regno < L0_REGNUM || regno > I7_REGNUM) - wanna_store = INT_REGS; - else if (regno == FPS_REGNUM) + { + if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32) + { wanna_store = FP_REGS; - else - wanna_store = STACK_REGS; - } + } + else + { + if (regno == SP_REGNUM) + wanna_store = INT_REGS + STACK_REGS; + else if (regno < L0_REGNUM || regno > I7_REGNUM) + wanna_store = INT_REGS; + else if (regno == FPS_REGNUM) + wanna_store = FP_REGS; + else + wanna_store = STACK_REGS; + } + } /* See if we're forcing the stores to happen now, or deferring. */ if (regno == -2) @@ -182,116 +195,155 @@ store_inferior_registers (regno) if (wanna_store & STACK_REGS) { - CORE_ADDR sp = *(CORE_ADDR *)®isters[REGISTER_BYTE (SP_REGNUM)]; + CORE_ADDR sp = *(unsigned int *) & registers[REGISTER_BYTE (SP_REGNUM)]; if (regno < 0 || regno == SP_REGNUM) { - if (!register_valid[L0_REGNUM+5]) abort(); - target_xfer_memory (sp, - ®isters[REGISTER_BYTE (L0_REGNUM)], - 16*REGISTER_RAW_SIZE (L0_REGNUM), 1); + if (!register_valid[L0_REGNUM + 5]) + internal_error (__FILE__, __LINE__, "failed internal consistency check"); + target_write_memory (sp, + ®isters[REGISTER_BYTE (L0_REGNUM)], + 16 * REGISTER_RAW_SIZE (L0_REGNUM)); } else { - if (!register_valid[regno]) abort(); - target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM), - ®isters[REGISTER_BYTE (regno)], - REGISTER_RAW_SIZE (regno), 1); + if (!register_valid[regno]) + internal_error (__FILE__, __LINE__, "failed internal consistency check"); + target_write_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM), + ®isters[REGISTER_BYTE (regno)], + REGISTER_RAW_SIZE (regno)); } - + } if (wanna_store & INT_REGS) { - if (!register_valid[G1_REGNUM]) abort(); + if (!register_valid[G1_REGNUM]) + internal_error (__FILE__, __LINE__, "failed internal consistency check"); memcpy (&inferior_registers.r_g1, ®isters[REGISTER_BYTE (G1_REGNUM)], 15 * REGISTER_RAW_SIZE (G1_REGNUM)); inferior_registers.r_ps = - *(int *)®isters[REGISTER_BYTE (PS_REGNUM)]; + *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)]; inferior_registers.r_pc = - *(int *)®isters[REGISTER_BYTE (PC_REGNUM)]; + *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)]; inferior_registers.r_npc = - *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)]; + *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)]; inferior_registers.r_y = - *(int *)®isters[REGISTER_BYTE (Y_REGNUM)]; + *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)]; - if (0 != ptrace (PTRACE_SETREGS, inferior_pid, - (PTRACE_ARG3_TYPE) &inferior_registers, 0)) - perror("ptrace_setregs"); + if (0 != ptrace (PTRACE_SETREGS, PIDGET (inferior_ptid), + (PTRACE_ARG3_TYPE) & inferior_registers, 0)) + perror ("ptrace_setregs"); } if (wanna_store & FP_REGS) { - if (!register_valid[FP0_REGNUM+9]) abort(); + if (!register_valid[FP0_REGNUM + 9]) + internal_error (__FILE__, __LINE__, "failed internal consistency check"); memcpy (&inferior_fp_registers, ®isters[REGISTER_BYTE (FP0_REGNUM)], sizeof inferior_fp_registers.fpu_fr); - memcpy (&inferior_fp_registers.Fpu_fsr, + memcpy (&inferior_fp_registers.Fpu_fsr, ®isters[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE)); if (0 != - ptrace (PTRACE_SETFPREGS, inferior_pid, - (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0)) - perror("ptrace_setfpregs"); + ptrace (PTRACE_SETFPREGS, PIDGET (inferior_ptid), + (PTRACE_ARG3_TYPE) & inferior_fp_registers, 0)) + perror ("ptrace_setfpregs"); } } +/* Provide registers to GDB from a core file. -void -fetch_core_registers (core_reg_sect, core_reg_size, which, ignore) - char *core_reg_sect; - unsigned core_reg_size; - int which; - unsigned int ignore; /* reg addr, unused in this version */ + CORE_REG_SECT points to an array of bytes, which are the contents + of a `note' from a core file which BFD thinks might contain + register contents. CORE_REG_SIZE is its size. + + WHICH says which register set corelow suspects this is: + 0 --- the general-purpose register set + 2 --- the floating-point register set + + IGNORE is unused. */ + +static void +fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, + int which, CORE_ADDR ignore) { - if (which == 0) { + if (which == 0) + { - /* Integer registers */ + /* Integer registers */ #define gregs ((struct regs *)core_reg_sect) - /* G0 *always* holds 0. */ - *(int *)®isters[REGISTER_BYTE (0)] = 0; - - /* The globals and output registers. */ - memcpy (®isters[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1, - 15 * REGISTER_RAW_SIZE (G1_REGNUM)); - *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps; - *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc; - *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc; - *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y; - - /* My best guess at where to get the locals and input - registers is exactly where they usually are, right above - the stack pointer. If the core dump was caused by a bus error - from blowing away the stack pointer (as is possible) then this - won't work, but it's worth the try. */ + /* G0 *always* holds 0. */ + *(int *) ®isters[REGISTER_BYTE (0)] = 0; + + /* The globals and output registers. */ + memcpy (®isters[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1, + 15 * REGISTER_RAW_SIZE (G1_REGNUM)); + *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps; + *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc; + *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc; + *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y; + + /* My best guess at where to get the locals and input + registers is exactly where they usually are, right above + the stack pointer. If the core dump was caused by a bus error + from blowing away the stack pointer (as is possible) then this + won't work, but it's worth the try. */ + { + int sp; + + sp = *(int *) ®isters[REGISTER_BYTE (SP_REGNUM)]; + if (0 != target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], + 16 * REGISTER_RAW_SIZE (L0_REGNUM))) + { + /* fprintf_unfiltered so user can still use gdb */ + fprintf_unfiltered (gdb_stderr, + "Couldn't read input and local registers from core file\n"); + } + } + } + else if (which == 2) { - int sp; - sp = *(int *)®isters[REGISTER_BYTE (SP_REGNUM)]; - if (0 != target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], - 16 * REGISTER_RAW_SIZE (L0_REGNUM))) + /* Floating point registers */ + +#define fpuregs ((struct fpu *) core_reg_sect) + if (core_reg_size >= sizeof (struct fpu)) { - /* fprintf_unfiltered so user can still use gdb */ - fprintf_unfiltered (gdb_stderr, - "Couldn't read input and local registers from core file\n"); + memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs, + sizeof (fpuregs->fpu_regs)); + memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr, + sizeof (FPU_FSR_TYPE)); } + else + fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n"); } - } else if (which == 2) { - - /* Floating point registers */ +} -#define fpuregs ((struct fpu *) core_reg_sect) - if (core_reg_size >= sizeof (struct fpu)) - { - memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs, - sizeof (fpuregs->fpu_regs)); - memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr, - sizeof (FPU_FSR_TYPE)); - } - else - fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n"); - } +int +kernel_u_size (void) +{ + return (sizeof (struct user)); } + +/* Register that we are able to handle sparc core file formats. + FIXME: is this really bfd_target_unknown_flavour? */ + +static struct core_fns sparc_core_fns = +{ + bfd_target_unknown_flavour, /* core_flavour */ + default_check_format, /* check_format */ + default_core_sniffer, /* core_sniffer */ + fetch_core_registers, /* core_read_registers */ + NULL /* next */ +}; + +void +_initialize_core_sparc (void) +{ + add_core_fns (&sparc_core_fns); +}