X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gold%2Faarch64.cc;h=07abe44931f34504a986bf30500f0a862b2a9570;hb=915808f652b63746052b1ef59403650b45a30e4f;hp=bc86f68a9f1be9d5396ac99a3da1bc3b41b8e927;hpb=73854cdd438dc8858290231ebcb682377d71fec2;p=deliverable%2Fbinutils-gdb.git diff --git a/gold/aarch64.cc b/gold/aarch64.cc index bc86f68a9f..07abe44931 100644 --- a/gold/aarch64.cc +++ b/gold/aarch64.cc @@ -1,6 +1,6 @@ // aarch64.cc -- aarch64 target support for gold. -// Copyright (C) 2014-2015 Free Software Foundation, Inc. +// Copyright (C) 2014-2020 Free Software Foundation, Inc. // Written by Jing Yu and Han Shen . // This file is part of gold. @@ -102,10 +102,18 @@ public: aarch64_ra(Insntype insn) { return aarch64_bits(insn, 10, 5); } + static bool + is_adr(const Insntype insn) + { return (insn & 0x9F000000) == 0x10000000; } + static bool is_adrp(const Insntype insn) { return (insn & 0x9F000000) == 0x90000000; } + static bool + is_mrs_tpidr_el0(const Insntype insn) + { return (insn & 0xFFFFFFE0) == 0xd53bd040; } + static unsigned int aarch64_rm(const Insntype insn) { return aarch64_bits(insn, 16, 5); } @@ -126,6 +134,39 @@ public: aarch64_rt2(const Insntype insn) { return aarch64_bits(insn, 10, 5); } + // Encode imm21 into adr. Signed imm21 is in the range of [-1M, 1M). + static Insntype + aarch64_adr_encode_imm(Insntype adr, int imm21) + { + gold_assert(is_adr(adr)); + gold_assert(-(1 << 20) <= imm21 && imm21 < (1 << 20)); + const int mask19 = (1 << 19) - 1; + const int mask2 = 3; + adr &= ~((mask19 << 5) | (mask2 << 29)); + adr |= ((imm21 & mask2) << 29) | (((imm21 >> 2) & mask19) << 5); + return adr; + } + + // Retrieve encoded adrp 33-bit signed imm value. This value is obtained by + // 21-bit signed imm encoded in the insn multiplied by 4k (page size) and + // 64-bit sign-extended, resulting in [-4G, 4G) with 12-lsb being 0. + static int64_t + aarch64_adrp_decode_imm(const Insntype adrp) + { + const int mask19 = (1 << 19) - 1; + const int mask2 = 3; + gold_assert(is_adrp(adrp)); + // 21-bit imm encoded in adrp. + uint64_t imm = ((adrp >> 29) & mask2) | (((adrp >> 5) & mask19) << 2); + // Retrieve msb of 21-bit-signed imm for sign extension. + uint64_t msbt = (imm >> 20) & 1; + // Real value is imm multiplied by 4k. Value now has 33-bit information. + int64_t value = imm << 12; + // Sign extend to 64-bit by repeating msbt 31 (64-33) times and merge it + // with value. + return ((((uint64_t)(1) << 32) - msbt) << 33) | value; + } + static bool aarch64_b(const Insntype insn) { return (insn & 0xFC000000) == 0x14000000; } @@ -229,7 +270,7 @@ public: uint32_t v = 0; uint32_t opc_v = 0; - /* Bail out quickly if INSN doesn't fall into the the load-store + /* Bail out quickly if INSN doesn't fall into the load-store encoding space. */ if (!aarch64_ldst (insn)) return false; @@ -747,8 +788,14 @@ Stub_template_repertoire::Stub_template_repertoire() 0x14000000, /* b