X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=gold%2Fpowerpc.cc;h=540e1977c62df0ae9ddb3aa8ff87459ca6cbb07e;hb=081e4c7d6714c62ae0e53842013e360f97618ba4;hp=fc9264e1d5e09e7e0bfc5ab08283ac4d85f64dc4;hpb=03e25981b675b8d2bab22acca695fd16b8736e34;p=deliverable%2Fbinutils-gdb.git diff --git a/gold/powerpc.cc b/gold/powerpc.cc index fc9264e1d5..540e1977c6 100644 --- a/gold/powerpc.cc +++ b/gold/powerpc.cc @@ -1,6 +1,6 @@ // powerpc.cc -- powerpc target support for gold. -// Copyright 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc. +// Copyright (C) 2008-2015 Free Software Foundation, Inc. // Written by David S. Miller // and David Edelsohn @@ -23,7 +23,10 @@ #include "gold.h" +#include +#include #include "elfcpp.h" +#include "dwarf.h" #include "parameters.h" #include "reloc.h" #include "powerpc.h" @@ -47,30 +50,55 @@ using namespace gold; template class Output_data_plt_powerpc; +template +class Output_data_brlt_powerpc; + template class Output_data_got_powerpc; template class Output_data_glink; +template +class Stub_table; + +template +class Target_powerpc; + +struct Stub_table_owner +{ + Output_section* output_section; + const Output_section::Input_section* owner; +}; + +inline bool +is_branch_reloc(unsigned int r_type); + template class Powerpc_relobj : public Sized_relobj_file { public: typedef typename elfcpp::Elf_types::Elf_Addr Address; - typedef typename elfcpp::Elf_types::Elf_Off Offset; typedef Unordered_set Section_refs; typedef Unordered_map Access_from; Powerpc_relobj(const std::string& name, Input_file* input_file, off_t offset, const typename elfcpp::Ehdr& ehdr) : Sized_relobj_file(name, input_file, offset, ehdr), - special_(0), opd_valid_(false), opd_ent_(), access_from_map_() - { } + special_(0), has_small_toc_reloc_(false), opd_valid_(false), + opd_ent_(), access_from_map_(), has14_(), stub_table_index_(), + e_flags_(ehdr.get_e_flags()), st_other_() + { + this->set_abiversion(0); + } ~Powerpc_relobj() { } + // Read the symbols then set up st_other vector. + void + do_read_symbols(Read_symbols_data*); + // The .got2 section shndx. unsigned int got2_shndx() const @@ -139,21 +167,6 @@ public: this->opd_ent_[ndx].discard = true; } - Access_from* - access_from_map() - { return &this->access_from_map_; } - - // Add a reference from SRC_OBJ, SRC_INDX to this object's .opd - // section at DST_OFF. - void - add_reference(Object* src_obj, - unsigned int src_indx, - typename elfcpp::Elf_types::Elf_Addr dst_off) - { - Section_id src_id(src_obj, src_indx); - this->access_from_map_[dst_off].insert(src_id); - } - bool opd_valid() const { return this->opd_valid_; } @@ -168,6 +181,8 @@ public: const unsigned char* prelocs, const unsigned char* plocal_syms); + // Perform the Sized_relobj_file method, then set up opd info from + // .opd relocs. void do_read_relocs(Read_relocs_data*); @@ -190,18 +205,121 @@ public: return true; } + Access_from* + access_from_map() + { return &this->access_from_map_; } + + // Add a reference from SRC_OBJ, SRC_INDX to this object's .opd + // section at DST_OFF. + void + add_reference(Relobj* src_obj, + unsigned int src_indx, + typename elfcpp::Elf_types::Elf_Addr dst_off) + { + Section_id src_id(src_obj, src_indx); + this->access_from_map_[dst_off].insert(src_id); + } + + // Add a reference to the code section specified by the .opd entry + // at DST_OFF + void + add_gc_mark(typename elfcpp::Elf_types::Elf_Addr dst_off) + { + size_t ndx = this->opd_ent_ndx(dst_off); + if (ndx >= this->opd_ent_.size()) + this->opd_ent_.resize(ndx + 1); + this->opd_ent_[ndx].gc_mark = true; + } + + void + process_gc_mark(Symbol_table* symtab) + { + for (size_t i = 0; i < this->opd_ent_.size(); i++) + if (this->opd_ent_[i].gc_mark) + { + unsigned int shndx = this->opd_ent_[i].shndx; + symtab->gc()->worklist().push_back(Section_id(this, shndx)); + } + } + // Return offset in output GOT section that this object will use // as a TOC pointer. Won't be just a constant with multi-toc support. Address toc_base_offset() const { return 0x8000; } + void + set_has_small_toc_reloc() + { has_small_toc_reloc_ = true; } + + bool + has_small_toc_reloc() const + { return has_small_toc_reloc_; } + + void + set_has_14bit_branch(unsigned int shndx) + { + if (shndx >= this->has14_.size()) + this->has14_.resize(shndx + 1); + this->has14_[shndx] = true; + } + + bool + has_14bit_branch(unsigned int shndx) const + { return shndx < this->has14_.size() && this->has14_[shndx]; } + + void + set_stub_table(unsigned int shndx, unsigned int stub_index) + { + if (shndx >= this->stub_table_index_.size()) + this->stub_table_index_.resize(shndx + 1); + this->stub_table_index_[shndx] = stub_index; + } + + Stub_table* + stub_table(unsigned int shndx) + { + if (shndx < this->stub_table_index_.size()) + { + Target_powerpc* target + = static_cast*>( + parameters->sized_target()); + unsigned int indx = this->stub_table_index_[shndx]; + gold_assert(indx < target->stub_tables().size()); + return target->stub_tables()[indx]; + } + return NULL; + } + + void + clear_stub_table() + { + this->stub_table_index_.clear(); + } + + int + abiversion() const + { return this->e_flags_ & elfcpp::EF_PPC64_ABI; } + + // Set ABI version for input and output + void + set_abiversion(int ver); + + unsigned int + ppc64_local_entry_offset(const Symbol* sym) const + { return elfcpp::ppc64_decode_local_entry(sym->nonvis() >> 3); } + + unsigned int + ppc64_local_entry_offset(unsigned int symndx) const + { return elfcpp::ppc64_decode_local_entry(this->st_other_[symndx] >> 5); } + private: struct Opd_ent { unsigned int shndx; - bool discard; - Offset off; + bool discard : 1; + bool gc_mark : 1; + Address off; }; // Return index into opd_ent_ array for .opd entry at OFF. @@ -221,6 +339,10 @@ private: // For 32-bit the .got2 section shdnx, for 64-bit the .opd section shndx. unsigned int special_; + // For 64-bit, whether this object uses small model relocs to access + // the toc. + bool has_small_toc_reloc_; + // Set at the start of gc_process_relocs, when we know opd_ent_ // vector is valid. The flag could be made atomic and set in // do_read_relocs with memory_order_release and then tested with @@ -238,6 +360,134 @@ private: // gc_process_relocs for another object, before the opd_ent_ vector // is valid for this object. Access_from access_from_map_; + + // Whether input section has a 14-bit branch reloc. + std::vector has14_; + + // The stub table to use for a given input section. + std::vector stub_table_index_; + + // Header e_flags + elfcpp::Elf_Word e_flags_; + + // ELF st_other field for local symbols. + std::vector st_other_; +}; + +template +class Powerpc_dynobj : public Sized_dynobj +{ +public: + typedef typename elfcpp::Elf_types::Elf_Addr Address; + + Powerpc_dynobj(const std::string& name, Input_file* input_file, off_t offset, + const typename elfcpp::Ehdr& ehdr) + : Sized_dynobj(name, input_file, offset, ehdr), + opd_shndx_(0), opd_ent_(), e_flags_(ehdr.get_e_flags()) + { + this->set_abiversion(0); + } + + ~Powerpc_dynobj() + { } + + // Call Sized_dynobj::do_read_symbols to read the symbols then + // read .opd from a dynamic object, filling in opd_ent_ vector, + void + do_read_symbols(Read_symbols_data*); + + // The .opd section shndx. + unsigned int + opd_shndx() const + { + return this->opd_shndx_; + } + + // The .opd section address. + Address + opd_address() const + { + return this->opd_address_; + } + + // Init OPD entry arrays. + void + init_opd(size_t opd_size) + { + size_t count = this->opd_ent_ndx(opd_size); + this->opd_ent_.resize(count); + } + + // Return section and offset of function entry for .opd + R_OFF. + unsigned int + get_opd_ent(Address r_off, Address* value = NULL) const + { + size_t ndx = this->opd_ent_ndx(r_off); + gold_assert(ndx < this->opd_ent_.size()); + gold_assert(this->opd_ent_[ndx].shndx != 0); + if (value != NULL) + *value = this->opd_ent_[ndx].off; + return this->opd_ent_[ndx].shndx; + } + + // Set section and offset of function entry for .opd + R_OFF. + void + set_opd_ent(Address r_off, unsigned int shndx, Address value) + { + size_t ndx = this->opd_ent_ndx(r_off); + gold_assert(ndx < this->opd_ent_.size()); + this->opd_ent_[ndx].shndx = shndx; + this->opd_ent_[ndx].off = value; + } + + int + abiversion() const + { return this->e_flags_ & elfcpp::EF_PPC64_ABI; } + + // Set ABI version for input and output. + void + set_abiversion(int ver); + +private: + // Used to specify extent of executable sections. + struct Sec_info + { + Sec_info(Address start_, Address len_, unsigned int shndx_) + : start(start_), len(len_), shndx(shndx_) + { } + + bool + operator<(const Sec_info& that) const + { return this->start < that.start; } + + Address start; + Address len; + unsigned int shndx; + }; + + struct Opd_ent + { + unsigned int shndx; + Address off; + }; + + // Return index into opd_ent_ array for .opd entry at OFF. + size_t + opd_ent_ndx(size_t off) const + { return off >> 4;} + + // For 64-bit the .opd section shndx and address. + unsigned int opd_shndx_; + Address opd_address_; + + // The first 8-byte word of an OPD entry gives the address of the + // entry point of the function. Records the section and offset + // corresponding to the address. Note that in dynamic objects, + // offset is *not* relative to the section. + std::vector opd_ent_; + + // Header e_flags + elfcpp::Elf_Word e_flags_; }; template @@ -255,9 +505,12 @@ class Target_powerpc : public Sized_target Target_powerpc() : Sized_target(&powerpc_info), - got_(NULL), plt_(NULL), iplt_(NULL), glink_(NULL), rela_dyn_(NULL), - copy_relocs_(elfcpp::R_POWERPC_COPY), - dynbss_(NULL), tlsld_got_offset_(-1U) + got_(NULL), plt_(NULL), iplt_(NULL), brlt_section_(NULL), + glink_(NULL), rela_dyn_(NULL), copy_relocs_(elfcpp::R_POWERPC_COPY), + tlsld_got_offset_(-1U), + stub_tables_(), branch_lookup_table_(), branch_info_(), + plt_thread_safe_(false), relax_failed_(false), relax_fail_count_(0), + stub_group_size_(0) { } @@ -302,6 +555,39 @@ class Target_powerpc : public Sized_target return NULL; } + // Provide linker defined save/restore functions. + void + define_save_restore_funcs(Layout*, Symbol_table*); + + // No stubs unless a final link. + bool + do_may_relax() const + { return !parameters->options().relocatable(); } + + bool + do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*); + + void + do_plt_fde_location(const Output_data*, unsigned char*, + uint64_t*, off_t*) const; + + // Stash info about branches, for stub generation. + void + push_branch(Powerpc_relobj* ppc_object, + unsigned int data_shndx, Address r_offset, + unsigned int r_type, unsigned int r_sym, Address addend) + { + Branch_info info(ppc_object, data_shndx, r_offset, r_type, r_sym, addend); + this->branch_info_.push_back(info); + if (r_type == elfcpp::R_POWERPC_REL14 + || r_type == elfcpp::R_POWERPC_REL14_BRTAKEN + || r_type == elfcpp::R_POWERPC_REL14_BRNTAKEN) + ppc_object->set_has_14bit_branch(data_shndx); + } + + void + do_define_standard_symbols(Symbol_table*, Layout*); + // Finalize the sections. void do_finalize_sections(Layout*, const Input_objects*, Symbol_table*); @@ -331,6 +617,20 @@ class Target_powerpc : public Sized_target int64_t do_tls_offset_for_global(Symbol* gsym, unsigned int got_indx) const; + void + do_function_location(Symbol_location*) const; + + bool + do_can_check_for_function_pointers() const + { return true; } + + // Adjust -fsplit-stack code which calls non-split-stack code. + void + do_calls_non_split(Relobj* object, unsigned int shndx, + section_offset_type fnoffset, section_size_type fnsize, + unsigned char* view, section_size_type view_size, + std::string* from, std::string* to) const; + // Relocate a section. void relocate_section(const Relocate_info*, @@ -366,7 +666,8 @@ class Target_powerpc : public Sized_target const unsigned char* prelocs, size_t reloc_count, Output_section* output_section, - off_t offset_in_output_section, + typename elfcpp::Elf_types::Elf_Off + offset_in_output_section, const Relocatable_relocs*, unsigned char*, Address view_address, @@ -413,6 +714,16 @@ class Target_powerpc : public Sized_target return this->glink_; } + Output_data_glink* + glink_section() + { + gold_assert(this->glink_ != NULL); + return this->glink_; + } + + bool has_glink() const + { return this->glink_ != NULL; } + // Get the GOT section. const Output_data_got_powerpc* got_section() const @@ -421,6 +732,10 @@ class Target_powerpc : public Sized_target return this->got_; } + // Get the GOT section, creating it if necessary. + Output_data_got_powerpc* + got_section(Symbol_table*, Layout*); + Object* do_make_elf_object(const std::string&, Input_file*, off_t, const elfcpp::Ehdr&); @@ -440,11 +755,25 @@ class Target_powerpc : public Sized_target // Return the offset of the first non-reserved PLT entry. unsigned int - first_plt_entry_offset() const; + first_plt_entry_offset() const + { + if (size == 32) + return 0; + if (this->abiversion() >= 2) + return 16; + return 24; + } // Return the size of each PLT entry. unsigned int - plt_entry_size() const; + plt_entry_size() const + { + if (size == 32) + return 4; + if (this->abiversion() >= 2) + return 8; + return 24; + } // Add any special sections for this symbol to the gc work list. // For powerpc64, this adds the code section of a function @@ -458,65 +787,240 @@ class Target_powerpc : public Sized_target // section of a function descriptor. void do_gc_add_reference(Symbol_table* symtab, - Object* src_obj, + Relobj* src_obj, unsigned int src_shndx, - Object* dst_obj, + Relobj* dst_obj, unsigned int dst_shndx, Address dst_off) const; + typedef std::vector*> Stub_tables; + const Stub_tables& + stub_tables() const + { return this->stub_tables_; } + + const Output_data_brlt_powerpc* + brlt_section() const + { return this->brlt_section_; } + + void + add_branch_lookup_table(Address to) + { + unsigned int off = this->branch_lookup_table_.size() * (size / 8); + this->branch_lookup_table_.insert(std::make_pair(to, off)); + } + + Address + find_branch_lookup_table(Address to) + { + typename Branch_lookup_table::const_iterator p + = this->branch_lookup_table_.find(to); + return p == this->branch_lookup_table_.end() ? invalid_address : p->second; + } + + void + write_branch_lookup_table(unsigned char *oview) + { + for (typename Branch_lookup_table::const_iterator p + = this->branch_lookup_table_.begin(); + p != this->branch_lookup_table_.end(); + ++p) + { + elfcpp::Swap::writeval(oview + p->second, p->first); + } + } + + bool + plt_thread_safe() const + { return this->plt_thread_safe_; } + + int + abiversion () const + { return this->processor_specific_flags() & elfcpp::EF_PPC64_ABI; } + + void + set_abiversion (int ver) + { + elfcpp::Elf_Word flags = this->processor_specific_flags(); + flags &= ~elfcpp::EF_PPC64_ABI; + flags |= ver & elfcpp::EF_PPC64_ABI; + this->set_processor_specific_flags(flags); + } + + // Offset to to save stack slot + int + stk_toc () const + { return this->abiversion() < 2 ? 40 : 24; } + private: - // The class which scans relocations. - class Scan + class Track_tls { public: - typedef typename elfcpp::Elf_types::Elf_Addr Address; + enum Tls_get_addr + { + NOT_EXPECTED = 0, + EXPECTED = 1, + SKIP = 2, + NORMAL = 3 + }; - Scan() - : issued_non_pic_error_(false) + Track_tls() + : tls_get_addr_(NOT_EXPECTED), + relinfo_(NULL), relnum_(0), r_offset_(0) { } - static inline int - get_reference_flags(unsigned int r_type); + ~Track_tls() + { + if (this->tls_get_addr_ != NOT_EXPECTED) + this->missing(); + } - inline void - local(Symbol_table* symtab, Layout* layout, Target_powerpc* target, - Sized_relobj_file* object, - unsigned int data_shndx, - Output_section* output_section, - const elfcpp::Rela& reloc, unsigned int r_type, - const elfcpp::Sym& lsym, - bool is_discarded); + void + missing(void) + { + if (this->relinfo_ != NULL) + gold_error_at_location(this->relinfo_, this->relnum_, this->r_offset_, + _("missing expected __tls_get_addr call")); + } - inline void - global(Symbol_table* symtab, Layout* layout, Target_powerpc* target, - Sized_relobj_file* object, - unsigned int data_shndx, - Output_section* output_section, + void + expect_tls_get_addr_call( + const Relocate_info* relinfo, + size_t relnum, + Address r_offset) + { + this->tls_get_addr_ = EXPECTED; + this->relinfo_ = relinfo; + this->relnum_ = relnum; + this->r_offset_ = r_offset; + } + + void + expect_tls_get_addr_call() + { this->tls_get_addr_ = EXPECTED; } + + void + skip_next_tls_get_addr_call() + {this->tls_get_addr_ = SKIP; } + + Tls_get_addr + maybe_skip_tls_get_addr_call(unsigned int r_type, const Symbol* gsym) + { + bool is_tls_call = ((r_type == elfcpp::R_POWERPC_REL24 + || r_type == elfcpp::R_PPC_PLTREL24) + && gsym != NULL + && strcmp(gsym->name(), "__tls_get_addr") == 0); + Tls_get_addr last_tls = this->tls_get_addr_; + this->tls_get_addr_ = NOT_EXPECTED; + if (is_tls_call && last_tls != EXPECTED) + return last_tls; + else if (!is_tls_call && last_tls != NOT_EXPECTED) + { + this->missing(); + return EXPECTED; + } + return NORMAL; + } + + private: + // What we're up to regarding calls to __tls_get_addr. + // On powerpc, the branch and link insn making a call to + // __tls_get_addr is marked with a relocation, R_PPC64_TLSGD, + // R_PPC64_TLSLD, R_PPC_TLSGD or R_PPC_TLSLD, in addition to the + // usual R_POWERPC_REL24 or R_PPC_PLTREL25 relocation on a call. + // The marker relocation always comes first, and has the same + // symbol as the reloc on the insn setting up the __tls_get_addr + // argument. This ties the arg setup insn with the call insn, + // allowing ld to safely optimize away the call. We check that + // every call to __tls_get_addr has a marker relocation, and that + // every marker relocation is on a call to __tls_get_addr. + Tls_get_addr tls_get_addr_; + // Info about the last reloc for error message. + const Relocate_info* relinfo_; + size_t relnum_; + Address r_offset_; + }; + + // The class which scans relocations. + class Scan : protected Track_tls + { + public: + typedef typename elfcpp::Elf_types::Elf_Addr Address; + + Scan() + : Track_tls(), issued_non_pic_error_(false) + { } + + static inline int + get_reference_flags(unsigned int r_type, const Target_powerpc* target); + + inline void + local(Symbol_table* symtab, Layout* layout, Target_powerpc* target, + Sized_relobj_file* object, + unsigned int data_shndx, + Output_section* output_section, + const elfcpp::Rela& reloc, unsigned int r_type, + const elfcpp::Sym& lsym, + bool is_discarded); + + inline void + global(Symbol_table* symtab, Layout* layout, Target_powerpc* target, + Sized_relobj_file* object, + unsigned int data_shndx, + Output_section* output_section, const elfcpp::Rela& reloc, unsigned int r_type, Symbol* gsym); inline bool local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_powerpc* , - Sized_relobj_file* , + Sized_relobj_file* relobj, unsigned int , Output_section* , const elfcpp::Rela& , - unsigned int , + unsigned int r_type, const elfcpp::Sym&) - { return false; } + { + // PowerPC64 .opd is not folded, so any identical function text + // may be folded and we'll still keep function addresses distinct. + // That means no reloc is of concern here. + if (size == 64) + { + Powerpc_relobj* ppcobj = static_cast + *>(relobj); + if (ppcobj->abiversion() == 1) + return false; + } + // For 32-bit and ELFv2, conservatively assume anything but calls to + // function code might be taking the address of the function. + return !is_branch_reloc(r_type); + } inline bool global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_powerpc* , - Sized_relobj_file* , + Sized_relobj_file* relobj, unsigned int , Output_section* , - const elfcpp::Rela& , - unsigned int , Symbol*) - { return false; } + const elfcpp::Rela& , + unsigned int r_type, + Symbol*) + { + // As above. + if (size == 64) + { + Powerpc_relobj* ppcobj = static_cast + *>(relobj); + if (ppcobj->abiversion() == 1) + return false; + } + return !is_branch_reloc(r_type); + } + + static bool + reloc_needs_plt_for_ifunc(Target_powerpc* target, + Sized_relobj_file* object, + unsigned int r_type, bool report_err); private: static void @@ -534,47 +1038,28 @@ class Target_powerpc : public Sized_target void check_non_pic(Relobj*, unsigned int r_type); - bool - reloc_needs_plt_for_ifunc(Sized_relobj_file* object, - unsigned int r_type); - // Whether we have issued an error about a non-PIC compilation. bool issued_non_pic_error_; }; - Address - symval_for_branch(Address value, const Sized_symbol* gsym, + bool + symval_for_branch(const Symbol_table* symtab, + const Sized_symbol* gsym, Powerpc_relobj* object, - unsigned int *dest_shndx); + Address *value, unsigned int *dest_shndx); // The class which implements relocation. - class Relocate + class Relocate : protected Track_tls { public: // Use 'at' branch hints when true, 'y' when false. // FIXME maybe: set this with an option. static const bool is_isa_v2 = true; - enum skip_tls - { - CALL_NOT_EXPECTED = 0, - CALL_EXPECTED = 1, - CALL_SKIP = 2 - }; - Relocate() - : call_tls_get_addr_(CALL_NOT_EXPECTED) + : Track_tls() { } - ~Relocate() - { - if (this->call_tls_get_addr_ != CALL_NOT_EXPECTED) - { - // FIXME: This needs to specify the location somehow. - gold_error(_("missing expected __tls_get_addr call")); - } - } - // Do a relocation. Return false if the caller should not issue // any warnings about this relocation. inline bool @@ -586,10 +1071,32 @@ class Target_powerpc : public Sized_target unsigned char*, typename elfcpp::Elf_types::Elf_Addr, section_size_type); + }; - // This is set if we should skip the next reloc, which should be a - // call to __tls_get_addr. - enum skip_tls call_tls_get_addr_; + class Relocate_comdat_behavior + { + public: + // Decide what the linker should do for relocations that refer to + // discarded comdat sections. + inline Comdat_behavior + get(const char* name) + { + gold::Default_comdat_behavior default_behavior; + Comdat_behavior ret = default_behavior.get(name); + if (ret == CB_WARNING) + { + if (size == 32 + && (strcmp(name, ".fixup") == 0 + || strcmp(name, ".got2") == 0)) + ret = CB_IGNORE; + if (size == 64 + && (strcmp(name, ".opd") == 0 + || strcmp(name, ".toc") == 0 + || strcmp(name, ".toc1") == 0)) + ret = CB_IGNORE; + } + return ret; + } }; // A class which returns the size required for a relocation type, @@ -640,32 +1147,30 @@ class Target_powerpc : public Sized_target return tls::TLSOPT_TO_LE; } - // Get the GOT section, creating it if necessary. - Output_data_got_powerpc* - got_section(Symbol_table*, Layout*); - // Create glink. void make_glink_section(Layout*); // Create the PLT section. void - make_plt_section(Layout*); + make_plt_section(Symbol_table*, Layout*); + + void + make_iplt_section(Symbol_table*, Layout*); void - make_iplt_section(Layout*); + make_brlt_section(Layout*); // Create a PLT entry for a global symbol. void - make_plt_entry(Layout*, Symbol*, - const elfcpp::Rela&, - const Sized_relobj_file* object); + make_plt_entry(Symbol_table*, Layout*, Symbol*); // Create a PLT entry for a local IFUNC symbol. void - make_local_ifunc_plt_entry(Layout*, - const elfcpp::Rela&, - Sized_relobj_file*); + make_local_ifunc_plt_entry(Symbol_table*, Layout*, + Sized_relobj_file*, + unsigned int); + // Create a GOT entry for local dynamic __tls_get_addr. unsigned int @@ -682,6 +1187,10 @@ class Target_powerpc : public Sized_target Reloc_section* rela_dyn_section(Layout*); + // Similarly, but for ifunc symbols get the one for ifunc. + Reloc_section* + rela_dyn_section(Symbol_table*, Layout*, bool for_ifunc); + // Copy a relocation against a global symbol. void copy_reloc(Symbol_table* symtab, Layout* layout, @@ -695,6 +1204,51 @@ class Target_powerpc : public Sized_target reloc, this->rela_dyn_section(layout)); } + // Look over all the input sections, deciding where to place stubs. + void + group_sections(Layout*, const Task*, bool); + + // Sort output sections by address. + struct Sort_sections + { + bool + operator()(const Output_section* sec1, const Output_section* sec2) + { return sec1->address() < sec2->address(); } + }; + + class Branch_info + { + public: + Branch_info(Powerpc_relobj* ppc_object, + unsigned int data_shndx, + Address r_offset, + unsigned int r_type, + unsigned int r_sym, + Address addend) + : object_(ppc_object), shndx_(data_shndx), offset_(r_offset), + r_type_(r_type), r_sym_(r_sym), addend_(addend) + { } + + ~Branch_info() + { } + + // If this branch needs a plt call stub, or a long branch stub, make one. + bool + make_stub(Stub_table*, + Stub_table*, + Symbol_table*) const; + + private: + // The branch location.. + Powerpc_relobj* object_; + unsigned int shndx_; + Address offset_; + // ..and the branch type and destination. + unsigned int r_type_; + unsigned int r_sym_; + Address addend_; + }; + // Information about this specific target which we pass to the // general Target structure. static Target::Target_info powerpc_info; @@ -711,22 +1265,56 @@ class Target_powerpc : public Sized_target GOT_TYPE_TPREL // entry for @got@tprel }; - // The GOT output section. + // The GOT section. Output_data_got_powerpc* got_; - // The PLT output section. + // The PLT section. This is a container for a table of addresses, + // and their relocations. Each address in the PLT has a dynamic + // relocation (R_*_JMP_SLOT) and each address will have a + // corresponding entry in .glink for lazy resolution of the PLT. + // ppc32 initialises the PLT to point at the .glink entry, while + // ppc64 leaves this to ld.so. To make a call via the PLT, the + // linker adds a stub that loads the PLT entry into ctr then + // branches to ctr. There may be more than one stub for each PLT + // entry. DT_JMPREL points at the first PLT dynamic relocation and + // DT_PLTRELSZ gives the total size of PLT dynamic relocations. Output_data_plt_powerpc* plt_; - // The IPLT output section. + // The IPLT section. Like plt_, this is a container for a table of + // addresses and their relocations, specifically for STT_GNU_IFUNC + // functions that resolve locally (STT_GNU_IFUNC functions that + // don't resolve locally go in PLT). Unlike plt_, these have no + // entry in .glink for lazy resolution, and the relocation section + // does not have a 1-1 correspondence with IPLT addresses. In fact, + // the relocation section may contain relocations against + // STT_GNU_IFUNC symbols at locations outside of IPLT. The + // relocation section will appear at the end of other dynamic + // relocations, so that ld.so applies these relocations after other + // dynamic relocations. In a static executable, the relocation + // section is emitted and marked with __rela_iplt_start and + // __rela_iplt_end symbols. Output_data_plt_powerpc* iplt_; - // The .glink output section. + // Section holding long branch destinations. + Output_data_brlt_powerpc* brlt_section_; + // The .glink section. Output_data_glink* glink_; - // The dynamic reloc output section. + // The dynamic reloc section. Reloc_section* rela_dyn_; // Relocs saved to avoid a COPY reloc. Copy_relocs copy_relocs_; - // Space for variables copied with a COPY reloc. - Output_data_space* dynbss_; // Offset of the GOT entry for local dynamic __tls_get_addr calls. unsigned int tlsld_got_offset_; + + Stub_tables stub_tables_; + typedef Unordered_map Branch_lookup_table; + Branch_lookup_table branch_lookup_table_; + + typedef std::vector Branches; + Branches branch_info_; + + bool plt_thread_safe_; + + bool relax_failed_; + int relax_fail_count_; + int32_t stub_group_size_; }; template<> @@ -752,7 +1340,8 @@ Target::Target_info Target_powerpc<32, true>::powerpc_info = 0, // small_common_section_flags 0, // large_common_section_flags NULL, // attributes_section - NULL // attributes_vendor + NULL, // attributes_vendor + "_start" // entry_symbol_name }; template<> @@ -778,7 +1367,8 @@ Target::Target_info Target_powerpc<32, false>::powerpc_info = 0, // small_common_section_flags 0, // large_common_section_flags NULL, // attributes_section - NULL // attributes_vendor + NULL, // attributes_vendor + "_start" // entry_symbol_name }; template<> @@ -804,7 +1394,8 @@ Target::Target_info Target_powerpc<64, true>::powerpc_info = 0, // small_common_section_flags 0, // large_common_section_flags NULL, // attributes_section - NULL // attributes_vendor + NULL, // attributes_vendor + "_start" // entry_symbol_name }; template<> @@ -830,7 +1421,8 @@ Target::Target_info Target_powerpc<64, false>::powerpc_info = 0, // small_common_section_flags 0, // large_common_section_flags NULL, // attributes_section - NULL // attributes_vendor + NULL, // attributes_vendor + "_start" // entry_symbol_name }; inline bool @@ -886,102 +1478,6 @@ at_tls_transform(uint32_t insn, unsigned int reg) return insn; } -// Modified version of symtab.h class Symbol member -// Given a direct absolute or pc-relative static relocation against -// the global symbol, this function returns whether a dynamic relocation -// is needed. - -template -bool -needs_dynamic_reloc(const Symbol* gsym, int flags) -{ - // No dynamic relocations in a static link! - if (parameters->doing_static_link()) - return false; - - // A reference to an undefined symbol from an executable should be - // statically resolved to 0, and does not need a dynamic relocation. - // This matches gnu ld behavior. - if (gsym->is_undefined() && !parameters->options().shared()) - return false; - - // A reference to an absolute symbol does not need a dynamic relocation. - if (gsym->is_absolute()) - return false; - - // An absolute reference within a position-independent output file - // will need a dynamic relocation. - if ((flags & Symbol::ABSOLUTE_REF) - && parameters->options().output_is_position_independent()) - return true; - - // A function call that can branch to a local PLT entry does not need - // a dynamic relocation. - if ((flags & Symbol::FUNCTION_CALL) && gsym->has_plt_offset()) - return false; - - // A reference to any PLT entry in a non-position-independent executable - // does not need a dynamic relocation. - // Except due to having function descriptors on powerpc64 we don't define - // functions to their plt code in an executable, so this doesn't apply. - if (size == 32 - && !parameters->options().output_is_position_independent() - && gsym->has_plt_offset()) - return false; - - // A reference to a symbol defined in a dynamic object or to a - // symbol that is preemptible will need a dynamic relocation. - if (gsym->is_from_dynobj() - || gsym->is_undefined() - || gsym->is_preemptible()) - return true; - - // For all other cases, return FALSE. - return false; -} - -// Modified version of symtab.h class Symbol member -// Whether we should use the PLT offset associated with a symbol for -// a relocation. FLAGS is a set of Reference_flags. - -template -bool -use_plt_offset(const Symbol* gsym, int flags) -{ - // If the symbol doesn't have a PLT offset, then naturally we - // don't want to use it. - if (!gsym->has_plt_offset()) - return false; - - // For a STT_GNU_IFUNC symbol we always have to use the PLT entry. - if (gsym->type() == elfcpp::STT_GNU_IFUNC) - return true; - - // If we are going to generate a dynamic relocation, then we will - // wind up using that, so no need to use the PLT entry. - if (needs_dynamic_reloc(gsym, flags)) - return false; - - // If the symbol is from a dynamic object, we need to use the PLT - // entry. - if (gsym->is_from_dynobj()) - return true; - - // If we are generating a shared object, and gsym symbol is - // undefined or preemptible, we need to use the PLT entry. - if (parameters->options().shared() - && (gsym->is_undefined() || gsym->is_preemptible())) - return true; - - // If gsym is a call to a weak undefined symbol, we need to use - // the PLT entry; the symbol may be defined by a library loaded - // at runtime. - if ((flags & Symbol::FUNCTION_CALL) && gsym->is_weak_undefined()) - return true; - - // Otherwise we can use the regular definition. - return false; -} template class Powerpc_relocate_functions @@ -991,7 +1487,10 @@ public: { CHECK_NONE, CHECK_SIGNED, - CHECK_BITFIELD + CHECK_UNSIGNED, + CHECK_BITFIELD, + CHECK_LOW_INSN, + CHECK_HIGH_INSN }; enum Status @@ -1017,12 +1516,20 @@ private: template static inline bool - has_overflow_bitfield(Address value) + has_overflow_unsigned(Address value) { Address limit = static_cast
(1) << ((valsize - 1) >> 1); limit <<= ((valsize - 1) >> 1); limit <<= ((valsize - 1) - 2 * ((valsize - 1) >> 1)); - return value > (limit << 1) - 1 && value + limit > (limit << 1) - 1; + return value > (limit << 1) - 1; + } + + template + static inline bool + has_overflow_bitfield(Address value) + { + return (has_overflow_unsigned(value) + && has_overflow_signed(value)); } template @@ -1034,6 +1541,11 @@ private: if (has_overflow_signed(value)) return STATUS_OVERFLOW; } + else if (overflow == CHECK_UNSIGNED) + { + if (has_overflow_unsigned(value)) + return STATUS_OVERFLOW; + } else if (overflow == CHECK_BITFIELD) { if (has_overflow_bitfield(value)) @@ -1043,58 +1555,58 @@ private: } // Do a simple RELA relocation - template + template static inline Status rela(unsigned char* view, Address value, Overflow_check overflow) { - typedef typename elfcpp::Swap::Valtype Valtype; + typedef typename elfcpp::Swap::Valtype Valtype; Valtype* wv = reinterpret_cast(view); - elfcpp::Swap::writeval(wv, value); + elfcpp::Swap::writeval(wv, value); return overflowed(value, overflow); } - template + template static inline Status rela(unsigned char* view, unsigned int right_shift, - typename elfcpp::Valtype_base::Valtype dst_mask, + typename elfcpp::Valtype_base::Valtype dst_mask, Address value, Overflow_check overflow) { - typedef typename elfcpp::Swap::Valtype Valtype; + typedef typename elfcpp::Swap::Valtype Valtype; Valtype* wv = reinterpret_cast(view); - Valtype val = elfcpp::Swap::readval(wv); + Valtype val = elfcpp::Swap::readval(wv); Valtype reloc = value >> right_shift; val &= ~dst_mask; reloc &= dst_mask; - elfcpp::Swap::writeval(wv, val | reloc); + elfcpp::Swap::writeval(wv, val | reloc); return overflowed(value >> right_shift, overflow); } // Do a simple RELA relocation, unaligned. - template + template static inline Status rela_ua(unsigned char* view, Address value, Overflow_check overflow) { - elfcpp::Swap_unaligned::writeval(view, value); + elfcpp::Swap_unaligned::writeval(view, value); return overflowed(value, overflow); } - template + template static inline Status rela_ua(unsigned char* view, unsigned int right_shift, - typename elfcpp::Valtype_base::Valtype dst_mask, + typename elfcpp::Valtype_base::Valtype dst_mask, Address value, Overflow_check overflow) { - typedef typename elfcpp::Swap_unaligned::Valtype + typedef typename elfcpp::Swap_unaligned::Valtype Valtype; - Valtype val = elfcpp::Swap::readval(view); + Valtype val = elfcpp::Swap::readval(view); Valtype reloc = value >> right_shift; val &= ~dst_mask; reloc &= dst_mask; - elfcpp::Swap_unaligned::writeval(view, val | reloc); + elfcpp::Swap_unaligned::writeval(view, val | reloc); return overflowed(value >> right_shift, overflow); } @@ -1102,28 +1614,29 @@ public: // R_PPC64_ADDR64: (Symbol + Addend) static inline void addr64(unsigned char* view, Address value) - { This::template rela<64>(view, value, CHECK_NONE); } + { This::template rela<64,64>(view, value, CHECK_NONE); } // R_PPC64_UADDR64: (Symbol + Addend) unaligned static inline void addr64_u(unsigned char* view, Address value) - { This::template rela_ua<64>(view, value, CHECK_NONE); } + { This::template rela_ua<64,64>(view, value, CHECK_NONE); } // R_POWERPC_ADDR32: (Symbol + Addend) static inline Status addr32(unsigned char* view, Address value, Overflow_check overflow) - { return This::template rela<32>(view, value, overflow); } + { return This::template rela<32,32>(view, value, overflow); } // R_POWERPC_UADDR32: (Symbol + Addend) unaligned static inline Status addr32_u(unsigned char* view, Address value, Overflow_check overflow) - { return This::template rela_ua<32>(view, value, overflow); } + { return This::template rela_ua<32,32>(view, value, overflow); } // R_POWERPC_ADDR24: (Symbol + Addend) & 0x3fffffc static inline Status addr24(unsigned char* view, Address value, Overflow_check overflow) { - Status stat = This::template rela<32>(view, 0, 0x03fffffc, value, overflow); + Status stat = This::template rela<32,26>(view, 0, 0x03fffffc, + value, overflow); if (overflow != CHECK_NONE && (value & 3) != 0) stat = STATUS_OVERFLOW; return stat; @@ -1132,19 +1645,19 @@ public: // R_POWERPC_ADDR16: (Symbol + Addend) & 0xffff static inline Status addr16(unsigned char* view, Address value, Overflow_check overflow) - { return This::template rela<16>(view, value, overflow); } + { return This::template rela<16,16>(view, value, overflow); } // R_POWERPC_ADDR16: (Symbol + Addend) & 0xffff, unaligned static inline Status addr16_u(unsigned char* view, Address value, Overflow_check overflow) - { return This::template rela_ua<16>(view, value, overflow); } + { return This::template rela_ua<16,16>(view, value, overflow); } // R_POWERPC_ADDR16_DS: (Symbol + Addend) & 0xfffc static inline Status addr16_ds(unsigned char* view, Address value, Overflow_check overflow) { - Status stat = This::template rela<16>(view, 0, 0xfffc, value, overflow); - if (overflow != CHECK_NONE && (value & 3) != 0) + Status stat = This::template rela<16,16>(view, 0, 0xfffc, value, overflow); + if ((value & 3) != 0) stat = STATUS_OVERFLOW; return stat; } @@ -1152,7 +1665,7 @@ public: // R_POWERPC_ADDR16_HI: ((Symbol + Addend) >> 16) & 0xffff static inline void addr16_hi(unsigned char* view, Address value) - { This::template rela<16>(view, 16, 0xffff, value, CHECK_NONE); } + { This::template rela<16,16>(view, 16, 0xffff, value, CHECK_NONE); } // R_POWERPC_ADDR16_HA: ((Symbol + Addend + 0x8000) >> 16) & 0xffff static inline void @@ -1162,7 +1675,7 @@ public: // R_POWERPC_ADDR16_HIGHER: ((Symbol + Addend) >> 32) & 0xffff static inline void addr16_hi2(unsigned char* view, Address value) - { This::template rela<16>(view, 32, 0xffff, value, CHECK_NONE); } + { This::template rela<16,16>(view, 32, 0xffff, value, CHECK_NONE); } // R_POWERPC_ADDR16_HIGHERA: ((Symbol + Addend + 0x8000) >> 32) & 0xffff static inline void @@ -1172,7 +1685,7 @@ public: // R_POWERPC_ADDR16_HIGHEST: ((Symbol + Addend) >> 48) & 0xffff static inline void addr16_hi3(unsigned char* view, Address value) - { This::template rela<16>(view, 48, 0xffff, value, CHECK_NONE); } + { This::template rela<16,16>(view, 48, 0xffff, value, CHECK_NONE); } // R_POWERPC_ADDR16_HIGHESTA: ((Symbol + Addend + 0x8000) >> 48) & 0xffff static inline void @@ -1183,13 +1696,36 @@ public: static inline Status addr14(unsigned char* view, Address value, Overflow_check overflow) { - Status stat = This::template rela<32>(view, 0, 0xfffc, value, overflow); + Status stat = This::template rela<32,16>(view, 0, 0xfffc, value, overflow); if (overflow != CHECK_NONE && (value & 3) != 0) stat = STATUS_OVERFLOW; return stat; } }; +// Set ABI version for input and output. + +template +void +Powerpc_relobj::set_abiversion(int ver) +{ + this->e_flags_ |= ver; + if (this->abiversion() != 0) + { + Target_powerpc* target = + static_cast*>( + parameters->sized_target()); + if (target->abiversion() == 0) + target->set_abiversion(this->abiversion()); + else if (target->abiversion() != this->abiversion()) + gold_error(_("%s: ABI version %d is not compatible " + "with ABI version %d output"), + this->name().c_str(), + this->abiversion(), target->abiversion()); + + } +} + // Stash away the index of .got2 or .opd in a relocatable object, if // such a section exists. @@ -1204,12 +1740,21 @@ Powerpc_relobj::do_find_special_sections( section_size_type names_size = sd->section_names_size; const unsigned char* s; - s = this->find_shdr(pshdrs, size == 32 ? ".got2" : ".opd", - names, names_size, NULL); + s = this->template find_shdr(pshdrs, + size == 32 ? ".got2" : ".opd", + names, names_size, NULL); if (s != NULL) { unsigned int ndx = (s - pshdrs) / elfcpp::Elf_sizes::shdr_size; this->special_ = ndx; + if (size == 64) + { + if (this->abiversion() == 0) + this->set_abiversion(1); + else if (this->abiversion() > 1) + gold_error(_("%s: .opd invalid in abiv%d"), + this->name().c_str(), this->abiversion()); + } } return Sized_relobj_file::do_find_special_sections(sd); } @@ -1320,6 +1865,244 @@ Powerpc_relobj::do_read_relocs(Read_relocs_data* rd) } } +// Read the symbols then set up st_other vector. + +template +void +Powerpc_relobj::do_read_symbols(Read_symbols_data* sd) +{ + this->base_read_symbols(sd); + if (size == 64) + { + const int shdr_size = elfcpp::Elf_sizes::shdr_size; + const unsigned char* const pshdrs = sd->section_headers->data(); + const unsigned int loccount = this->do_local_symbol_count(); + if (loccount != 0) + { + this->st_other_.resize(loccount); + const int sym_size = elfcpp::Elf_sizes::sym_size; + off_t locsize = loccount * sym_size; + const unsigned int symtab_shndx = this->symtab_shndx(); + const unsigned char *psymtab = pshdrs + symtab_shndx * shdr_size; + typename elfcpp::Shdr shdr(psymtab); + const unsigned char* psyms = this->get_view(shdr.get_sh_offset(), + locsize, true, false); + psyms += sym_size; + for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) + { + elfcpp::Sym sym(psyms); + unsigned char st_other = sym.get_st_other(); + this->st_other_[i] = st_other; + if ((st_other & elfcpp::STO_PPC64_LOCAL_MASK) != 0) + { + if (this->abiversion() == 0) + this->set_abiversion(2); + else if (this->abiversion() < 2) + gold_error(_("%s: local symbol %d has invalid st_other" + " for ABI version 1"), + this->name().c_str(), i); + } + } + } + } +} + +template +void +Powerpc_dynobj::set_abiversion(int ver) +{ + this->e_flags_ |= ver; + if (this->abiversion() != 0) + { + Target_powerpc* target = + static_cast*>( + parameters->sized_target()); + if (target->abiversion() == 0) + target->set_abiversion(this->abiversion()); + else if (target->abiversion() != this->abiversion()) + gold_error(_("%s: ABI version %d is not compatible " + "with ABI version %d output"), + this->name().c_str(), + this->abiversion(), target->abiversion()); + + } +} + +// Call Sized_dynobj::base_read_symbols to read the symbols then +// read .opd from a dynamic object, filling in opd_ent_ vector, + +template +void +Powerpc_dynobj::do_read_symbols(Read_symbols_data* sd) +{ + this->base_read_symbols(sd); + if (size == 64) + { + const int shdr_size = elfcpp::Elf_sizes::shdr_size; + const unsigned char* const pshdrs = sd->section_headers->data(); + const unsigned char* namesu = sd->section_names->data(); + const char* names = reinterpret_cast(namesu); + const unsigned char* s = NULL; + const unsigned char* opd; + section_size_type opd_size; + + // Find and read .opd section. + while (1) + { + s = this->template find_shdr(pshdrs, ".opd", names, + sd->section_names_size, + s); + if (s == NULL) + return; + + typename elfcpp::Shdr shdr(s); + if (shdr.get_sh_type() == elfcpp::SHT_PROGBITS + && (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) != 0) + { + if (this->abiversion() == 0) + this->set_abiversion(1); + else if (this->abiversion() > 1) + gold_error(_("%s: .opd invalid in abiv%d"), + this->name().c_str(), this->abiversion()); + + this->opd_shndx_ = (s - pshdrs) / shdr_size; + this->opd_address_ = shdr.get_sh_addr(); + opd_size = convert_to_section_size_type(shdr.get_sh_size()); + opd = this->get_view(shdr.get_sh_offset(), opd_size, + true, false); + break; + } + } + + // Build set of executable sections. + // Using a set is probably overkill. There is likely to be only + // a few executable sections, typically .init, .text and .fini, + // and they are generally grouped together. + typedef std::set Exec_sections; + Exec_sections exec_sections; + s = pshdrs; + for (unsigned int i = 1; i < this->shnum(); ++i, s += shdr_size) + { + typename elfcpp::Shdr shdr(s); + if (shdr.get_sh_type() == elfcpp::SHT_PROGBITS + && ((shdr.get_sh_flags() + & (elfcpp::SHF_ALLOC | elfcpp::SHF_EXECINSTR)) + == (elfcpp::SHF_ALLOC | elfcpp::SHF_EXECINSTR)) + && shdr.get_sh_size() != 0) + { + exec_sections.insert(Sec_info(shdr.get_sh_addr(), + shdr.get_sh_size(), i)); + } + } + if (exec_sections.empty()) + return; + + // Look over the OPD entries. This is complicated by the fact + // that some binaries will use two-word entries while others + // will use the standard three-word entries. In most cases + // the third word (the environment pointer for languages like + // Pascal) is unused and will be zero. If the third word is + // used it should not be pointing into executable sections, + // I think. + this->init_opd(opd_size); + for (const unsigned char* p = opd; p < opd + opd_size; p += 8) + { + typedef typename elfcpp::Swap<64, big_endian>::Valtype Valtype; + const Valtype* valp = reinterpret_cast(p); + Valtype val = elfcpp::Swap<64, big_endian>::readval(valp); + if (val == 0) + // Chances are that this is the third word of an OPD entry. + continue; + typename Exec_sections::const_iterator e + = exec_sections.upper_bound(Sec_info(val, 0, 0)); + if (e != exec_sections.begin()) + { + --e; + if (e->start <= val && val < e->start + e->len) + { + // We have an address in an executable section. + // VAL ought to be the function entry, set it up. + this->set_opd_ent(p - opd, e->shndx, val); + // Skip second word of OPD entry, the TOC pointer. + p += 8; + } + } + // If we didn't match any executable sections, we likely + // have a non-zero third word in the OPD entry. + } + } +} + +// Set up some symbols. + +template +void +Target_powerpc::do_define_standard_symbols( + Symbol_table* symtab, + Layout* layout) +{ + if (size == 32) + { + // Define _GLOBAL_OFFSET_TABLE_ to ensure it isn't seen as + // undefined when scanning relocs (and thus requires + // non-relative dynamic relocs). The proper value will be + // updated later. + Symbol *gotsym = symtab->lookup("_GLOBAL_OFFSET_TABLE_", NULL); + if (gotsym != NULL && gotsym->is_undefined()) + { + Target_powerpc* target = + static_cast*>( + parameters->sized_target()); + Output_data_got_powerpc* got + = target->got_section(symtab, layout); + symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL, + Symbol_table::PREDEFINED, + got, 0, 0, + elfcpp::STT_OBJECT, + elfcpp::STB_LOCAL, + elfcpp::STV_HIDDEN, 0, + false, false); + } + + // Define _SDA_BASE_ at the start of the .sdata section + 32768. + Symbol *sdasym = symtab->lookup("_SDA_BASE_", NULL); + if (sdasym != NULL && sdasym->is_undefined()) + { + Output_data_space* sdata = new Output_data_space(4, "** sdata"); + Output_section* os + = layout->add_output_section_data(".sdata", 0, + elfcpp::SHF_ALLOC + | elfcpp::SHF_WRITE, + sdata, ORDER_SMALL_DATA, false); + symtab->define_in_output_data("_SDA_BASE_", NULL, + Symbol_table::PREDEFINED, + os, 32768, 0, elfcpp::STT_OBJECT, + elfcpp::STB_LOCAL, elfcpp::STV_HIDDEN, + 0, false, false); + } + } + else + { + // Define .TOC. as for 32-bit _GLOBAL_OFFSET_TABLE_ + Symbol *gotsym = symtab->lookup(".TOC.", NULL); + if (gotsym != NULL && gotsym->is_undefined()) + { + Target_powerpc* target = + static_cast*>( + parameters->sized_target()); + Output_data_got_powerpc* got + = target->got_section(symtab, layout); + symtab->define_in_output_data(".TOC.", NULL, + Symbol_table::PREDEFINED, + got, 0x8000, 0, + elfcpp::STT_OBJECT, + elfcpp::STB_LOCAL, + elfcpp::STV_HIDDEN, 0, + false, false); + } + } +} + // Set up PowerPC target specific relobj. template @@ -1342,8 +2125,8 @@ Target_powerpc::do_make_elf_object( } else if (et == elfcpp::ET_DYN) { - Sized_dynobj* obj = - new Sized_dynobj(name, input_file, offset, ehdr); + Powerpc_dynobj* obj = + new Powerpc_dynobj(name, input_file, offset, ehdr); obj->setup(); return obj; } @@ -1366,34 +2149,90 @@ public: symtab_(symtab), layout_(layout), header_ent_cnt_(size == 32 ? 3 : 1), header_index_(size == 32 ? 0x2000 : 0) - {} - - class Got_entry; + { } - // Create a new GOT entry and return its offset. - unsigned int - add_got_entry(Got_entry got_entry) + // Override all the Output_data_got methods we use so as to first call + // reserve_ent(). + bool + add_global(Symbol* gsym, unsigned int got_type) { this->reserve_ent(); - return Output_data_got::add_got_entry(got_entry); + return Output_data_got::add_global(gsym, got_type); } - // Create a pair of new GOT entries and return the offset of the first. - unsigned int - add_got_entry_pair(Got_entry got_entry_1, Got_entry got_entry_2) + bool + add_global_plt(Symbol* gsym, unsigned int got_type) { - this->reserve_ent(2); - return Output_data_got::add_got_entry_pair(got_entry_1, - got_entry_2); + this->reserve_ent(); + return Output_data_got::add_global_plt(gsym, got_type); + } + + bool + add_global_tls(Symbol* gsym, unsigned int got_type) + { return this->add_global_plt(gsym, got_type); } + + void + add_global_with_rel(Symbol* gsym, unsigned int got_type, + Output_data_reloc_generic* rel_dyn, unsigned int r_type) + { + this->reserve_ent(); + Output_data_got:: + add_global_with_rel(gsym, got_type, rel_dyn, r_type); + } + + void + add_global_pair_with_rel(Symbol* gsym, unsigned int got_type, + Output_data_reloc_generic* rel_dyn, + unsigned int r_type_1, unsigned int r_type_2) + { + this->reserve_ent(2); + Output_data_got:: + add_global_pair_with_rel(gsym, got_type, rel_dyn, r_type_1, r_type_2); + } + + bool + add_local(Relobj* object, unsigned int sym_index, unsigned int got_type) + { + this->reserve_ent(); + return Output_data_got::add_local(object, sym_index, + got_type); + } + + bool + add_local_plt(Relobj* object, unsigned int sym_index, unsigned int got_type) + { + this->reserve_ent(); + return Output_data_got::add_local_plt(object, sym_index, + got_type); + } + + bool + add_local_tls(Relobj* object, unsigned int sym_index, unsigned int got_type) + { return this->add_local_plt(object, sym_index, got_type); } + + void + add_local_tls_pair(Relobj* object, unsigned int sym_index, + unsigned int got_type, + Output_data_reloc_generic* rel_dyn, + unsigned int r_type) + { + this->reserve_ent(2); + Output_data_got:: + add_local_tls_pair(object, sym_index, got_type, rel_dyn, r_type); + } + + unsigned int + add_constant(Valtype constant) + { + this->reserve_ent(); + return Output_data_got::add_constant(constant); } unsigned int add_constant_pair(Valtype c1, Valtype c2) { this->reserve_ent(2); - unsigned int got_offset = this->add_constant(c1); - this->add_constant(c2); - return got_offset; + return Output_data_got::add_constant_pair(c1, c2); } // Offset of _GLOBAL_OFFSET_TABLE_. @@ -1405,7 +2244,7 @@ public: // Offset of base used to access the GOT/TOC. // The got/toc pointer reg will be set to this value. - typename elfcpp::Elf_types::Elf_Off + Valtype got_base_offset(const Powerpc_relobj* object) const { if (size == 32) @@ -1462,13 +2301,20 @@ private: Output_data_got::add_constant(0); // Define _GLOBAL_OFFSET_TABLE_ at the header - this->symtab_->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL, - Symbol_table::PREDEFINED, - this, this->g_o_t(), 0, - elfcpp::STT_OBJECT, - elfcpp::STB_LOCAL, - elfcpp::STV_HIDDEN, - 0, false, false); + Symbol *gotsym = this->symtab_->lookup("_GLOBAL_OFFSET_TABLE_", NULL); + if (gotsym != NULL) + { + Sized_symbol* sym = static_cast*>(gotsym); + sym->set_value(this->g_o_t()); + } + else + this->symtab_->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL, + Symbol_table::PREDEFINED, + this, this->g_o_t(), 0, + elfcpp::STT_OBJECT, + elfcpp::STB_LOCAL, + elfcpp::STV_HIDDEN, 0, + false, false); } else Output_data_got::add_constant(0); @@ -1523,6 +2369,660 @@ Target_powerpc::rela_dyn_section(Layout* layout) return this->rela_dyn_; } +// Similarly, but for ifunc symbols get the one for ifunc. + +template +typename Target_powerpc::Reloc_section* +Target_powerpc::rela_dyn_section(Symbol_table* symtab, + Layout* layout, + bool for_ifunc) +{ + if (!for_ifunc) + return this->rela_dyn_section(layout); + + if (this->iplt_ == NULL) + this->make_iplt_section(symtab, layout); + return this->iplt_->rel_plt(); +} + +class Stub_control +{ + public: + // Determine the stub group size. The group size is the absolute + // value of the parameter --stub-group-size. If --stub-group-size + // is passed a negative value, we restrict stubs to be always before + // the stubbed branches. + Stub_control(int32_t size, bool no_size_errors) + : state_(NO_GROUP), stub_group_size_(abs(size)), + stub14_group_size_(abs(size) >> 10), + stubs_always_before_branch_(size < 0), + suppress_size_errors_(no_size_errors), + group_end_addr_(0), owner_(NULL), output_section_(NULL) + { + } + + // Return true iff input section can be handled by current stub + // group. + bool + can_add_to_stub_group(Output_section* o, + const Output_section::Input_section* i, + bool has14); + + const Output_section::Input_section* + owner() + { return owner_; } + + Output_section* + output_section() + { return output_section_; } + + void + set_output_and_owner(Output_section* o, + const Output_section::Input_section* i) + { + this->output_section_ = o; + this->owner_ = i; + } + + private: + typedef enum + { + NO_GROUP, + FINDING_STUB_SECTION, + HAS_STUB_SECTION + } State; + + State state_; + uint32_t stub_group_size_; + uint32_t stub14_group_size_; + bool stubs_always_before_branch_; + bool suppress_size_errors_; + uint64_t group_end_addr_; + const Output_section::Input_section* owner_; + Output_section* output_section_; +}; + +// Return true iff input section can be handled by current stub +// group. + +bool +Stub_control::can_add_to_stub_group(Output_section* o, + const Output_section::Input_section* i, + bool has14) +{ + uint32_t group_size + = has14 ? this->stub14_group_size_ : this->stub_group_size_; + bool whole_sec = o->order() == ORDER_INIT || o->order() == ORDER_FINI; + uint64_t this_size; + uint64_t start_addr = o->address(); + + if (whole_sec) + // .init and .fini sections are pasted together to form a single + // function. We can't be adding stubs in the middle of the function. + this_size = o->data_size(); + else + { + start_addr += i->relobj()->output_section_offset(i->shndx()); + this_size = i->data_size(); + } + uint64_t end_addr = start_addr + this_size; + bool toobig = this_size > group_size; + + if (toobig && !this->suppress_size_errors_) + gold_warning(_("%s:%s exceeds group size"), + i->relobj()->name().c_str(), + i->relobj()->section_name(i->shndx()).c_str()); + + if (this->state_ != HAS_STUB_SECTION + && (!whole_sec || this->output_section_ != o) + && (this->state_ == NO_GROUP + || this->group_end_addr_ - end_addr < group_size)) + { + this->owner_ = i; + this->output_section_ = o; + } + + if (this->state_ == NO_GROUP) + { + this->state_ = FINDING_STUB_SECTION; + this->group_end_addr_ = end_addr; + } + else if (this->group_end_addr_ - start_addr < group_size) + ; + // Adding this section would make the group larger than GROUP_SIZE. + else if (this->state_ == FINDING_STUB_SECTION + && !this->stubs_always_before_branch_ + && !toobig) + { + // But wait, there's more! Input sections up to GROUP_SIZE + // bytes before the stub table can be handled by it too. + this->state_ = HAS_STUB_SECTION; + this->group_end_addr_ = end_addr; + } + else + { + this->state_ = NO_GROUP; + return false; + } + return true; +} + +// Look over all the input sections, deciding where to place stubs. + +template +void +Target_powerpc::group_sections(Layout* layout, + const Task*, + bool no_size_errors) +{ + Stub_control stub_control(this->stub_group_size_, no_size_errors); + + // Group input sections and insert stub table + Stub_table_owner* table_owner = NULL; + std::vector tables; + Layout::Section_list section_list; + layout->get_executable_sections(§ion_list); + std::stable_sort(section_list.begin(), section_list.end(), Sort_sections()); + for (Layout::Section_list::reverse_iterator o = section_list.rbegin(); + o != section_list.rend(); + ++o) + { + typedef Output_section::Input_section_list Input_section_list; + for (Input_section_list::const_reverse_iterator i + = (*o)->input_sections().rbegin(); + i != (*o)->input_sections().rend(); + ++i) + { + if (i->is_input_section() + || i->is_relaxed_input_section()) + { + Powerpc_relobj* ppcobj = static_cast + *>(i->relobj()); + bool has14 = ppcobj->has_14bit_branch(i->shndx()); + if (!stub_control.can_add_to_stub_group(*o, &*i, has14)) + { + table_owner->output_section = stub_control.output_section(); + table_owner->owner = stub_control.owner(); + stub_control.set_output_and_owner(*o, &*i); + table_owner = NULL; + } + if (table_owner == NULL) + { + table_owner = new Stub_table_owner; + tables.push_back(table_owner); + } + ppcobj->set_stub_table(i->shndx(), tables.size() - 1); + } + } + } + if (table_owner != NULL) + { + const Output_section::Input_section* i = stub_control.owner(); + + if (tables.size() >= 2 && tables[tables.size() - 2]->owner == i) + { + // Corner case. A new stub group was made for the first + // section (last one looked at here) for some reason, but + // the first section is already being used as the owner for + // a stub table for following sections. Force it into that + // stub group. + tables.pop_back(); + delete table_owner; + Powerpc_relobj* ppcobj = static_cast + *>(i->relobj()); + ppcobj->set_stub_table(i->shndx(), tables.size() - 1); + } + else + { + table_owner->output_section = stub_control.output_section(); + table_owner->owner = i; + } + } + for (typename std::vector::iterator t = tables.begin(); + t != tables.end(); + ++t) + { + Stub_table* stub_table; + + if ((*t)->owner->is_input_section()) + stub_table = new Stub_table(this, + (*t)->output_section, + (*t)->owner); + else if ((*t)->owner->is_relaxed_input_section()) + stub_table = static_cast*>( + (*t)->owner->relaxed_input_section()); + else + gold_unreachable(); + this->stub_tables_.push_back(stub_table); + delete *t; + } +} + +static unsigned long +max_branch_delta (unsigned int r_type) +{ + if (r_type == elfcpp::R_POWERPC_REL14 + || r_type == elfcpp::R_POWERPC_REL14_BRTAKEN + || r_type == elfcpp::R_POWERPC_REL14_BRNTAKEN) + return 1L << 15; + if (r_type == elfcpp::R_POWERPC_REL24 + || r_type == elfcpp::R_PPC_PLTREL24 + || r_type == elfcpp::R_PPC_LOCAL24PC) + return 1L << 25; + return 0; +} + +// If this branch needs a plt call stub, or a long branch stub, make one. + +template +bool +Target_powerpc::Branch_info::make_stub( + Stub_table* stub_table, + Stub_table* ifunc_stub_table, + Symbol_table* symtab) const +{ + Symbol* sym = this->object_->global_symbol(this->r_sym_); + if (sym != NULL && sym->is_forwarder()) + sym = symtab->resolve_forwards(sym); + const Sized_symbol* gsym = static_cast*>(sym); + Target_powerpc* target = + static_cast*>( + parameters->sized_target()); + if (gsym != NULL + ? gsym->use_plt_offset(Scan::get_reference_flags(this->r_type_, target)) + : this->object_->local_has_plt_offset(this->r_sym_)) + { + if (size == 64 + && gsym != NULL + && target->abiversion() >= 2 + && !parameters->options().output_is_position_independent() + && !is_branch_reloc(this->r_type_)) + target->glink_section()->add_global_entry(gsym); + else + { + if (stub_table == NULL) + stub_table = this->object_->stub_table(this->shndx_); + if (stub_table == NULL) + { + // This is a ref from a data section to an ifunc symbol. + stub_table = ifunc_stub_table; + } + gold_assert(stub_table != NULL); + Address from = this->object_->get_output_section_offset(this->shndx_); + if (from != invalid_address) + from += (this->object_->output_section(this->shndx_)->address() + + this->offset_); + if (gsym != NULL) + return stub_table->add_plt_call_entry(from, + this->object_, gsym, + this->r_type_, this->addend_); + else + return stub_table->add_plt_call_entry(from, + this->object_, this->r_sym_, + this->r_type_, this->addend_); + } + } + else + { + Address max_branch_offset = max_branch_delta(this->r_type_); + if (max_branch_offset == 0) + return true; + Address from = this->object_->get_output_section_offset(this->shndx_); + gold_assert(from != invalid_address); + from += (this->object_->output_section(this->shndx_)->address() + + this->offset_); + Address to; + if (gsym != NULL) + { + switch (gsym->source()) + { + case Symbol::FROM_OBJECT: + { + Object* symobj = gsym->object(); + if (symobj->is_dynamic() + || symobj->pluginobj() != NULL) + return true; + bool is_ordinary; + unsigned int shndx = gsym->shndx(&is_ordinary); + if (shndx == elfcpp::SHN_UNDEF) + return true; + } + break; + + case Symbol::IS_UNDEFINED: + return true; + + default: + break; + } + Symbol_table::Compute_final_value_status status; + to = symtab->compute_final_value(gsym, &status); + if (status != Symbol_table::CFVS_OK) + return true; + if (size == 64) + to += this->object_->ppc64_local_entry_offset(gsym); + } + else + { + const Symbol_value* psymval + = this->object_->local_symbol(this->r_sym_); + Symbol_value symval; + typedef Sized_relobj_file ObjType; + typename ObjType::Compute_final_local_value_status status + = this->object_->compute_final_local_value(this->r_sym_, psymval, + &symval, symtab); + if (status != ObjType::CFLV_OK + || !symval.has_output_value()) + return true; + to = symval.value(this->object_, 0); + if (size == 64) + to += this->object_->ppc64_local_entry_offset(this->r_sym_); + } + if (!(size == 32 && this->r_type_ == elfcpp::R_PPC_PLTREL24)) + to += this->addend_; + if (stub_table == NULL) + stub_table = this->object_->stub_table(this->shndx_); + if (size == 64 && target->abiversion() < 2) + { + unsigned int dest_shndx; + if (!target->symval_for_branch(symtab, gsym, this->object_, + &to, &dest_shndx)) + return true; + } + Address delta = to - from; + if (delta + max_branch_offset >= 2 * max_branch_offset) + { + if (stub_table == NULL) + { + gold_warning(_("%s:%s: branch in non-executable section," + " no long branch stub for you"), + this->object_->name().c_str(), + this->object_->section_name(this->shndx_).c_str()); + return true; + } + return stub_table->add_long_branch_entry(this->object_, + this->r_type_, from, to); + } + } + return true; +} + +// Relaxation hook. This is where we do stub generation. + +template +bool +Target_powerpc::do_relax(int pass, + const Input_objects*, + Symbol_table* symtab, + Layout* layout, + const Task* task) +{ + unsigned int prev_brlt_size = 0; + if (pass == 1) + { + bool thread_safe + = this->abiversion() < 2 && parameters->options().plt_thread_safe(); + if (size == 64 + && this->abiversion() < 2 + && !thread_safe + && !parameters->options().user_set_plt_thread_safe()) + { + static const char* const thread_starter[] = + { + "pthread_create", + /* libstdc++ */ + "_ZNSt6thread15_M_start_threadESt10shared_ptrINS_10_Impl_baseEE", + /* librt */ + "aio_init", "aio_read", "aio_write", "aio_fsync", "lio_listio", + "mq_notify", "create_timer", + /* libanl */ + "getaddrinfo_a", + /* libgomp */ + "GOMP_parallel", + "GOMP_parallel_start", + "GOMP_parallel_loop_static", + "GOMP_parallel_loop_static_start", + "GOMP_parallel_loop_dynamic", + "GOMP_parallel_loop_dynamic_start", + "GOMP_parallel_loop_guided", + "GOMP_parallel_loop_guided_start", + "GOMP_parallel_loop_runtime", + "GOMP_parallel_loop_runtime_start", + "GOMP_parallel_sections", + "GOMP_parallel_sections_start", + /* libgo */ + "__go_go", + }; + + if (parameters->options().shared()) + thread_safe = true; + else + { + for (unsigned int i = 0; + i < sizeof(thread_starter) / sizeof(thread_starter[0]); + i++) + { + Symbol* sym = symtab->lookup(thread_starter[i], NULL); + thread_safe = (sym != NULL + && sym->in_reg() + && sym->in_real_elf()); + if (thread_safe) + break; + } + } + } + this->plt_thread_safe_ = thread_safe; + } + + if (pass == 1) + { + this->stub_group_size_ = parameters->options().stub_group_size(); + bool no_size_errors = true; + if (this->stub_group_size_ == 1) + this->stub_group_size_ = 0x1c00000; + else if (this->stub_group_size_ == -1) + this->stub_group_size_ = -0x1e00000; + else + no_size_errors = false; + this->group_sections(layout, task, no_size_errors); + } + else if (this->relax_failed_ && this->relax_fail_count_ < 3) + { + this->branch_lookup_table_.clear(); + for (typename Stub_tables::iterator p = this->stub_tables_.begin(); + p != this->stub_tables_.end(); + ++p) + { + (*p)->clear_stubs(true); + } + this->stub_tables_.clear(); + this->stub_group_size_ = this->stub_group_size_ / 4 * 3; + gold_info(_("%s: stub group size is too large; retrying with %d"), + program_name, this->stub_group_size_); + this->group_sections(layout, task, true); + } + + // We need address of stub tables valid for make_stub. + for (typename Stub_tables::iterator p = this->stub_tables_.begin(); + p != this->stub_tables_.end(); + ++p) + { + const Powerpc_relobj* object + = static_cast*>((*p)->relobj()); + Address off = object->get_output_section_offset((*p)->shndx()); + gold_assert(off != invalid_address); + Output_section* os = (*p)->output_section(); + (*p)->set_address_and_size(os, off); + } + + if (pass != 1) + { + // Clear plt call stubs, long branch stubs and branch lookup table. + prev_brlt_size = this->branch_lookup_table_.size(); + this->branch_lookup_table_.clear(); + for (typename Stub_tables::iterator p = this->stub_tables_.begin(); + p != this->stub_tables_.end(); + ++p) + { + (*p)->clear_stubs(false); + } + } + + // Build all the stubs. + this->relax_failed_ = false; + Stub_table* ifunc_stub_table + = this->stub_tables_.size() == 0 ? NULL : this->stub_tables_[0]; + Stub_table* one_stub_table + = this->stub_tables_.size() != 1 ? NULL : ifunc_stub_table; + for (typename Branches::const_iterator b = this->branch_info_.begin(); + b != this->branch_info_.end(); + b++) + { + if (!b->make_stub(one_stub_table, ifunc_stub_table, symtab) + && !this->relax_failed_) + { + this->relax_failed_ = true; + this->relax_fail_count_++; + if (this->relax_fail_count_ < 3) + return true; + } + } + + // Did anything change size? + unsigned int num_huge_branches = this->branch_lookup_table_.size(); + bool again = num_huge_branches != prev_brlt_size; + if (size == 64 && num_huge_branches != 0) + this->make_brlt_section(layout); + if (size == 64 && again) + this->brlt_section_->set_current_size(num_huge_branches); + + typedef Unordered_set Output_sections; + Output_sections os_need_update; + for (typename Stub_tables::iterator p = this->stub_tables_.begin(); + p != this->stub_tables_.end(); + ++p) + { + if ((*p)->size_update()) + { + again = true; + (*p)->add_eh_frame(layout); + os_need_update.insert((*p)->output_section()); + } + } + + // Set output section offsets for all input sections in an output + // section that just changed size. Anything past the stubs will + // need updating. + for (typename Output_sections::iterator p = os_need_update.begin(); + p != os_need_update.end(); + p++) + { + Output_section* os = *p; + Address off = 0; + typedef Output_section::Input_section_list Input_section_list; + for (Input_section_list::const_iterator i = os->input_sections().begin(); + i != os->input_sections().end(); + ++i) + { + off = align_address(off, i->addralign()); + if (i->is_input_section() || i->is_relaxed_input_section()) + i->relobj()->set_section_offset(i->shndx(), off); + if (i->is_relaxed_input_section()) + { + Stub_table* stub_table + = static_cast*>( + i->relaxed_input_section()); + off += stub_table->set_address_and_size(os, off); + } + else + off += i->data_size(); + } + // If .branch_lt is part of this output section, then we have + // just done the offset adjustment. + os->clear_section_offsets_need_adjustment(); + } + + if (size == 64 + && !again + && num_huge_branches != 0 + && parameters->options().output_is_position_independent()) + { + // Fill in the BRLT relocs. + this->brlt_section_->reset_brlt_sizes(); + for (typename Branch_lookup_table::const_iterator p + = this->branch_lookup_table_.begin(); + p != this->branch_lookup_table_.end(); + ++p) + { + this->brlt_section_->add_reloc(p->first, p->second); + } + this->brlt_section_->finalize_brlt_sizes(); + } + return again; +} + +template +void +Target_powerpc::do_plt_fde_location(const Output_data* plt, + unsigned char* oview, + uint64_t* paddress, + off_t* plen) const +{ + uint64_t address = plt->address(); + off_t len = plt->data_size(); + + if (plt == this->glink_) + { + // See Output_data_glink::do_write() for glink contents. + if (len == 0) + { + gold_assert(parameters->doing_static_link()); + // Static linking may need stubs, to support ifunc and long + // branches. We need to create an output section for + // .eh_frame early in the link process, to have a place to + // attach stub .eh_frame info. We also need to have + // registered a CIE that matches the stub CIE. Both of + // these requirements are satisfied by creating an FDE and + // CIE for .glink, even though static linking will leave + // .glink zero length. + // ??? Hopefully generating an FDE with a zero address range + // won't confuse anything that consumes .eh_frame info. + } + else if (size == 64) + { + // There is one word before __glink_PLTresolve + address += 8; + len -= 8; + } + else if (parameters->options().output_is_position_independent()) + { + // There are two FDEs for a position independent glink. + // The first covers the branch table, the second + // __glink_PLTresolve at the end of glink. + off_t resolve_size = this->glink_->pltresolve_size; + if (oview[9] == elfcpp::DW_CFA_nop) + len -= resolve_size; + else + { + address += len - resolve_size; + len = resolve_size; + } + } + } + else + { + // Must be a stub table. + const Stub_table* stub_table + = static_cast*>(plt); + uint64_t stub_address = stub_table->stub_address(); + len -= stub_address - address; + address = stub_address; + } + + *paddress = address; + *plen = len; +} + // A class to handle the PLT data. template @@ -1534,12 +3034,10 @@ class Output_data_plt_powerpc : public Output_section_data_build Output_data_plt_powerpc(Target_powerpc* targ, Reloc_section* plt_rel, - unsigned int reserved_size, const char* name) : Output_section_data_build(size == 32 ? 4 : 8), rel_(plt_rel), targ_(targ), - initial_plt_entry_size_(reserved_size), name_(name) { } @@ -1564,20 +3062,12 @@ class Output_data_plt_powerpc : public Output_section_data_build unsigned int entry_count() const { - return ((this->current_data_size() - this->initial_plt_entry_size_) - / plt_entry_size); + if (this->current_data_size() == 0) + return 0; + return ((this->current_data_size() - this->first_plt_entry_offset()) + / this->plt_entry_size()); } - // Return the offset of the first non-reserved PLT entry. - unsigned int - first_plt_entry_offset() - { return this->initial_plt_entry_size_; } - - // Return the size of a PLT entry. - static unsigned int - get_plt_entry_size() - { return plt_entry_size; } - protected: void do_adjust_output_section(Output_section* os) @@ -1591,8 +3081,22 @@ class Output_data_plt_powerpc : public Output_section_data_build { mapfile->print_output_data(this, this->name_); } private: - // The size of an entry in the PLT. - static const int plt_entry_size = size == 32 ? 4 : 24; + // Return the offset of the first non-reserved PLT entry. + unsigned int + first_plt_entry_offset() const + { + // IPLT has no reserved entry. + if (this->name_[3] == 'I') + return 0; + return this->targ_->first_plt_entry_offset(); + } + + // Return the size of each PLT entry. + unsigned int + plt_entry_size() const + { + return this->targ_->plt_entry_size(); + } // Write out the PLT data. void @@ -1602,8 +3106,6 @@ class Output_data_plt_powerpc : public Output_section_data_build Reloc_section* rel_; // Allows access to .glink for do_write. Target_powerpc* targ_; - // The size of the first reserved entry. - int initial_plt_entry_size_; // What to report in map file. const char *name_; }; @@ -1616,14 +3118,14 @@ Output_data_plt_powerpc::add_entry(Symbol* gsym) { if (!gsym->has_plt_offset()) { - off_t off = this->current_data_size(); + section_size_type off = this->current_data_size(); if (off == 0) off += this->first_plt_entry_offset(); gsym->set_plt_offset(off); gsym->set_needs_dynsym_entry(); unsigned int dynrel = elfcpp::R_POWERPC_JMP_SLOT; this->rel_->add_global(gsym, dynrel, this, off, 0); - off += plt_entry_size; + off += this->plt_entry_size(); this->set_current_data_size(off); } } @@ -1636,13 +3138,13 @@ Output_data_plt_powerpc::add_ifunc_entry(Symbol* gsym) { if (!gsym->has_plt_offset()) { - off_t off = this->current_data_size(); + section_size_type off = this->current_data_size(); gsym->set_plt_offset(off); unsigned int dynrel = elfcpp::R_POWERPC_IRELATIVE; - if (size == 64) + if (size == 64 && this->targ_->abiversion() < 2) dynrel = elfcpp::R_PPC64_JMP_IREL; this->rel_->add_symbolless_global_addend(gsym, dynrel, this, off, 0); - off += plt_entry_size; + off += this->plt_entry_size(); this->set_current_data_size(off); } } @@ -1657,52 +3159,66 @@ Output_data_plt_powerpc::add_local_ifunc_entry( { if (!relobj->local_has_plt_offset(local_sym_index)) { - off_t off = this->current_data_size(); + section_size_type off = this->current_data_size(); relobj->set_local_plt_offset(local_sym_index, off); unsigned int dynrel = elfcpp::R_POWERPC_IRELATIVE; - if (size == 64) + if (size == 64 && this->targ_->abiversion() < 2) dynrel = elfcpp::R_PPC64_JMP_IREL; this->rel_->add_symbolless_local_addend(relobj, local_sym_index, dynrel, this, off, 0); - off += plt_entry_size; + off += this->plt_entry_size(); this->set_current_data_size(off); } } static const uint32_t add_0_11_11 = 0x7c0b5a14; +static const uint32_t add_2_2_11 = 0x7c425a14; static const uint32_t add_3_3_2 = 0x7c631214; static const uint32_t add_3_3_13 = 0x7c636a14; static const uint32_t add_11_0_11 = 0x7d605a14; -static const uint32_t add_12_2_11 = 0x7d825a14; -static const uint32_t addi_11_11 = 0x396b0000; -static const uint32_t addi_12_12 = 0x398c0000; +static const uint32_t add_11_2_11 = 0x7d625a14; +static const uint32_t add_11_11_2 = 0x7d6b1214; +static const uint32_t addi_0_12 = 0x380c0000; static const uint32_t addi_2_2 = 0x38420000; -static const uint32_t addi_3_2 = 0x38620000; static const uint32_t addi_3_3 = 0x38630000; +static const uint32_t addi_11_11 = 0x396b0000; +static const uint32_t addi_12_1 = 0x39810000; +static const uint32_t addi_12_12 = 0x398c0000; static const uint32_t addis_0_2 = 0x3c020000; static const uint32_t addis_0_13 = 0x3c0d0000; +static const uint32_t addis_2_12 = 0x3c4c0000; +static const uint32_t addis_11_2 = 0x3d620000; static const uint32_t addis_11_11 = 0x3d6b0000; static const uint32_t addis_11_30 = 0x3d7e0000; -static const uint32_t addis_12_12 = 0x3d8c0000; +static const uint32_t addis_12_1 = 0x3d810000; static const uint32_t addis_12_2 = 0x3d820000; -static const uint32_t addis_3_2 = 0x3c620000; -static const uint32_t addis_3_13 = 0x3c6d0000; +static const uint32_t addis_12_12 = 0x3d8c0000; static const uint32_t b = 0x48000000; static const uint32_t bcl_20_31 = 0x429f0005; static const uint32_t bctr = 0x4e800420; -static const uint32_t blrl = 0x4e800021; +static const uint32_t blr = 0x4e800020; +static const uint32_t bnectr_p4 = 0x4ce20420; +static const uint32_t cmpld_7_12_0 = 0x7fac0040; +static const uint32_t cmpldi_2_0 = 0x28220000; static const uint32_t cror_15_15_15 = 0x4def7b82; static const uint32_t cror_31_31_31 = 0x4ffffb82; -static const uint32_t ld_11_12 = 0xe96c0000; -static const uint32_t ld_11_2 = 0xe9620000; +static const uint32_t ld_0_1 = 0xe8010000; +static const uint32_t ld_0_12 = 0xe80c0000; static const uint32_t ld_2_1 = 0xe8410000; -static const uint32_t ld_2_11 = 0xe84b0000; -static const uint32_t ld_2_12 = 0xe84c0000; static const uint32_t ld_2_2 = 0xe8420000; +static const uint32_t ld_2_11 = 0xe84b0000; +static const uint32_t ld_11_2 = 0xe9620000; +static const uint32_t ld_11_11 = 0xe96b0000; +static const uint32_t ld_12_2 = 0xe9820000; +static const uint32_t ld_12_11 = 0xe98b0000; +static const uint32_t ld_12_12 = 0xe98c0000; +static const uint32_t lfd_0_1 = 0xc8010000; static const uint32_t li_0_0 = 0x38000000; -static const uint32_t lis_0_0 = 0x3c000000; +static const uint32_t li_12_0 = 0x39800000; +static const uint32_t lis_0 = 0x3c000000; static const uint32_t lis_11 = 0x3d600000; static const uint32_t lis_12 = 0x3d800000; +static const uint32_t lvx_0_12_0 = 0x7c0c00ce; static const uint32_t lwz_0_12 = 0x800c0000; static const uint32_t lwz_11_11 = 0x816b0000; static const uint32_t lwz_11_30 = 0x817e0000; @@ -1713,12 +3229,21 @@ static const uint32_t mflr_11 = 0x7d6802a6; static const uint32_t mflr_12 = 0x7d8802a6; static const uint32_t mtctr_0 = 0x7c0903a6; static const uint32_t mtctr_11 = 0x7d6903a6; +static const uint32_t mtctr_12 = 0x7d8903a6; static const uint32_t mtlr_0 = 0x7c0803a6; static const uint32_t mtlr_12 = 0x7d8803a6; static const uint32_t nop = 0x60000000; static const uint32_t ori_0_0_0 = 0x60000000; +static const uint32_t srdi_0_0_2 = 0x7800f082; +static const uint32_t std_0_1 = 0xf8010000; +static const uint32_t std_0_12 = 0xf80c0000; static const uint32_t std_2_1 = 0xf8410000; +static const uint32_t stfd_0_1 = 0xd8010000; +static const uint32_t stvx_0_12_0 = 0x7c0c01ce; static const uint32_t sub_11_11_12 = 0x7d6c5850; +static const uint32_t sub_12_12_11 = 0x7d8b6050; +static const uint32_t xor_2_12_12 = 0x7d826278; +static const uint32_t xor_11_12_12 = 0x7d8b6278; // Write out the PLT. @@ -1726,9 +3251,9 @@ template void Output_data_plt_powerpc::do_write(Output_file* of) { - if (size == 32) + if (size == 32 && this->name_[3] != 'I') { - const off_t offset = this->offset(); + const section_size_type offset = this->offset(); const section_size_type oview_size = convert_to_section_size_type(this->data_size()); unsigned char* const oview = of->get_output_view(offset, oview_size); @@ -1738,8 +3263,7 @@ Output_data_plt_powerpc::do_write(Output_file* of) // The address of the .glink branch table const Output_data_glink* glink = this->targ_->glink_section(); - elfcpp::Elf_types<32>::Elf_Addr branch_tab - = glink->address() + glink->pltresolve(); + elfcpp::Elf_types<32>::Elf_Addr branch_tab = glink->address(); while (pov < endpov) { @@ -1756,16 +3280,20 @@ Output_data_plt_powerpc::do_write(Output_file* of) template void -Target_powerpc::make_plt_section(Layout* layout) +Target_powerpc::make_plt_section(Symbol_table* symtab, + Layout* layout) { if (this->plt_ == NULL) { + if (this->got_ == NULL) + this->got_section(symtab, layout); + if (this->glink_ == NULL) make_glink_section(layout); // Ensure that .rela.dyn always appears before .rela.plt This is // necessary due to how, on PowerPC and some other targets, .rela.dyn - // needs to include .rela.plt in it's range. + // needs to include .rela.plt in its range. this->rela_dyn_section(layout); Reloc_section* plt_rel = new Reloc_section(false); @@ -1774,7 +3302,6 @@ Target_powerpc::make_plt_section(Layout* layout) ORDER_DYNAMIC_PLT_RELOCS, false); this->plt_ = new Output_data_plt_powerpc(this, plt_rel, - size == 32 ? 0 : 24, "** PLT"); layout->add_output_section_data(".plt", (size == 32 @@ -1793,132 +3320,576 @@ Target_powerpc::make_plt_section(Layout* layout) template void -Target_powerpc::make_iplt_section(Layout* layout) +Target_powerpc::make_iplt_section(Symbol_table* symtab, + Layout* layout) { if (this->iplt_ == NULL) { - this->make_plt_section(layout); + this->make_plt_section(symtab, layout); Reloc_section* iplt_rel = new Reloc_section(false); this->rela_dyn_->output_section()->add_output_section_data(iplt_rel); this->iplt_ = new Output_data_plt_powerpc(this, iplt_rel, - 0, "** IPLT"); + "** IPLT"); this->plt_->output_section()->add_output_section_data(this->iplt_); } } -// A class to handle .glink. +// A section for huge long branch addresses, similar to plt section. template -class Output_data_glink : public Output_section_data +class Output_data_brlt_powerpc : public Output_section_data_build { public: - static const int pltresolve_size = 16*4; + typedef typename elfcpp::Elf_types::Elf_Addr Address; + typedef Output_data_reloc Reloc_section; - Output_data_glink(Target_powerpc*); + Output_data_brlt_powerpc(Target_powerpc* targ, + Reloc_section* brlt_rel) + : Output_section_data_build(size == 32 ? 4 : 8), + rel_(brlt_rel), + targ_(targ) + { } - // Add an entry void - add_entry(const Sized_relobj_file*, - const Symbol*, - const elfcpp::Rela&); + reset_brlt_sizes() + { + this->reset_data_size(); + this->rel_->reset_data_size(); + } void - add_entry(const Sized_relobj_file*, - unsigned int, - const elfcpp::Rela&); - - unsigned int - find_entry(const Symbol*) const; - - unsigned int - find_entry(const Sized_relobj_file*, unsigned int) const; - - unsigned int - find_entry(const Sized_relobj_file*, - const Symbol*, - const elfcpp::Rela&) const; + finalize_brlt_sizes() + { + this->finalize_data_size(); + this->rel_->finalize_data_size(); + } - unsigned int - find_entry(const Sized_relobj_file*, - unsigned int, - const elfcpp::Rela&) const; + // Add a reloc for an entry in the BRLT. + void + add_reloc(Address to, unsigned int off) + { this->rel_->add_relative(elfcpp::R_POWERPC_RELATIVE, this, off, to); } - unsigned int - glink_entry_size() const + // Update section and reloc section size. + void + set_current_size(unsigned int num_branches) { - if (size == 32) - return 4 * 4; - else - // FIXME: We should be using multiple glink sections for - // stubs to support > 33M applications. - return 8 * 4; + this->reset_address_and_file_offset(); + this->set_current_data_size(num_branches * 16); + this->finalize_data_size(); + Output_section* os = this->output_section(); + os->set_section_offsets_need_adjustment(); + if (this->rel_ != NULL) + { + unsigned int reloc_size + = Reloc_types::reloc_size; + this->rel_->reset_address_and_file_offset(); + this->rel_->set_current_data_size(num_branches * reloc_size); + this->rel_->finalize_data_size(); + Output_section* os = this->rel_->output_section(); + os->set_section_offsets_need_adjustment(); + } } - off_t - pltresolve() const + protected: + void + do_adjust_output_section(Output_section* os) { - return this->pltresolve_; + os->set_entsize(0); } - protected: // Write to a map file. void do_print_to_mapfile(Mapfile* mapfile) const - { mapfile->print_output_data(this, _("** glink")); } + { mapfile->print_output_data(this, "** BRLT"); } private: + // Write out the BRLT data. void - set_final_data_size(); + do_write(Output_file*); + + // The reloc section. + Reloc_section* rel_; + Target_powerpc* targ_; +}; + +// Make the branch lookup table section. + +template +void +Target_powerpc::make_brlt_section(Layout* layout) +{ + if (size == 64 && this->brlt_section_ == NULL) + { + Reloc_section* brlt_rel = NULL; + bool is_pic = parameters->options().output_is_position_independent(); + if (is_pic) + { + // When PIC we can't fill in .branch_lt (like .plt it can be + // a bss style section) but must initialise at runtime via + // dynamic relocats. + this->rela_dyn_section(layout); + brlt_rel = new Reloc_section(false); + this->rela_dyn_->output_section()->add_output_section_data(brlt_rel); + } + this->brlt_section_ + = new Output_data_brlt_powerpc(this, brlt_rel); + if (this->plt_ && is_pic) + this->plt_->output_section() + ->add_output_section_data(this->brlt_section_); + else + layout->add_output_section_data(".branch_lt", + (is_pic ? elfcpp::SHT_NOBITS + : elfcpp::SHT_PROGBITS), + elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE, + this->brlt_section_, + (is_pic ? ORDER_SMALL_BSS + : ORDER_SMALL_DATA), + false); + } +} + +// Write out .branch_lt when non-PIC. + +template +void +Output_data_brlt_powerpc::do_write(Output_file* of) +{ + if (size == 64 && !parameters->options().output_is_position_independent()) + { + const section_size_type offset = this->offset(); + const section_size_type oview_size + = convert_to_section_size_type(this->data_size()); + unsigned char* const oview = of->get_output_view(offset, oview_size); + + this->targ_->write_branch_lookup_table(oview); + of->write_output_view(offset, oview_size, oview); + } +} + +static inline uint32_t +l(uint32_t a) +{ + return a & 0xffff; +} + +static inline uint32_t +hi(uint32_t a) +{ + return l(a >> 16); +} + +static inline uint32_t +ha(uint32_t a) +{ + return hi(a + 0x8000); +} + +template +struct Eh_cie +{ + static const unsigned char eh_frame_cie[12]; +}; + +template +const unsigned char Eh_cie::eh_frame_cie[] = +{ + 1, // CIE version. + 'z', 'R', 0, // Augmentation string. + 4, // Code alignment. + 0x80 - size / 8 , // Data alignment. + 65, // RA reg. + 1, // Augmentation size. + (elfcpp::DW_EH_PE_pcrel + | elfcpp::DW_EH_PE_sdata4), // FDE encoding. + elfcpp::DW_CFA_def_cfa, 1, 0 // def_cfa: r1 offset 0. +}; + +// Describe __glink_PLTresolve use of LR, 64-bit version ABIv1. +static const unsigned char glink_eh_frame_fde_64v1[] = +{ + 0, 0, 0, 0, // Replaced with offset to .glink. + 0, 0, 0, 0, // Replaced with size of .glink. + 0, // Augmentation size. + elfcpp::DW_CFA_advance_loc + 1, + elfcpp::DW_CFA_register, 65, 12, + elfcpp::DW_CFA_advance_loc + 4, + elfcpp::DW_CFA_restore_extended, 65 +}; + +// Describe __glink_PLTresolve use of LR, 64-bit version ABIv2. +static const unsigned char glink_eh_frame_fde_64v2[] = +{ + 0, 0, 0, 0, // Replaced with offset to .glink. + 0, 0, 0, 0, // Replaced with size of .glink. + 0, // Augmentation size. + elfcpp::DW_CFA_advance_loc + 1, + elfcpp::DW_CFA_register, 65, 0, + elfcpp::DW_CFA_advance_loc + 4, + elfcpp::DW_CFA_restore_extended, 65 +}; + +// Describe __glink_PLTresolve use of LR, 32-bit version. +static const unsigned char glink_eh_frame_fde_32[] = +{ + 0, 0, 0, 0, // Replaced with offset to .glink. + 0, 0, 0, 0, // Replaced with size of .glink. + 0, // Augmentation size. + elfcpp::DW_CFA_advance_loc + 2, + elfcpp::DW_CFA_register, 65, 0, + elfcpp::DW_CFA_advance_loc + 4, + elfcpp::DW_CFA_restore_extended, 65 +}; + +static const unsigned char default_fde[] = +{ + 0, 0, 0, 0, // Replaced with offset to stubs. + 0, 0, 0, 0, // Replaced with size of stubs. + 0, // Augmentation size. + elfcpp::DW_CFA_nop, // Pad. + elfcpp::DW_CFA_nop, + elfcpp::DW_CFA_nop +}; + +template +static inline void +write_insn(unsigned char* p, uint32_t v) +{ + elfcpp::Swap<32, big_endian>::writeval(p, v); +} + +// Stub_table holds information about plt and long branch stubs. +// Stubs are built in an area following some input section determined +// by group_sections(). This input section is converted to a relaxed +// input section allowing it to be resized to accommodate the stubs + +template +class Stub_table : public Output_relaxed_input_section +{ + public: + typedef typename elfcpp::Elf_types::Elf_Addr Address; + static const Address invalid_address = static_cast
(0) - 1; + + Stub_table(Target_powerpc* targ, + Output_section* output_section, + const Output_section::Input_section* owner) + : Output_relaxed_input_section(owner->relobj(), owner->shndx(), + owner->relobj() + ->section_addralign(owner->shndx())), + targ_(targ), plt_call_stubs_(), long_branch_stubs_(), + orig_data_size_(owner->current_data_size()), + plt_size_(0), last_plt_size_(0), + branch_size_(0), last_branch_size_(0), eh_frame_added_(false) + { + this->set_output_section(output_section); + + std::vector new_relaxed; + new_relaxed.push_back(this); + output_section->convert_input_sections_to_relaxed_sections(new_relaxed); + } + + // Add a plt call stub. + bool + add_plt_call_entry(Address, + const Sized_relobj_file*, + const Symbol*, + unsigned int, + Address); + + bool + add_plt_call_entry(Address, + const Sized_relobj_file*, + unsigned int, + unsigned int, + Address); + + // Find a given plt call stub. + Address + find_plt_call_entry(const Symbol*) const; + + Address + find_plt_call_entry(const Sized_relobj_file*, + unsigned int) const; + + Address + find_plt_call_entry(const Sized_relobj_file*, + const Symbol*, + unsigned int, + Address) const; + + Address + find_plt_call_entry(const Sized_relobj_file*, + unsigned int, + unsigned int, + Address) const; + + // Add a long branch stub. + bool + add_long_branch_entry(const Powerpc_relobj*, + unsigned int, Address, Address); + + Address + find_long_branch_entry(const Powerpc_relobj*, + Address) const; + + bool + can_reach_stub(Address from, unsigned int off, unsigned int r_type) + { + Address max_branch_offset = max_branch_delta(r_type); + if (max_branch_offset == 0) + return true; + gold_assert(from != invalid_address); + Address loc = off + this->stub_address(); + return loc - from + max_branch_offset < 2 * max_branch_offset; + } - // Write out .glink + void + clear_stubs(bool all) + { + this->plt_call_stubs_.clear(); + this->plt_size_ = 0; + this->long_branch_stubs_.clear(); + this->branch_size_ = 0; + if (all) + { + this->last_plt_size_ = 0; + this->last_branch_size_ = 0; + } + } + + Address + set_address_and_size(const Output_section* os, Address off) + { + Address start_off = off; + off += this->orig_data_size_; + Address my_size = this->plt_size_ + this->branch_size_; + if (my_size != 0) + off = align_address(off, this->stub_align()); + // Include original section size and alignment padding in size + my_size += off - start_off; + this->reset_address_and_file_offset(); + this->set_current_data_size(my_size); + this->set_address_and_file_offset(os->address() + start_off, + os->offset() + start_off); + return my_size; + } + + Address + stub_address() const + { + return align_address(this->address() + this->orig_data_size_, + this->stub_align()); + } + + Address + stub_offset() const + { + return align_address(this->offset() + this->orig_data_size_, + this->stub_align()); + } + + section_size_type + plt_size() const + { return this->plt_size_; } + + bool + size_update() + { + Output_section* os = this->output_section(); + if (os->addralign() < this->stub_align()) + { + os->set_addralign(this->stub_align()); + // FIXME: get rid of the insane checkpointing. + // We can't increase alignment of the input section to which + // stubs are attached; The input section may be .init which + // is pasted together with other .init sections to form a + // function. Aligning might insert zero padding resulting in + // sigill. However we do need to increase alignment of the + // output section so that the align_address() on offset in + // set_address_and_size() adds the same padding as the + // align_address() on address in stub_address(). + // What's more, we need this alignment for the layout done in + // relaxation_loop_body() so that the output section starts at + // a suitably aligned address. + os->checkpoint_set_addralign(this->stub_align()); + } + if (this->last_plt_size_ != this->plt_size_ + || this->last_branch_size_ != this->branch_size_) + { + this->last_plt_size_ = this->plt_size_; + this->last_branch_size_ = this->branch_size_; + return true; + } + return false; + } + + // Add .eh_frame info for this stub section. Unlike other linker + // generated .eh_frame this is added late in the link, because we + // only want the .eh_frame info if this particular stub section is + // non-empty. + void + add_eh_frame(Layout* layout) + { + if (!this->eh_frame_added_) + { + if (!parameters->options().ld_generated_unwind_info()) + return; + + // Since we add stub .eh_frame info late, it must be placed + // after all other linker generated .eh_frame info so that + // merge mapping need not be updated for input sections. + // There is no provision to use a different CIE to that used + // by .glink. + if (!this->targ_->has_glink()) + return; + + layout->add_eh_frame_for_plt(this, + Eh_cie::eh_frame_cie, + sizeof (Eh_cie::eh_frame_cie), + default_fde, + sizeof (default_fde)); + this->eh_frame_added_ = true; + } + } + + Target_powerpc* + targ() const + { return targ_; } + + private: + class Plt_stub_ent; + class Plt_stub_ent_hash; + typedef Unordered_map Plt_stub_entries; + + // Alignment of stub section. + unsigned int + stub_align() const + { + if (size == 32) + return 16; + unsigned int min_align = 32; + unsigned int user_align = 1 << parameters->options().plt_align(); + return std::max(user_align, min_align); + } + + // Return the plt offset for the given call stub. + Address + plt_off(typename Plt_stub_entries::const_iterator p, bool* is_iplt) const + { + const Symbol* gsym = p->first.sym_; + if (gsym != NULL) + { + *is_iplt = (gsym->type() == elfcpp::STT_GNU_IFUNC + && gsym->can_use_relative_reloc(false)); + return gsym->plt_offset(); + } + else + { + *is_iplt = true; + const Sized_relobj_file* relobj = p->first.object_; + unsigned int local_sym_index = p->first.locsym_; + return relobj->local_plt_offset(local_sym_index); + } + } + + // Size of a given plt call stub. + unsigned int + plt_call_size(typename Plt_stub_entries::const_iterator p) const + { + if (size == 32) + return 16; + + bool is_iplt; + Address plt_addr = this->plt_off(p, &is_iplt); + if (is_iplt) + plt_addr += this->targ_->iplt_section()->address(); + else + plt_addr += this->targ_->plt_section()->address(); + Address got_addr = this->targ_->got_section()->output_section()->address(); + const Powerpc_relobj* ppcobj = static_cast + *>(p->first.object_); + got_addr += ppcobj->toc_base_offset(); + Address off = plt_addr - got_addr; + unsigned int bytes = 4 * 4 + 4 * (ha(off) != 0); + if (this->targ_->abiversion() < 2) + { + bool static_chain = parameters->options().plt_static_chain(); + bool thread_safe = this->targ_->plt_thread_safe(); + bytes += (4 + + 4 * static_chain + + 8 * thread_safe + + 4 * (ha(off + 8 + 8 * static_chain) != ha(off))); + } + unsigned int align = 1 << parameters->options().plt_align(); + if (align > 1) + bytes = (bytes + align - 1) & -align; + return bytes; + } + + // Return long branch stub size. + unsigned int + branch_stub_size(Address to) + { + Address loc + = this->stub_address() + this->last_plt_size_ + this->branch_size_; + if (to - loc + (1 << 25) < 2 << 25) + return 4; + if (size == 64 || !parameters->options().output_is_position_independent()) + return 16; + return 32; + } + + // Write out stubs. void do_write(Output_file*); - class Glink_sym_ent + // Plt call stub keys. + class Plt_stub_ent { public: - Glink_sym_ent(const Symbol* sym) + Plt_stub_ent(const Symbol* sym) : sym_(sym), object_(0), addend_(0), locsym_(0) { } - Glink_sym_ent(const Sized_relobj_file* object, - unsigned int locsym_index) + Plt_stub_ent(const Sized_relobj_file* object, + unsigned int locsym_index) : sym_(NULL), object_(object), addend_(0), locsym_(locsym_index) { } - Glink_sym_ent(const Sized_relobj_file* object, - const Symbol* sym, - const elfcpp::Rela& reloc) + Plt_stub_ent(const Sized_relobj_file* object, + const Symbol* sym, + unsigned int r_type, + Address addend) : sym_(sym), object_(0), addend_(0), locsym_(0) { if (size != 32) - this->addend_ = reloc.get_r_addend(); + this->addend_ = addend; else if (parameters->options().output_is_position_independent() - && (elfcpp::elf_r_type(reloc.get_r_info()) - == elfcpp::R_PPC_PLTREL24)) + && r_type == elfcpp::R_PPC_PLTREL24) { - this->addend_ = reloc.get_r_addend(); + this->addend_ = addend; if (this->addend_ >= 32768) this->object_ = object; } } - Glink_sym_ent(const Sized_relobj_file* object, - unsigned int locsym_index, - const elfcpp::Rela& reloc) + Plt_stub_ent(const Sized_relobj_file* object, + unsigned int locsym_index, + unsigned int r_type, + Address addend) : sym_(NULL), object_(object), addend_(0), locsym_(locsym_index) { if (size != 32) - this->addend_ = reloc.get_r_addend(); + this->addend_ = addend; else if (parameters->options().output_is_position_independent() - && (elfcpp::elf_r_type(reloc.get_r_info()) - == elfcpp::R_PPC_PLTREL24)) - this->addend_ = reloc.get_r_addend(); + && r_type == elfcpp::R_PPC_PLTREL24) + this->addend_ = addend; } - bool operator==(const Glink_sym_ent& that) const + bool operator==(const Plt_stub_ent& that) const { return (this->sym_ == that.sym_ && this->object_ == that.object_ @@ -1932,10 +3903,10 @@ class Output_data_glink : public Output_section_data unsigned int locsym_; }; - class Glink_sym_ent_hash + class Plt_stub_ent_hash { public: - size_t operator()(const Glink_sym_ent& ent) const + size_t operator()(const Plt_stub_ent& ent) const { return (reinterpret_cast(ent.sym_) ^ reinterpret_cast(ent.object_) @@ -1944,117 +3915,302 @@ class Output_data_glink : public Output_section_data } }; - // Map sym/object/addend to index. - typedef Unordered_map Glink_entries; - Glink_entries glink_entries_; + // Long branch stub keys. + class Branch_stub_ent + { + public: + Branch_stub_ent(const Powerpc_relobj* obj, Address to) + : dest_(to), toc_base_off_(0) + { + if (size == 64) + toc_base_off_ = obj->toc_base_offset(); + } - // Offset of pltresolve stub (actually, branch table for 32-bit) - off_t pltresolve_; + bool operator==(const Branch_stub_ent& that) const + { + return (this->dest_ == that.dest_ + && (size == 32 + || this->toc_base_off_ == that.toc_base_off_)); + } - // Allows access to .got and .plt for do_write. - Target_powerpc* targ_; -}; + Address dest_; + unsigned int toc_base_off_; + }; -// Create the glink section. + class Branch_stub_ent_hash + { + public: + size_t operator()(const Branch_stub_ent& ent) const + { return ent.dest_ ^ ent.toc_base_off_; } + }; -template -Output_data_glink::Output_data_glink( - Target_powerpc* targ) - : Output_section_data(16), - pltresolve_(0), targ_(targ) -{ -} + // In a sane world this would be a global. + Target_powerpc* targ_; + // Map sym/object/addend to stub offset. + Plt_stub_entries plt_call_stubs_; + // Map destination address to stub offset. + typedef Unordered_map Branch_stub_entries; + Branch_stub_entries long_branch_stubs_; + // size of input section + section_size_type orig_data_size_; + // size of stubs + section_size_type plt_size_, last_plt_size_, branch_size_, last_branch_size_; + // Whether .eh_frame info has been created for this stub section. + bool eh_frame_added_; +}; -// Add an entry to glink, if we do not already have one for this +// Add a plt call stub, if we do not already have one for this // sym/object/addend combo. template -void -Output_data_glink::add_entry( +bool +Stub_table::add_plt_call_entry( + Address from, const Sized_relobj_file* object, const Symbol* gsym, - const elfcpp::Rela& reloc) + unsigned int r_type, + Address addend) { - Glink_sym_ent ent(object, gsym, reloc); - unsigned int indx = this->glink_entries_.size(); - this->glink_entries_.insert(std::make_pair(ent, indx)); + Plt_stub_ent ent(object, gsym, r_type, addend); + unsigned int off = this->plt_size_; + std::pair p + = this->plt_call_stubs_.insert(std::make_pair(ent, off)); + if (p.second) + this->plt_size_ = off + this->plt_call_size(p.first); + return this->can_reach_stub(from, off, r_type); } template -void -Output_data_glink::add_entry( +bool +Stub_table::add_plt_call_entry( + Address from, const Sized_relobj_file* object, unsigned int locsym_index, - const elfcpp::Rela& reloc) + unsigned int r_type, + Address addend) { - Glink_sym_ent ent(object, locsym_index, reloc); - unsigned int indx = this->glink_entries_.size(); - this->glink_entries_.insert(std::make_pair(ent, indx)); + Plt_stub_ent ent(object, locsym_index, r_type, addend); + unsigned int off = this->plt_size_; + std::pair p + = this->plt_call_stubs_.insert(std::make_pair(ent, off)); + if (p.second) + this->plt_size_ = off + this->plt_call_size(p.first); + return this->can_reach_stub(from, off, r_type); } +// Find a plt call stub. + template -unsigned int -Output_data_glink::find_entry( +typename Stub_table::Address +Stub_table::find_plt_call_entry( const Sized_relobj_file* object, const Symbol* gsym, - const elfcpp::Rela& reloc) const + unsigned int r_type, + Address addend) const { - Glink_sym_ent ent(object, gsym, reloc); - typename Glink_entries::const_iterator p = this->glink_entries_.find(ent); - gold_assert(p != this->glink_entries_.end()); - return p->second; + Plt_stub_ent ent(object, gsym, r_type, addend); + typename Plt_stub_entries::const_iterator p = this->plt_call_stubs_.find(ent); + return p == this->plt_call_stubs_.end() ? invalid_address : p->second; } template -unsigned int -Output_data_glink::find_entry(const Symbol* gsym) const +typename Stub_table::Address +Stub_table::find_plt_call_entry(const Symbol* gsym) const { - Glink_sym_ent ent(gsym); - typename Glink_entries::const_iterator p = this->glink_entries_.find(ent); - gold_assert(p != this->glink_entries_.end()); - return p->second; + Plt_stub_ent ent(gsym); + typename Plt_stub_entries::const_iterator p = this->plt_call_stubs_.find(ent); + return p == this->plt_call_stubs_.end() ? invalid_address : p->second; } template -unsigned int -Output_data_glink::find_entry( +typename Stub_table::Address +Stub_table::find_plt_call_entry( const Sized_relobj_file* object, unsigned int locsym_index, - const elfcpp::Rela& reloc) const + unsigned int r_type, + Address addend) const { - Glink_sym_ent ent(object, locsym_index, reloc); - typename Glink_entries::const_iterator p = this->glink_entries_.find(ent); - gold_assert(p != this->glink_entries_.end()); - return p->second; + Plt_stub_ent ent(object, locsym_index, r_type, addend); + typename Plt_stub_entries::const_iterator p = this->plt_call_stubs_.find(ent); + return p == this->plt_call_stubs_.end() ? invalid_address : p->second; } template -unsigned int -Output_data_glink::find_entry( +typename Stub_table::Address +Stub_table::find_plt_call_entry( const Sized_relobj_file* object, unsigned int locsym_index) const { - Glink_sym_ent ent(object, locsym_index); - typename Glink_entries::const_iterator p = this->glink_entries_.find(ent); - gold_assert(p != this->glink_entries_.end()); - return p->second; + Plt_stub_ent ent(object, locsym_index); + typename Plt_stub_entries::const_iterator p = this->plt_call_stubs_.find(ent); + return p == this->plt_call_stubs_.end() ? invalid_address : p->second; +} + +// Add a long branch stub if we don't already have one to given +// destination. + +template +bool +Stub_table::add_long_branch_entry( + const Powerpc_relobj* object, + unsigned int r_type, + Address from, + Address to) +{ + Branch_stub_ent ent(object, to); + Address off = this->branch_size_; + if (this->long_branch_stubs_.insert(std::make_pair(ent, off)).second) + { + unsigned int stub_size = this->branch_stub_size(to); + this->branch_size_ = off + stub_size; + if (size == 64 && stub_size != 4) + this->targ_->add_branch_lookup_table(to); + } + return this->can_reach_stub(from, off, r_type); +} + +// Find long branch stub. + +template +typename Stub_table::Address +Stub_table::find_long_branch_entry( + const Powerpc_relobj* object, + Address to) const +{ + Branch_stub_ent ent(object, to); + typename Branch_stub_entries::const_iterator p + = this->long_branch_stubs_.find(ent); + return p == this->long_branch_stubs_.end() ? invalid_address : p->second; +} + +// A class to handle .glink. + +template +class Output_data_glink : public Output_section_data +{ + public: + typedef typename elfcpp::Elf_types::Elf_Addr Address; + static const Address invalid_address = static_cast
(0) - 1; + static const int pltresolve_size = 16*4; + + Output_data_glink(Target_powerpc* targ) + : Output_section_data(16), targ_(targ), global_entry_stubs_(), + end_branch_table_(), ge_size_(0) + { } + + void + add_eh_frame(Layout* layout); + + void + add_global_entry(const Symbol*); + + Address + find_global_entry(const Symbol*) const; + + Address + global_entry_address() const + { + gold_assert(this->is_data_size_valid()); + unsigned int global_entry_off = (this->end_branch_table_ + 15) & -16; + return this->address() + global_entry_off; + } + + protected: + // Write to a map file. + void + do_print_to_mapfile(Mapfile* mapfile) const + { mapfile->print_output_data(this, _("** glink")); } + + private: + void + set_final_data_size(); + + // Write out .glink + void + do_write(Output_file*); + + // Allows access to .got and .plt for do_write. + Target_powerpc* targ_; + + // Map sym to stub offset. + typedef Unordered_map Global_entry_stub_entries; + Global_entry_stub_entries global_entry_stubs_; + + unsigned int end_branch_table_, ge_size_; +}; + +template +void +Output_data_glink::add_eh_frame(Layout* layout) +{ + if (!parameters->options().ld_generated_unwind_info()) + return; + + if (size == 64) + { + if (this->targ_->abiversion() < 2) + layout->add_eh_frame_for_plt(this, + Eh_cie<64>::eh_frame_cie, + sizeof (Eh_cie<64>::eh_frame_cie), + glink_eh_frame_fde_64v1, + sizeof (glink_eh_frame_fde_64v1)); + else + layout->add_eh_frame_for_plt(this, + Eh_cie<64>::eh_frame_cie, + sizeof (Eh_cie<64>::eh_frame_cie), + glink_eh_frame_fde_64v2, + sizeof (glink_eh_frame_fde_64v2)); + } + else + { + // 32-bit .glink can use the default since the CIE return + // address reg, LR, is valid. + layout->add_eh_frame_for_plt(this, + Eh_cie<32>::eh_frame_cie, + sizeof (Eh_cie<32>::eh_frame_cie), + default_fde, + sizeof (default_fde)); + // Except where LR is used in a PIC __glink_PLTresolve. + if (parameters->options().output_is_position_independent()) + layout->add_eh_frame_for_plt(this, + Eh_cie<32>::eh_frame_cie, + sizeof (Eh_cie<32>::eh_frame_cie), + glink_eh_frame_fde_32, + sizeof (glink_eh_frame_fde_32)); + } +} + +template +void +Output_data_glink::add_global_entry(const Symbol* gsym) +{ + std::pair p + = this->global_entry_stubs_.insert(std::make_pair(gsym, this->ge_size_)); + if (p.second) + this->ge_size_ += 16; +} + +template +typename Output_data_glink::Address +Output_data_glink::find_global_entry(const Symbol* gsym) const +{ + typename Global_entry_stub_entries::const_iterator p + = this->global_entry_stubs_.find(gsym); + return p == this->global_entry_stubs_.end() ? invalid_address : p->second; } template void Output_data_glink::set_final_data_size() { - unsigned int count = this->glink_entries_.size(); - off_t total = count; + unsigned int count = this->targ_->plt_entry_count(); + section_size_type total = 0; if (count != 0) { if (size == 32) { - total *= 16; - this->pltresolve_ = total; - // space for branch table total += 4 * (count - 1); @@ -2063,211 +4219,440 @@ Output_data_glink::set_final_data_size() } else { - total *= 32; - this->pltresolve_ = total; total += this->pltresolve_size; // space for branch table - total += 8 * count; - if (count > 0x8000) - total += 4 * (count - 0x8000); + total += 4 * count; + if (this->targ_->abiversion() < 2) + { + total += 4 * count; + if (count > 0x8000) + total += 4 * (count - 0x8000); + } } } + this->end_branch_table_ = total; + total = (total + 15) & -16; + total += this->ge_size_; this->set_data_size(total); } -static inline uint32_t -l(uint32_t a) -{ - return a & 0xffff; -} - -static inline uint32_t -hi(uint32_t a) -{ - return l(a >> 16); -} - -static inline uint32_t -ha(uint32_t a) -{ - return hi(a + 0x8000); -} - -template -static inline void -write_insn(unsigned char* p, uint32_t v) -{ - elfcpp::Swap<32, big_endian>::writeval(p, v); -} - -// Write out .glink. +// Write out plt and long branch stub code. template void -Output_data_glink::do_write(Output_file* of) +Stub_table::do_write(Output_file* of) { - const off_t off = this->offset(); + if (this->plt_call_stubs_.empty() + && this->long_branch_stubs_.empty()) + return; + + const section_size_type start_off = this->offset(); + const section_size_type off = this->stub_offset(); const section_size_type oview_size = - convert_to_section_size_type(this->data_size()); + convert_to_section_size_type(this->data_size() - (off - start_off)); unsigned char* const oview = of->get_output_view(off, oview_size); unsigned char* p; - // The base address of the .plt section. - typedef typename elfcpp::Elf_types::Elf_Addr Address; - static const Address invalid_address = static_cast
(0) - 1; - Address plt_base = this->targ_->plt_section()->address(); - Address iplt_base = invalid_address; - - const Output_data_got_powerpc* got - = this->targ_->got_section(); - if (size == 64) { + const Output_data_got_powerpc* got + = this->targ_->got_section(); Address got_os_addr = got->output_section()->address(); - // Write out call stubs. - typename Glink_entries::const_iterator g; - for (g = this->glink_entries_.begin(); - g != this->glink_entries_.end(); - ++g) + if (!this->plt_call_stubs_.empty()) { - Address plt_addr; - bool is_ifunc; - const Symbol* gsym = g->first.sym_; - if (gsym != NULL) + // The base address of the .plt section. + Address plt_base = this->targ_->plt_section()->address(); + Address iplt_base = invalid_address; + + // Write out plt call stubs. + typename Plt_stub_entries::const_iterator cs; + for (cs = this->plt_call_stubs_.begin(); + cs != this->plt_call_stubs_.end(); + ++cs) { - is_ifunc = (gsym->type() == elfcpp::STT_GNU_IFUNC - && gsym->can_use_relative_reloc(false)); - plt_addr = gsym->plt_offset(); + bool is_iplt; + Address pltoff = this->plt_off(cs, &is_iplt); + Address plt_addr = pltoff; + if (is_iplt) + { + if (iplt_base == invalid_address) + iplt_base = this->targ_->iplt_section()->address(); + plt_addr += iplt_base; + } + else + plt_addr += plt_base; + const Powerpc_relobj* ppcobj = static_cast + *>(cs->first.object_); + Address got_addr = got_os_addr + ppcobj->toc_base_offset(); + Address off = plt_addr - got_addr; + + if (off + 0x80008000 > 0xffffffff || (off & 7) != 0) + gold_error(_("%s: linkage table error against `%s'"), + cs->first.object_->name().c_str(), + cs->first.sym_->demangled_name().c_str()); + + bool plt_load_toc = this->targ_->abiversion() < 2; + bool static_chain + = plt_load_toc && parameters->options().plt_static_chain(); + bool thread_safe + = plt_load_toc && this->targ_->plt_thread_safe(); + bool use_fake_dep = false; + Address cmp_branch_off = 0; + if (thread_safe) + { + unsigned int pltindex + = ((pltoff - this->targ_->first_plt_entry_offset()) + / this->targ_->plt_entry_size()); + Address glinkoff + = (this->targ_->glink_section()->pltresolve_size + + pltindex * 8); + if (pltindex > 32768) + glinkoff += (pltindex - 32768) * 4; + Address to + = this->targ_->glink_section()->address() + glinkoff; + Address from + = (this->stub_address() + cs->second + 24 + + 4 * (ha(off) != 0) + + 4 * (ha(off + 8 + 8 * static_chain) != ha(off)) + + 4 * static_chain); + cmp_branch_off = to - from; + use_fake_dep = cmp_branch_off + (1 << 25) >= (1 << 26); + } + + p = oview + cs->second; + if (ha(off) != 0) + { + write_insn(p, std_2_1 + this->targ_->stk_toc()); + p += 4; + if (plt_load_toc) + { + write_insn(p, addis_11_2 + ha(off)); + p += 4; + write_insn(p, ld_12_11 + l(off)); + p += 4; + } + else + { + write_insn(p, addis_12_2 + ha(off)); + p += 4; + write_insn(p, ld_12_12 + l(off)); + p += 4; + } + if (plt_load_toc + && ha(off + 8 + 8 * static_chain) != ha(off)) + { + write_insn(p, addi_11_11 + l(off)); + p += 4; + off = 0; + } + write_insn(p, mtctr_12); + p += 4; + if (plt_load_toc) + { + if (use_fake_dep) + { + write_insn(p, xor_2_12_12); + p += 4; + write_insn(p, add_11_11_2); + p += 4; + } + write_insn(p, ld_2_11 + l(off + 8)); + p += 4; + if (static_chain) + { + write_insn(p, ld_11_11 + l(off + 16)); + p += 4; + } + } + } + else + { + write_insn(p, std_2_1 + this->targ_->stk_toc()); + p += 4; + write_insn(p, ld_12_2 + l(off)); + p += 4; + if (plt_load_toc + && ha(off + 8 + 8 * static_chain) != ha(off)) + { + write_insn(p, addi_2_2 + l(off)); + p += 4; + off = 0; + } + write_insn(p, mtctr_12); + p += 4; + if (plt_load_toc) + { + if (use_fake_dep) + { + write_insn(p, xor_11_12_12); + p += 4; + write_insn(p, add_2_2_11); + p += 4; + } + if (static_chain) + { + write_insn(p, ld_11_2 + l(off + 16)); + p += 4; + } + write_insn(p, ld_2_2 + l(off + 8)); + p += 4; + } + } + if (thread_safe && !use_fake_dep) + { + write_insn(p, cmpldi_2_0); + p += 4; + write_insn(p, bnectr_p4); + p += 4; + write_insn(p, b | (cmp_branch_off & 0x3fffffc)); + } + else + write_insn(p, bctr); } + } + + // Write out long branch stubs. + typename Branch_stub_entries::const_iterator bs; + for (bs = this->long_branch_stubs_.begin(); + bs != this->long_branch_stubs_.end(); + ++bs) + { + p = oview + this->plt_size_ + bs->second; + Address loc = this->stub_address() + this->plt_size_ + bs->second; + Address delta = bs->first.dest_ - loc; + if (delta + (1 << 25) < 2 << 25) + write_insn(p, b | (delta & 0x3fffffc)); else { - is_ifunc = true; - const Sized_relobj_file* relobj - = g->first.object_; - unsigned int local_sym_index = g->first.locsym_; - plt_addr = relobj->local_plt_offset(local_sym_index); + Address brlt_addr + = this->targ_->find_branch_lookup_table(bs->first.dest_); + gold_assert(brlt_addr != invalid_address); + brlt_addr += this->targ_->brlt_section()->address(); + Address got_addr = got_os_addr + bs->first.toc_base_off_; + Address brltoff = brlt_addr - got_addr; + if (ha(brltoff) == 0) + { + write_insn(p, ld_12_2 + l(brltoff)), p += 4; + } + else + { + write_insn(p, addis_12_2 + ha(brltoff)), p += 4; + write_insn(p, ld_12_12 + l(brltoff)), p += 4; + } + write_insn(p, mtctr_12), p += 4; + write_insn(p, bctr); + } + } + } + else + { + if (!this->plt_call_stubs_.empty()) + { + // The base address of the .plt section. + Address plt_base = this->targ_->plt_section()->address(); + Address iplt_base = invalid_address; + // The address of _GLOBAL_OFFSET_TABLE_. + Address g_o_t = invalid_address; + + // Write out plt call stubs. + typename Plt_stub_entries::const_iterator cs; + for (cs = this->plt_call_stubs_.begin(); + cs != this->plt_call_stubs_.end(); + ++cs) + { + bool is_iplt; + Address plt_addr = this->plt_off(cs, &is_iplt); + if (is_iplt) + { + if (iplt_base == invalid_address) + iplt_base = this->targ_->iplt_section()->address(); + plt_addr += iplt_base; + } + else + plt_addr += plt_base; + + p = oview + cs->second; + if (parameters->options().output_is_position_independent()) + { + Address got_addr; + const Powerpc_relobj* ppcobj + = (static_cast*> + (cs->first.object_)); + if (ppcobj != NULL && cs->first.addend_ >= 32768) + { + unsigned int got2 = ppcobj->got2_shndx(); + got_addr = ppcobj->get_output_section_offset(got2); + gold_assert(got_addr != invalid_address); + got_addr += (ppcobj->output_section(got2)->address() + + cs->first.addend_); + } + else + { + if (g_o_t == invalid_address) + { + const Output_data_got_powerpc* got + = this->targ_->got_section(); + g_o_t = got->address() + got->g_o_t(); + } + got_addr = g_o_t; + } + + Address off = plt_addr - got_addr; + if (ha(off) == 0) + { + write_insn(p + 0, lwz_11_30 + l(off)); + write_insn(p + 4, mtctr_11); + write_insn(p + 8, bctr); + } + else + { + write_insn(p + 0, addis_11_30 + ha(off)); + write_insn(p + 4, lwz_11_11 + l(off)); + write_insn(p + 8, mtctr_11); + write_insn(p + 12, bctr); + } + } + else + { + write_insn(p + 0, lis_11 + ha(plt_addr)); + write_insn(p + 4, lwz_11_11 + l(plt_addr)); + write_insn(p + 8, mtctr_11); + write_insn(p + 12, bctr); + } } - if (is_ifunc) + } + + // Write out long branch stubs. + typename Branch_stub_entries::const_iterator bs; + for (bs = this->long_branch_stubs_.begin(); + bs != this->long_branch_stubs_.end(); + ++bs) + { + p = oview + this->plt_size_ + bs->second; + Address loc = this->stub_address() + this->plt_size_ + bs->second; + Address delta = bs->first.dest_ - loc; + if (delta + (1 << 25) < 2 << 25) + write_insn(p, b | (delta & 0x3fffffc)); + else if (!parameters->options().output_is_position_independent()) { - if (iplt_base == invalid_address) - iplt_base = this->targ_->iplt_section()->address(); - plt_addr += iplt_base; + write_insn(p + 0, lis_12 + ha(bs->first.dest_)); + write_insn(p + 4, addi_12_12 + l(bs->first.dest_)); + write_insn(p + 8, mtctr_12); + write_insn(p + 12, bctr); } else - plt_addr += plt_base; - const Powerpc_relobj* ppcobj = static_cast - *>(g->first.object_); - Address got_addr = got_os_addr + ppcobj->toc_base_offset(); - Address pltoff = plt_addr - got_addr; + { + delta -= 8; + write_insn(p + 0, mflr_0); + write_insn(p + 4, bcl_20_31); + write_insn(p + 8, mflr_12); + write_insn(p + 12, addis_12_12 + ha(delta)); + write_insn(p + 16, addi_12_12 + l(delta)); + write_insn(p + 20, mtlr_0); + write_insn(p + 24, mtctr_12); + write_insn(p + 28, bctr); + } + } + } +} + +// Write out .glink. + +template +void +Output_data_glink::do_write(Output_file* of) +{ + const section_size_type off = this->offset(); + const section_size_type oview_size = + convert_to_section_size_type(this->data_size()); + unsigned char* const oview = of->get_output_view(off, oview_size); + unsigned char* p; + + // The base address of the .plt section. + typedef typename elfcpp::Elf_types::Elf_Addr Address; + Address plt_base = this->targ_->plt_section()->address(); - if (pltoff + 0x80008000 > 0xffffffff || (pltoff & 7) != 0) - gold_error(_("%s: linkage table error against `%s'"), - g->first.object_->name().c_str(), - g->first.sym_->demangled_name().c_str()); + if (size == 64) + { + if (this->end_branch_table_ != 0) + { + // Write pltresolve stub. + p = oview; + Address after_bcl = this->address() + 16; + Address pltoff = plt_base - after_bcl; - p = oview + g->second * this->glink_entry_size(); - if (ha(pltoff) != 0) + elfcpp::Swap<64, big_endian>::writeval(p, pltoff), p += 8; + + if (this->targ_->abiversion() < 2) { - write_insn(p, addis_12_2 + ha(pltoff)), p += 4; - write_insn(p, std_2_1 + 40), p += 4; - write_insn(p, ld_11_12 + l(pltoff)), p += 4; - if (ha(pltoff + 16) != ha(pltoff)) - { - write_insn(p, addi_12_12 + l(pltoff)), p += 4; - pltoff = 0; - } - write_insn(p, mtctr_11), p += 4; - write_insn(p, ld_2_12 + l(pltoff + 8)), p += 4; - write_insn(p, ld_11_12 + l(pltoff + 16)), p += 4; - write_insn(p, bctr), p += 4; + write_insn(p, mflr_12), p += 4; + write_insn(p, bcl_20_31), p += 4; + write_insn(p, mflr_11), p += 4; + write_insn(p, ld_2_11 + l(-16)), p += 4; + write_insn(p, mtlr_12), p += 4; + write_insn(p, add_11_2_11), p += 4; + write_insn(p, ld_12_11 + 0), p += 4; + write_insn(p, ld_2_11 + 8), p += 4; + write_insn(p, mtctr_12), p += 4; + write_insn(p, ld_11_11 + 16), p += 4; } else { - write_insn(p, std_2_1 + 40), p += 4; - write_insn(p, ld_11_2 + l(pltoff)), p += 4; - if (ha(pltoff + 16) != ha(pltoff)) - { - write_insn(p, addi_2_2 + l(pltoff)), p += 4; - pltoff = 0; - } - write_insn(p, mtctr_11), p += 4; - write_insn(p, ld_11_2 + l(pltoff + 16)), p += 4; - write_insn(p, ld_2_2 + l(pltoff + 8)), p += 4; - write_insn(p, bctr), p += 4; + write_insn(p, mflr_0), p += 4; + write_insn(p, bcl_20_31), p += 4; + write_insn(p, mflr_11), p += 4; + write_insn(p, ld_2_11 + l(-16)), p += 4; + write_insn(p, mtlr_0), p += 4; + write_insn(p, sub_12_12_11), p += 4; + write_insn(p, add_11_2_11), p += 4; + write_insn(p, addi_0_12 + l(-48)), p += 4; + write_insn(p, ld_12_11 + 0), p += 4; + write_insn(p, srdi_0_0_2), p += 4; + write_insn(p, mtctr_12), p += 4; + write_insn(p, ld_11_11 + 8), p += 4; } - } - - // Write pltresolve stub. - p = oview + this->pltresolve_; - Address after_bcl = this->address() + this->pltresolve_ + 16; - Address pltoff = plt_base - after_bcl; - - elfcpp::Swap<64, big_endian>::writeval(p, pltoff), p += 8; - - write_insn(p, mflr_12), p += 4; - write_insn(p, bcl_20_31), p += 4; - write_insn(p, mflr_11), p += 4; - write_insn(p, ld_2_11 + l(-16)), p += 4; - write_insn(p, mtlr_12), p += 4; - write_insn(p, add_12_2_11), p += 4; - write_insn(p, ld_11_12 + 0), p += 4; - write_insn(p, ld_2_12 + 8), p += 4; - write_insn(p, mtctr_11), p += 4; - write_insn(p, ld_11_12 + 16), p += 4; - write_insn(p, bctr), p += 4; - while (p < oview + this->pltresolve_ + this->pltresolve_size) - write_insn(p, nop), p += 4; + write_insn(p, bctr), p += 4; + while (p < oview + this->pltresolve_size) + write_insn(p, nop), p += 4; - // Write lazy link call stubs. - uint32_t indx = 0; - while (p < oview + oview_size) - { - if (indx < 0x8000) - { - write_insn(p, li_0_0 + indx), p += 4; - } - else + // Write lazy link call stubs. + uint32_t indx = 0; + while (p < oview + this->end_branch_table_) { - write_insn(p, lis_0_0 + hi(indx)), p += 4; - write_insn(p, ori_0_0_0 + l(indx)), p += 4; + if (this->targ_->abiversion() < 2) + { + if (indx < 0x8000) + { + write_insn(p, li_0_0 + indx), p += 4; + } + else + { + write_insn(p, lis_0 + hi(indx)), p += 4; + write_insn(p, ori_0_0_0 + l(indx)), p += 4; + } + } + uint32_t branch_off = 8 - (p - oview); + write_insn(p, b + (branch_off & 0x3fffffc)), p += 4; + indx++; } - uint32_t branch_off = this->pltresolve_ + 8 - (p - oview); - write_insn(p, b + (branch_off & 0x3fffffc)), p += 4; - indx++; } - } - else - { - // The address of _GLOBAL_OFFSET_TABLE_. - Address g_o_t = got->address() + got->g_o_t(); - // Write out call stubs. - typename Glink_entries::const_iterator g; - for (g = this->glink_entries_.begin(); - g != this->glink_entries_.end(); - ++g) + Address plt_base = this->targ_->plt_section()->address(); + Address iplt_base = invalid_address; + unsigned int global_entry_off = (this->end_branch_table_ + 15) & -16; + Address global_entry_base = this->address() + global_entry_off; + typename Global_entry_stub_entries::const_iterator ge; + for (ge = this->global_entry_stubs_.begin(); + ge != this->global_entry_stubs_.end(); + ++ge) { - Address plt_addr; - bool is_ifunc; - const Symbol* gsym = g->first.sym_; - if (gsym != NULL) - { - is_ifunc = (gsym->type() == elfcpp::STT_GNU_IFUNC - && gsym->can_use_relative_reloc(false)); - plt_addr = gsym->plt_offset(); - } - else - { - is_ifunc = true; - const Sized_relobj_file* relobj - = g->first.object_; - unsigned int local_sym_index = g->first.locsym_; - plt_addr = relobj->local_plt_offset(local_sym_index); - } - if (is_ifunc) + p = oview + global_entry_off + ge->second; + Address plt_addr = ge->first->plt_offset(); + if (ge->first->type() == elfcpp::STT_GNU_IFUNC + && ge->first->can_use_relative_reloc(false)) { if (iplt_base == invalid_address) iplt_base = this->targ_->iplt_section()->address(); @@ -2275,50 +4660,29 @@ Output_data_glink::do_write(Output_file* of) } else plt_addr += plt_base; + Address my_addr = global_entry_base + ge->second; + Address off = plt_addr - my_addr; - p = oview + g->second * this->glink_entry_size(); - if (parameters->options().output_is_position_independent()) - { - Address got_addr; - const Powerpc_relobj* object = static_cast - *>(g->first.object_); - if (object != NULL && g->first.addend_ >= 32768) - { - unsigned int got2 = object->got2_shndx(); - got_addr = g->first.object_->get_output_section_offset(got2); - gold_assert(got_addr != invalid_address); - got_addr += (g->first.object_->output_section(got2)->address() - + g->first.addend_); - } - else - got_addr = g_o_t; + if (off + 0x80008000 > 0xffffffff || (off & 3) != 0) + gold_error(_("%s: linkage table error against `%s'"), + ge->first->object()->name().c_str(), + ge->first->demangled_name().c_str()); - Address pltoff = plt_addr - got_addr; - if (ha(pltoff) == 0) - { - write_insn(p + 0, lwz_11_30 + l(pltoff)); - write_insn(p + 4, mtctr_11); - write_insn(p + 8, bctr); - } - else - { - write_insn(p + 0, addis_11_30 + ha(pltoff)); - write_insn(p + 4, lwz_11_11 + l(pltoff)); - write_insn(p + 8, mtctr_11); - write_insn(p + 12, bctr); - } - } - else - { - write_insn(p + 0, lis_11 + ha(plt_addr)); - write_insn(p + 4, lwz_11_11 + l(plt_addr)); - write_insn(p + 8, mtctr_11); - write_insn(p + 12, bctr); - } + write_insn(p, addis_12_12 + ha(off)), p += 4; + write_insn(p, ld_12_12 + l(off)), p += 4; + write_insn(p, mtctr_12), p += 4; + write_insn(p, bctr); } + } + else + { + const Output_data_got_powerpc* got + = this->targ_->got_section(); + // The address of _GLOBAL_OFFSET_TABLE_. + Address g_o_t = got->address() + got->g_o_t(); // Write out pltresolve branch table. - p = oview + this->pltresolve_; + p = oview; unsigned int the_end = oview_size - this->pltresolve_size; unsigned char* end_p = oview + the_end; while (p < end_p - 8 * 4) @@ -2329,7 +4693,7 @@ Output_data_glink::do_write(Output_file* of) // Write out pltresolve call stub. if (parameters->options().output_is_position_independent()) { - Address res0_off = this->pltresolve_; + Address res0_off = 0; Address after_bcl_off = the_end + 12; Address bcl_res0 = after_bcl_off - res0_off; @@ -2363,7 +4727,7 @@ Output_data_glink::do_write(Output_file* of) } else { - Address res0 = this->pltresolve_ + this->address(); + Address res0 = this->address(); write_insn(p + 0, lis_12 + ha(g_o_t + 4)); write_insn(p + 4, addis_11_11 + ha(-res0)); @@ -2394,6 +4758,335 @@ Output_data_glink::do_write(Output_file* of) of->write_output_view(off, oview_size, oview); } + +// A class to handle linker generated save/restore functions. + +template +class Output_data_save_res : public Output_section_data_build +{ + public: + Output_data_save_res(Symbol_table* symtab); + + protected: + // Write to a map file. + void + do_print_to_mapfile(Mapfile* mapfile) const + { mapfile->print_output_data(this, _("** save/restore")); } + + void + do_write(Output_file*); + + private: + // The maximum size of save/restore contents. + static const unsigned int savres_max = 218*4; + + void + savres_define(Symbol_table* symtab, + const char *name, + unsigned int lo, unsigned int hi, + unsigned char* write_ent(unsigned char*, int), + unsigned char* write_tail(unsigned char*, int)); + + unsigned char *contents_; +}; + +template +static unsigned char* +savegpr0(unsigned char* p, int r) +{ + uint32_t insn = std_0_1 + (r << 21) + (1 << 16) - (32 - r) * 8; + write_insn(p, insn); + return p + 4; +} + +template +static unsigned char* +savegpr0_tail(unsigned char* p, int r) +{ + p = savegpr0(p, r); + uint32_t insn = std_0_1 + 16; + write_insn(p, insn); + p = p + 4; + write_insn(p, blr); + return p + 4; +} + +template +static unsigned char* +restgpr0(unsigned char* p, int r) +{ + uint32_t insn = ld_0_1 + (r << 21) + (1 << 16) - (32 - r) * 8; + write_insn(p, insn); + return p + 4; +} + +template +static unsigned char* +restgpr0_tail(unsigned char* p, int r) +{ + uint32_t insn = ld_0_1 + 16; + write_insn(p, insn); + p = p + 4; + p = restgpr0(p, r); + write_insn(p, mtlr_0); + p = p + 4; + if (r == 29) + { + p = restgpr0(p, 30); + p = restgpr0(p, 31); + } + write_insn(p, blr); + return p + 4; +} + +template +static unsigned char* +savegpr1(unsigned char* p, int r) +{ + uint32_t insn = std_0_12 + (r << 21) + (1 << 16) - (32 - r) * 8; + write_insn(p, insn); + return p + 4; +} + +template +static unsigned char* +savegpr1_tail(unsigned char* p, int r) +{ + p = savegpr1(p, r); + write_insn(p, blr); + return p + 4; +} + +template +static unsigned char* +restgpr1(unsigned char* p, int r) +{ + uint32_t insn = ld_0_12 + (r << 21) + (1 << 16) - (32 - r) * 8; + write_insn(p, insn); + return p + 4; +} + +template +static unsigned char* +restgpr1_tail(unsigned char* p, int r) +{ + p = restgpr1(p, r); + write_insn(p, blr); + return p + 4; +} + +template +static unsigned char* +savefpr(unsigned char* p, int r) +{ + uint32_t insn = stfd_0_1 + (r << 21) + (1 << 16) - (32 - r) * 8; + write_insn(p, insn); + return p + 4; +} + +template +static unsigned char* +savefpr0_tail(unsigned char* p, int r) +{ + p = savefpr(p, r); + write_insn(p, std_0_1 + 16); + p = p + 4; + write_insn(p, blr); + return p + 4; +} + +template +static unsigned char* +restfpr(unsigned char* p, int r) +{ + uint32_t insn = lfd_0_1 + (r << 21) + (1 << 16) - (32 - r) * 8; + write_insn(p, insn); + return p + 4; +} + +template +static unsigned char* +restfpr0_tail(unsigned char* p, int r) +{ + write_insn(p, ld_0_1 + 16); + p = p + 4; + p = restfpr(p, r); + write_insn(p, mtlr_0); + p = p + 4; + if (r == 29) + { + p = restfpr(p, 30); + p = restfpr(p, 31); + } + write_insn(p, blr); + return p + 4; +} + +template +static unsigned char* +savefpr1_tail(unsigned char* p, int r) +{ + p = savefpr(p, r); + write_insn(p, blr); + return p + 4; +} + +template +static unsigned char* +restfpr1_tail(unsigned char* p, int r) +{ + p = restfpr(p, r); + write_insn(p, blr); + return p + 4; +} + +template +static unsigned char* +savevr(unsigned char* p, int r) +{ + uint32_t insn = li_12_0 + (1 << 16) - (32 - r) * 16; + write_insn(p, insn); + p = p + 4; + insn = stvx_0_12_0 + (r << 21); + write_insn(p, insn); + return p + 4; +} + +template +static unsigned char* +savevr_tail(unsigned char* p, int r) +{ + p = savevr(p, r); + write_insn(p, blr); + return p + 4; +} + +template +static unsigned char* +restvr(unsigned char* p, int r) +{ + uint32_t insn = li_12_0 + (1 << 16) - (32 - r) * 16; + write_insn(p, insn); + p = p + 4; + insn = lvx_0_12_0 + (r << 21); + write_insn(p, insn); + return p + 4; +} + +template +static unsigned char* +restvr_tail(unsigned char* p, int r) +{ + p = restvr(p, r); + write_insn(p, blr); + return p + 4; +} + + +template +Output_data_save_res::Output_data_save_res( + Symbol_table* symtab) + : Output_section_data_build(4), + contents_(NULL) +{ + this->savres_define(symtab, + "_savegpr0_", 14, 31, + savegpr0, savegpr0_tail); + this->savres_define(symtab, + "_restgpr0_", 14, 29, + restgpr0, restgpr0_tail); + this->savres_define(symtab, + "_restgpr0_", 30, 31, + restgpr0, restgpr0_tail); + this->savres_define(symtab, + "_savegpr1_", 14, 31, + savegpr1, savegpr1_tail); + this->savres_define(symtab, + "_restgpr1_", 14, 31, + restgpr1, restgpr1_tail); + this->savres_define(symtab, + "_savefpr_", 14, 31, + savefpr, savefpr0_tail); + this->savres_define(symtab, + "_restfpr_", 14, 29, + restfpr, restfpr0_tail); + this->savres_define(symtab, + "_restfpr_", 30, 31, + restfpr, restfpr0_tail); + this->savres_define(symtab, + "._savef", 14, 31, + savefpr, savefpr1_tail); + this->savres_define(symtab, + "._restf", 14, 31, + restfpr, restfpr1_tail); + this->savres_define(symtab, + "_savevr_", 20, 31, + savevr, savevr_tail); + this->savres_define(symtab, + "_restvr_", 20, 31, + restvr, restvr_tail); +} + +template +void +Output_data_save_res::savres_define( + Symbol_table* symtab, + const char *name, + unsigned int lo, unsigned int hi, + unsigned char* write_ent(unsigned char*, int), + unsigned char* write_tail(unsigned char*, int)) +{ + size_t len = strlen(name); + bool writing = false; + char sym[16]; + + memcpy(sym, name, len); + sym[len + 2] = 0; + + for (unsigned int i = lo; i <= hi; i++) + { + sym[len + 0] = i / 10 + '0'; + sym[len + 1] = i % 10 + '0'; + Symbol* gsym = symtab->lookup(sym); + bool refd = gsym != NULL && gsym->is_undefined(); + writing = writing || refd; + if (writing) + { + if (this->contents_ == NULL) + this->contents_ = new unsigned char[this->savres_max]; + + section_size_type value = this->current_data_size(); + unsigned char* p = this->contents_ + value; + if (i != hi) + p = write_ent(p, i); + else + p = write_tail(p, i); + section_size_type cur_size = p - this->contents_; + this->set_current_data_size(cur_size); + if (refd) + symtab->define_in_output_data(sym, NULL, Symbol_table::PREDEFINED, + this, value, cur_size - value, + elfcpp::STT_FUNC, elfcpp::STB_GLOBAL, + elfcpp::STV_HIDDEN, 0, false, false); + } + } +} + +// Write out save/restore. + +template +void +Output_data_save_res::do_write(Output_file* of) +{ + const section_size_type off = this->offset(); + const section_size_type oview_size = + convert_to_section_size_type(this->data_size()); + unsigned char* const oview = of->get_output_view(off, oview_size); + memcpy(oview, this->contents_, oview_size); + of->write_output_view(off, oview_size, oview); +} + + // Create the glink section. template @@ -2403,6 +5096,7 @@ Target_powerpc::make_glink_section(Layout* layout) if (this->glink_ == NULL) { this->glink_ = new Output_data_glink(this); + this->glink_->add_eh_frame(layout); layout->add_output_section_data(".text", elfcpp::SHT_PROGBITS, elfcpp::SHF_ALLOC | elfcpp::SHF_EXECINSTR, this->glink_, ORDER_TEXT, false); @@ -2413,26 +5107,23 @@ Target_powerpc::make_glink_section(Layout* layout) template void -Target_powerpc::make_plt_entry( - Layout* layout, - Symbol* gsym, - const elfcpp::Rela& reloc, - const Sized_relobj_file* object) +Target_powerpc::make_plt_entry(Symbol_table* symtab, + Layout* layout, + Symbol* gsym) { if (gsym->type() == elfcpp::STT_GNU_IFUNC && gsym->can_use_relative_reloc(false)) { if (this->iplt_ == NULL) - this->make_iplt_section(layout); + this->make_iplt_section(symtab, layout); this->iplt_->add_ifunc_entry(gsym); } else { if (this->plt_ == NULL) - this->make_plt_section(layout); + this->make_plt_section(symtab, layout); this->plt_->add_entry(gsym); } - this->glink_->add_entry(object, gsym, reloc); } // Make a PLT entry for a local STT_GNU_IFUNC symbol. @@ -2440,15 +5131,14 @@ Target_powerpc::make_plt_entry( template void Target_powerpc::make_local_ifunc_plt_entry( + Symbol_table* symtab, Layout* layout, - const elfcpp::Rela& reloc, - Sized_relobj_file* relobj) + Sized_relobj_file* relobj, + unsigned int r_sym) { if (this->iplt_ == NULL) - this->make_iplt_section(layout); - unsigned int r_sym = elfcpp::elf_r_sym(reloc.get_r_info()); + this->make_iplt_section(symtab, layout); this->iplt_->add_local_ifunc_entry(relobj, r_sym); - this->glink_->add_entry(relobj, r_sym, reloc); } // Return the number of entries in the PLT. @@ -2459,28 +5149,7 @@ Target_powerpc::plt_entry_count() const { if (this->plt_ == NULL) return 0; - unsigned int count = this->plt_->entry_count(); - if (this->iplt_ != NULL) - count += this->iplt_->entry_count(); - return count; -} - -// Return the offset of the first non-reserved PLT entry. - -template -unsigned int -Target_powerpc::first_plt_entry_offset() const -{ - return this->plt_->first_plt_entry_offset(); -} - -// Return the size of each PLT entry. - -template -unsigned int -Target_powerpc::plt_entry_size() const -{ - return Output_data_plt_powerpc::get_plt_entry_size(); + return this->plt_->entry_count(); } // Create a GOT entry for local dynamic __tls_get_addr calls. @@ -2510,8 +5179,12 @@ Target_powerpc::tlsld_got_offset( template int -Target_powerpc::Scan::get_reference_flags(unsigned int r_type) +Target_powerpc::Scan::get_reference_flags( + unsigned int r_type, + const Target_powerpc* target) { + int ref = 0; + switch (r_type) { case elfcpp::R_POWERPC_NONE: @@ -2519,7 +5192,7 @@ Target_powerpc::Scan::get_reference_flags(unsigned int r_type) case elfcpp::R_POWERPC_GNU_VTENTRY: case elfcpp::R_PPC64_TOC: // No symbol reference. - return 0; + break; case elfcpp::R_PPC64_ADDR64: case elfcpp::R_PPC64_UADDR64: @@ -2530,13 +5203,15 @@ Target_powerpc::Scan::get_reference_flags(unsigned int r_type) case elfcpp::R_POWERPC_ADDR16_LO: case elfcpp::R_POWERPC_ADDR16_HI: case elfcpp::R_POWERPC_ADDR16_HA: - return Symbol::ABSOLUTE_REF; + ref = Symbol::ABSOLUTE_REF; + break; case elfcpp::R_POWERPC_ADDR24: case elfcpp::R_POWERPC_ADDR14: case elfcpp::R_POWERPC_ADDR14_BRTAKEN: case elfcpp::R_POWERPC_ADDR14_BRNTAKEN: - return Symbol::FUNCTION_CALL | Symbol::ABSOLUTE_REF; + ref = Symbol::FUNCTION_CALL | Symbol::ABSOLUTE_REF; + break; case elfcpp::R_PPC64_REL64: case elfcpp::R_POWERPC_REL32: @@ -2545,14 +5220,16 @@ Target_powerpc::Scan::get_reference_flags(unsigned int r_type) case elfcpp::R_POWERPC_REL16_LO: case elfcpp::R_POWERPC_REL16_HI: case elfcpp::R_POWERPC_REL16_HA: - return Symbol::RELATIVE_REF; + ref = Symbol::RELATIVE_REF; + break; case elfcpp::R_POWERPC_REL24: case elfcpp::R_PPC_PLTREL24: case elfcpp::R_POWERPC_REL14: case elfcpp::R_POWERPC_REL14_BRTAKEN: case elfcpp::R_POWERPC_REL14_BRNTAKEN: - return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF; + ref = Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF; + break; case elfcpp::R_POWERPC_GOT16: case elfcpp::R_POWERPC_GOT16_LO: @@ -2567,11 +5244,13 @@ Target_powerpc::Scan::get_reference_flags(unsigned int r_type) case elfcpp::R_PPC64_TOC16_DS: case elfcpp::R_PPC64_TOC16_LO_DS: // Absolute in GOT. - return Symbol::ABSOLUTE_REF; + ref = Symbol::ABSOLUTE_REF; + break; case elfcpp::R_POWERPC_GOT_TPREL16: case elfcpp::R_POWERPC_TLS: - return Symbol::TLS_REF; + ref = Symbol::TLS_REF; + break; case elfcpp::R_POWERPC_COPY: case elfcpp::R_POWERPC_GLOB_DAT: @@ -2580,8 +5259,12 @@ Target_powerpc::Scan::get_reference_flags(unsigned int r_type) case elfcpp::R_POWERPC_DTPMOD: default: // Not expected. We will give an error later. - return 0; + break; } + + if (size == 64 && target->abiversion() < 2) + ref |= Symbol::FUNC_DESC_ABI; + return ref; } // Report an unsupported relocation against a local symbol. @@ -2652,6 +5335,8 @@ Target_powerpc::Scan::check_non_pic(Relobj* object, case elfcpp::R_PPC64_JMP_IREL: case elfcpp::R_PPC64_ADDR16_DS: case elfcpp::R_PPC64_ADDR16_LO_DS: + case elfcpp::R_PPC64_ADDR16_HIGH: + case elfcpp::R_PPC64_ADDR16_HIGHA: case elfcpp::R_PPC64_ADDR16_HIGHER: case elfcpp::R_PPC64_ADDR16_HIGHEST: case elfcpp::R_PPC64_ADDR16_HIGHERA: @@ -2660,6 +5345,8 @@ Target_powerpc::Scan::check_non_pic(Relobj* object, case elfcpp::R_POWERPC_ADDR30: case elfcpp::R_PPC64_TPREL16_DS: case elfcpp::R_PPC64_TPREL16_LO_DS: + case elfcpp::R_PPC64_TPREL16_HIGH: + case elfcpp::R_PPC64_TPREL16_HIGHA: case elfcpp::R_PPC64_TPREL16_HIGHER: case elfcpp::R_PPC64_TPREL16_HIGHEST: case elfcpp::R_PPC64_TPREL16_HIGHERA: @@ -2705,39 +5392,42 @@ Target_powerpc::Scan::check_non_pic(Relobj* object, template bool Target_powerpc::Scan::reloc_needs_plt_for_ifunc( + Target_powerpc* target, Sized_relobj_file* object, - unsigned int r_type) + unsigned int r_type, + bool report_err) { // In non-pic code any reference will resolve to the plt call stub // for the ifunc symbol. - if (size == 32 && !parameters->options().output_is_position_independent()) + if ((size == 32 || target->abiversion() >= 2) + && !parameters->options().output_is_position_independent()) return true; switch (r_type) { - // Word size refs from data sections are OK. + // Word size refs from data sections are OK, but don't need a PLT entry. case elfcpp::R_POWERPC_ADDR32: case elfcpp::R_POWERPC_UADDR32: if (size == 32) - return true; + return false; break; case elfcpp::R_PPC64_ADDR64: case elfcpp::R_PPC64_UADDR64: if (size == 64) - return true; + return false; break; - // GOT refs are good. + // GOT refs are good, but also don't need a PLT entry. case elfcpp::R_POWERPC_GOT16: case elfcpp::R_POWERPC_GOT16_LO: case elfcpp::R_POWERPC_GOT16_HI: case elfcpp::R_POWERPC_GOT16_HA: case elfcpp::R_PPC64_GOT16_DS: case elfcpp::R_PPC64_GOT16_LO_DS: - return true; + return false; - // So are function calls. + // Function calls are good, and these do need a PLT entry. case elfcpp::R_POWERPC_ADDR24: case elfcpp::R_POWERPC_ADDR14: case elfcpp::R_POWERPC_ADDR14_BRTAKEN: @@ -2762,7 +5452,8 @@ Target_powerpc::Scan::reloc_needs_plt_for_ifunc( // writable and non-executable to apply text relocations. So we'll // segfault when trying to run the indirection function to resolve // the reloc. - gold_error(_("%s: unsupported reloc %u for IFUNC symbol"), + if (report_err) + gold_error(_("%s: unsupported reloc %u for IFUNC symbol"), object->name().c_str(), r_type); return false; } @@ -2783,6 +5474,25 @@ Target_powerpc::Scan::local( const elfcpp::Sym& lsym, bool is_discarded) { + this->maybe_skip_tls_get_addr_call(r_type, NULL); + + if ((size == 64 && r_type == elfcpp::R_PPC64_TLSGD) + || (size == 32 && r_type == elfcpp::R_PPC_TLSGD)) + { + this->expect_tls_get_addr_call(); + const tls::Tls_optimization tls_type = target->optimize_tls_gd(true); + if (tls_type != tls::TLSOPT_NONE) + this->skip_next_tls_get_addr_call(); + } + else if ((size == 64 && r_type == elfcpp::R_PPC64_TLSLD) + || (size == 32 && r_type == elfcpp::R_PPC_TLSLD)) + { + this->expect_tls_get_addr_call(); + const tls::Tls_optimization tls_type = target->optimize_tls_ld(); + if (tls_type != tls::TLSOPT_NONE) + this->skip_next_tls_get_addr_call(); + } + Powerpc_relobj* ppc_object = static_cast*>(object); @@ -2797,8 +5507,13 @@ Target_powerpc::Scan::local( // A local STT_GNU_IFUNC symbol may require a PLT entry. bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC; - if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type)) - target->make_local_ifunc_plt_entry(layout, reloc, object); + if (is_ifunc && this->reloc_needs_plt_for_ifunc(target, object, r_type, true)) + { + unsigned int r_sym = elfcpp::elf_r_sym(reloc.get_r_info()); + target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(), + r_type, r_sym, reloc.get_r_addend()); + target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym); + } switch (r_type) { @@ -2806,7 +5521,6 @@ Target_powerpc::Scan::local( case elfcpp::R_POWERPC_GNU_VTINHERIT: case elfcpp::R_POWERPC_GNU_VTENTRY: case elfcpp::R_PPC64_TOCSAVE: - case elfcpp::R_PPC_EMB_MRKREF: case elfcpp::R_POWERPC_TLS: break; @@ -2818,6 +5532,7 @@ Target_powerpc::Scan::local( { Address off = reloc.get_r_offset(); if (size == 64 + && target->abiversion() < 2 && data_shndx == ppc_object->opd_shndx() && ppc_object->get_opd_discard(off - 8)) break; @@ -2843,6 +5558,8 @@ Target_powerpc::Scan::local( case elfcpp::R_POWERPC_ADDR16_HI: case elfcpp::R_POWERPC_ADDR16_HA: case elfcpp::R_POWERPC_UADDR16: + case elfcpp::R_PPC64_ADDR16_HIGH: + case elfcpp::R_PPC64_ADDR16_HIGHA: case elfcpp::R_PPC64_ADDR16_HIGHER: case elfcpp::R_PPC64_ADDR16_HIGHERA: case elfcpp::R_PPC64_ADDR16_HIGHEST: @@ -2856,76 +5573,97 @@ Target_powerpc::Scan::local( // executable), we need to create a dynamic relocation for // this location. if (parameters->options().output_is_position_independent() - || (size == 64 && is_ifunc)) + || (size == 64 && is_ifunc && target->abiversion() < 2)) { - Reloc_section* rela_dyn = target->rela_dyn_section(layout); - + Reloc_section* rela_dyn = target->rela_dyn_section(symtab, layout, + is_ifunc); + unsigned int r_sym = elfcpp::elf_r_sym(reloc.get_r_info()); if ((size == 32 && r_type == elfcpp::R_POWERPC_ADDR32) || (size == 64 && r_type == elfcpp::R_PPC64_ADDR64)) { - unsigned int r_sym = elfcpp::elf_r_sym(reloc.get_r_info()); - unsigned int dynrel = elfcpp::R_POWERPC_RELATIVE; - if (is_ifunc) - { - rela_dyn = target->iplt_section()->rel_plt(); - dynrel = elfcpp::R_POWERPC_IRELATIVE; - } + unsigned int dynrel = (is_ifunc ? elfcpp::R_POWERPC_IRELATIVE + : elfcpp::R_POWERPC_RELATIVE); rela_dyn->add_local_relative(object, r_sym, dynrel, output_section, data_shndx, reloc.get_r_offset(), reloc.get_r_addend(), false); } - else + else if (lsym.get_st_type() != elfcpp::STT_SECTION) { check_non_pic(object, r_type); - unsigned int r_sym = elfcpp::elf_r_sym(reloc.get_r_info()); rela_dyn->add_local(object, r_sym, r_type, output_section, data_shndx, reloc.get_r_offset(), reloc.get_r_addend()); } + else + { + gold_assert(lsym.get_st_value() == 0); + unsigned int shndx = lsym.get_st_shndx(); + bool is_ordinary; + shndx = object->adjust_sym_shndx(r_sym, shndx, + &is_ordinary); + if (!is_ordinary) + object->error(_("section symbol %u has bad shndx %u"), + r_sym, shndx); + else + rela_dyn->add_local_section(object, shndx, r_type, + output_section, data_shndx, + reloc.get_r_offset()); + } } break; - case elfcpp::R_PPC64_REL64: - case elfcpp::R_POWERPC_REL32: case elfcpp::R_POWERPC_REL24: case elfcpp::R_PPC_PLTREL24: case elfcpp::R_PPC_LOCAL24PC: + case elfcpp::R_POWERPC_REL14: + case elfcpp::R_POWERPC_REL14_BRTAKEN: + case elfcpp::R_POWERPC_REL14_BRNTAKEN: + if (!is_ifunc) + target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(), + r_type, elfcpp::elf_r_sym(reloc.get_r_info()), + reloc.get_r_addend()); + break; + + case elfcpp::R_PPC64_REL64: + case elfcpp::R_POWERPC_REL32: case elfcpp::R_POWERPC_REL16: case elfcpp::R_POWERPC_REL16_LO: case elfcpp::R_POWERPC_REL16_HI: case elfcpp::R_POWERPC_REL16_HA: - case elfcpp::R_POWERPC_REL14: - case elfcpp::R_POWERPC_REL14_BRTAKEN: - case elfcpp::R_POWERPC_REL14_BRNTAKEN: case elfcpp::R_POWERPC_SECTOFF: + case elfcpp::R_POWERPC_SECTOFF_LO: + case elfcpp::R_POWERPC_SECTOFF_HI: + case elfcpp::R_POWERPC_SECTOFF_HA: + case elfcpp::R_PPC64_SECTOFF_DS: + case elfcpp::R_PPC64_SECTOFF_LO_DS: case elfcpp::R_POWERPC_TPREL16: - case elfcpp::R_POWERPC_DTPREL16: - case elfcpp::R_POWERPC_SECTOFF_LO: case elfcpp::R_POWERPC_TPREL16_LO: - case elfcpp::R_POWERPC_DTPREL16_LO: - case elfcpp::R_POWERPC_SECTOFF_HI: case elfcpp::R_POWERPC_TPREL16_HI: - case elfcpp::R_POWERPC_DTPREL16_HI: - case elfcpp::R_POWERPC_SECTOFF_HA: case elfcpp::R_POWERPC_TPREL16_HA: - case elfcpp::R_POWERPC_DTPREL16_HA: - case elfcpp::R_PPC64_DTPREL16_HIGHER: + case elfcpp::R_PPC64_TPREL16_DS: + case elfcpp::R_PPC64_TPREL16_LO_DS: + case elfcpp::R_PPC64_TPREL16_HIGH: + case elfcpp::R_PPC64_TPREL16_HIGHA: case elfcpp::R_PPC64_TPREL16_HIGHER: - case elfcpp::R_PPC64_DTPREL16_HIGHERA: case elfcpp::R_PPC64_TPREL16_HIGHERA: - case elfcpp::R_PPC64_DTPREL16_HIGHEST: case elfcpp::R_PPC64_TPREL16_HIGHEST: - case elfcpp::R_PPC64_DTPREL16_HIGHESTA: case elfcpp::R_PPC64_TPREL16_HIGHESTA: - case elfcpp::R_PPC64_TPREL16_DS: - case elfcpp::R_PPC64_TPREL16_LO_DS: + case elfcpp::R_POWERPC_DTPREL16: + case elfcpp::R_POWERPC_DTPREL16_LO: + case elfcpp::R_POWERPC_DTPREL16_HI: + case elfcpp::R_POWERPC_DTPREL16_HA: case elfcpp::R_PPC64_DTPREL16_DS: case elfcpp::R_PPC64_DTPREL16_LO_DS: - case elfcpp::R_PPC64_SECTOFF_DS: - case elfcpp::R_PPC64_SECTOFF_LO_DS: + case elfcpp::R_PPC64_DTPREL16_HIGH: + case elfcpp::R_PPC64_DTPREL16_HIGHA: + case elfcpp::R_PPC64_DTPREL16_HIGHER: + case elfcpp::R_PPC64_DTPREL16_HIGHERA: + case elfcpp::R_PPC64_DTPREL16_HIGHEST: + case elfcpp::R_PPC64_DTPREL16_HIGHESTA: case elfcpp::R_PPC64_TLSGD: case elfcpp::R_PPC64_TLSLD: + case elfcpp::R_PPC64_ADDR64_LOCAL: break; case elfcpp::R_POWERPC_GOT16: @@ -2942,7 +5680,8 @@ Target_powerpc::Scan::local( if (!parameters->options().output_is_position_independent()) { - if (size == 32 && is_ifunc) + if (is_ifunc + && (size == 32 || target->abiversion() >= 2)) got->add_local_plt(object, r_sym, GOT_TYPE_STANDARD); else got->add_local(object, r_sym, GOT_TYPE_STANDARD); @@ -2955,13 +5694,10 @@ Target_powerpc::Scan::local( off = got->add_constant(0); object->set_local_got_offset(r_sym, GOT_TYPE_STANDARD, off); - Reloc_section* rela_dyn = target->rela_dyn_section(layout); - unsigned int dynrel = elfcpp::R_POWERPC_RELATIVE; - if (is_ifunc) - { - rela_dyn = target->iplt_section()->rel_plt(); - dynrel = elfcpp::R_POWERPC_IRELATIVE; - } + Reloc_section* rela_dyn = target->rela_dyn_section(symtab, layout, + is_ifunc); + unsigned int dynrel = (is_ifunc ? elfcpp::R_POWERPC_IRELATIVE + : elfcpp::R_POWERPC_RELATIVE); rela_dyn->add_local_relative(object, r_sym, dynrel, got, off, 0, false); } @@ -3045,10 +5781,19 @@ Target_powerpc::Scan::local( const tls::Tls_optimization tls_type = target->optimize_tls_ie(true); if (tls_type == tls::TLSOPT_NONE) { - Output_data_got_powerpc* got - = target->got_section(symtab, layout); unsigned int r_sym = elfcpp::elf_r_sym(reloc.get_r_info()); - got->add_local_tls(object, r_sym, GOT_TYPE_TPREL); + if (!object->local_has_got_offset(r_sym, GOT_TYPE_TPREL)) + { + Output_data_got_powerpc* got + = target->got_section(symtab, layout); + unsigned int off = got->add_constant(0); + object->set_local_got_offset(r_sym, GOT_TYPE_TPREL, off); + + Reloc_section* rela_dyn = target->rela_dyn_section(layout); + rela_dyn->add_symbolless_local_addend(object, r_sym, + elfcpp::R_POWERPC_TPREL, + got, off, 0); + } } else if (tls_type == tls::TLSOPT_TO_LE) { @@ -3063,6 +5808,21 @@ Target_powerpc::Scan::local( unsupported_reloc_local(object, r_type); break; } + + switch (r_type) + { + case elfcpp::R_POWERPC_GOT_TLSLD16: + case elfcpp::R_POWERPC_GOT_TLSGD16: + case elfcpp::R_POWERPC_GOT_TPREL16: + case elfcpp::R_POWERPC_GOT_DTPREL16: + case elfcpp::R_POWERPC_GOT16: + case elfcpp::R_PPC64_GOT16_DS: + case elfcpp::R_PPC64_TOC16: + case elfcpp::R_PPC64_TOC16_DS: + ppc_object->set_has_small_toc_reloc(); + default: + break; + } } // Report an unsupported relocation against a global symbol. @@ -3093,13 +5853,41 @@ Target_powerpc::Scan::global( unsigned int r_type, Symbol* gsym) { + if (this->maybe_skip_tls_get_addr_call(r_type, gsym) == Track_tls::SKIP) + return; + + if ((size == 64 && r_type == elfcpp::R_PPC64_TLSGD) + || (size == 32 && r_type == elfcpp::R_PPC_TLSGD)) + { + this->expect_tls_get_addr_call(); + const bool final = gsym->final_value_is_known(); + const tls::Tls_optimization tls_type = target->optimize_tls_gd(final); + if (tls_type != tls::TLSOPT_NONE) + this->skip_next_tls_get_addr_call(); + } + else if ((size == 64 && r_type == elfcpp::R_PPC64_TLSLD) + || (size == 32 && r_type == elfcpp::R_PPC_TLSLD)) + { + this->expect_tls_get_addr_call(); + const tls::Tls_optimization tls_type = target->optimize_tls_ld(); + if (tls_type != tls::TLSOPT_NONE) + this->skip_next_tls_get_addr_call(); + } + Powerpc_relobj* ppc_object = static_cast*>(object); // A STT_GNU_IFUNC symbol may require a PLT entry. - if (gsym->type() == elfcpp::STT_GNU_IFUNC - && this->reloc_needs_plt_for_ifunc(object, r_type)) - target->make_plt_entry(layout, gsym, reloc, object); + bool is_ifunc = gsym->type() == elfcpp::STT_GNU_IFUNC; + bool pushed_ifunc = false; + if (is_ifunc && this->reloc_needs_plt_for_ifunc(target, object, r_type, true)) + { + target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(), + r_type, elfcpp::elf_r_sym(reloc.get_r_info()), + reloc.get_r_addend()); + target->make_plt_entry(symtab, layout, gsym); + pushed_ifunc = true; + } switch (r_type) { @@ -3107,7 +5895,6 @@ Target_powerpc::Scan::global( case elfcpp::R_POWERPC_GNU_VTINHERIT: case elfcpp::R_POWERPC_GNU_VTENTRY: case elfcpp::R_PPC_LOCAL24PC: - case elfcpp::R_PPC_EMB_MRKREF: case elfcpp::R_POWERPC_TLS: break; @@ -3139,6 +5926,7 @@ Target_powerpc::Scan::global( case elfcpp::R_PPC64_ADDR64: if (size == 64 + && target->abiversion() < 2 && data_shndx == ppc_object->opd_shndx() && (gsym->is_defined_in_discarded_section() || gsym->object() != object)) @@ -3156,6 +5944,8 @@ Target_powerpc::Scan::global( case elfcpp::R_POWERPC_ADDR16_HI: case elfcpp::R_POWERPC_ADDR16_HA: case elfcpp::R_POWERPC_UADDR16: + case elfcpp::R_PPC64_ADDR16_HIGH: + case elfcpp::R_PPC64_ADDR16_HIGHA: case elfcpp::R_PPC64_ADDR16_HIGHER: case elfcpp::R_PPC64_ADDR16_HIGHERA: case elfcpp::R_PPC64_ADDR16_HIGHEST: @@ -3169,45 +5959,63 @@ Target_powerpc::Scan::global( // Make a PLT entry if necessary. if (gsym->needs_plt_entry()) { - target->make_plt_entry(layout, gsym, reloc, 0); // Since this is not a PC-relative relocation, we may be // taking the address of a function. In that case we need to // set the entry in the dynamic symbol table to the address of // the PLT call stub. - if (size == 32 + bool need_ifunc_plt = false; + if ((size == 32 || target->abiversion() >= 2) && gsym->is_from_dynobj() && !parameters->options().output_is_position_independent()) - gsym->set_needs_dynsym_value(); + { + gsym->set_needs_dynsym_value(); + need_ifunc_plt = true; + } + if (!is_ifunc || (!pushed_ifunc && need_ifunc_plt)) + { + target->push_branch(ppc_object, data_shndx, + reloc.get_r_offset(), r_type, + elfcpp::elf_r_sym(reloc.get_r_info()), + reloc.get_r_addend()); + target->make_plt_entry(symtab, layout, gsym); + } } // Make a dynamic relocation if necessary. - if (needs_dynamic_reloc(gsym, Scan::get_reference_flags(r_type)) - || (size == 64 && gsym->type() == elfcpp::STT_GNU_IFUNC)) + if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type, target)) + || (size == 64 && is_ifunc && target->abiversion() < 2)) { - if (gsym->may_need_copy_reloc()) + if (!parameters->options().output_is_position_independent() + && gsym->may_need_copy_reloc()) { target->copy_reloc(symtab, layout, object, data_shndx, output_section, gsym, reloc); } - else if (((size == 32 && r_type == elfcpp::R_POWERPC_ADDR32) - || (size == 64 && r_type == elfcpp::R_PPC64_ADDR64)) - && (gsym->can_use_relative_reloc(false) - || (size == 64 - && data_shndx == ppc_object->opd_shndx()))) + else if ((((size == 32 + && r_type == elfcpp::R_POWERPC_ADDR32) + || (size == 64 + && r_type == elfcpp::R_PPC64_ADDR64 + && target->abiversion() >= 2)) + && gsym->can_use_relative_reloc(false) + && !(gsym->visibility() == elfcpp::STV_PROTECTED + && parameters->options().shared())) + || (size == 64 + && r_type == elfcpp::R_PPC64_ADDR64 + && target->abiversion() < 2 + && (gsym->can_use_relative_reloc(false) + || data_shndx == ppc_object->opd_shndx()))) { - Reloc_section* rela_dyn = target->rela_dyn_section(layout); - unsigned int dynrel = elfcpp::R_POWERPC_RELATIVE; - if (gsym->type() == elfcpp::STT_GNU_IFUNC) - { - rela_dyn = target->iplt_section()->rel_plt(); - dynrel = elfcpp::R_POWERPC_IRELATIVE; - } + Reloc_section* rela_dyn + = target->rela_dyn_section(symtab, layout, is_ifunc); + unsigned int dynrel = (is_ifunc ? elfcpp::R_POWERPC_IRELATIVE + : elfcpp::R_POWERPC_RELATIVE); rela_dyn->add_symbolless_global_addend( gsym, dynrel, output_section, object, data_shndx, reloc.get_r_offset(), reloc.get_r_addend()); } else { - Reloc_section* rela_dyn = target->rela_dyn_section(layout); + Reloc_section* rela_dyn + = target->rela_dyn_section(symtab, layout, is_ifunc); check_non_pic(object, r_type); rela_dyn->add_global(gsym, r_type, output_section, object, data_shndx, @@ -3220,20 +6028,28 @@ Target_powerpc::Scan::global( case elfcpp::R_PPC_PLTREL24: case elfcpp::R_POWERPC_REL24: - if (gsym->needs_plt_entry() - || (!gsym->final_value_is_known() - && (gsym->is_undefined() - || gsym->is_from_dynobj() - || gsym->is_preemptible()))) - target->make_plt_entry(layout, gsym, reloc, object); + if (!is_ifunc) + { + target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(), + r_type, + elfcpp::elf_r_sym(reloc.get_r_info()), + reloc.get_r_addend()); + if (gsym->needs_plt_entry() + || (!gsym->final_value_is_known() + && (gsym->is_undefined() + || gsym->is_from_dynobj() + || gsym->is_preemptible()))) + target->make_plt_entry(symtab, layout, gsym); + } // Fall thru case elfcpp::R_PPC64_REL64: case elfcpp::R_POWERPC_REL32: // Make a dynamic relocation if necessary. - if (needs_dynamic_reloc(gsym, Scan::get_reference_flags(r_type))) + if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type, target))) { - if (gsym->may_need_copy_reloc()) + if (!parameters->options().output_is_position_independent() + && gsym->may_need_copy_reloc()) { target->copy_reloc(symtab, layout, object, data_shndx, output_section, gsym, @@ -3241,7 +6057,8 @@ Target_powerpc::Scan::global( } else { - Reloc_section* rela_dyn = target->rela_dyn_section(layout); + Reloc_section* rela_dyn + = target->rela_dyn_section(symtab, layout, is_ifunc); check_non_pic(object, r_type); rela_dyn->add_global(gsym, r_type, output_section, object, data_shndx, reloc.get_r_offset(), @@ -3250,41 +6067,52 @@ Target_powerpc::Scan::global( } break; + case elfcpp::R_POWERPC_REL14: + case elfcpp::R_POWERPC_REL14_BRTAKEN: + case elfcpp::R_POWERPC_REL14_BRNTAKEN: + if (!is_ifunc) + target->push_branch(ppc_object, data_shndx, reloc.get_r_offset(), + r_type, elfcpp::elf_r_sym(reloc.get_r_info()), + reloc.get_r_addend()); + break; + case elfcpp::R_POWERPC_REL16: case elfcpp::R_POWERPC_REL16_LO: case elfcpp::R_POWERPC_REL16_HI: case elfcpp::R_POWERPC_REL16_HA: - case elfcpp::R_POWERPC_REL14: - case elfcpp::R_POWERPC_REL14_BRTAKEN: - case elfcpp::R_POWERPC_REL14_BRNTAKEN: case elfcpp::R_POWERPC_SECTOFF: - case elfcpp::R_POWERPC_TPREL16: - case elfcpp::R_POWERPC_DTPREL16: case elfcpp::R_POWERPC_SECTOFF_LO: - case elfcpp::R_POWERPC_TPREL16_LO: - case elfcpp::R_POWERPC_DTPREL16_LO: case elfcpp::R_POWERPC_SECTOFF_HI: - case elfcpp::R_POWERPC_TPREL16_HI: - case elfcpp::R_POWERPC_DTPREL16_HI: case elfcpp::R_POWERPC_SECTOFF_HA: + case elfcpp::R_PPC64_SECTOFF_DS: + case elfcpp::R_PPC64_SECTOFF_LO_DS: + case elfcpp::R_POWERPC_TPREL16: + case elfcpp::R_POWERPC_TPREL16_LO: + case elfcpp::R_POWERPC_TPREL16_HI: case elfcpp::R_POWERPC_TPREL16_HA: - case elfcpp::R_POWERPC_DTPREL16_HA: - case elfcpp::R_PPC64_DTPREL16_HIGHER: + case elfcpp::R_PPC64_TPREL16_DS: + case elfcpp::R_PPC64_TPREL16_LO_DS: + case elfcpp::R_PPC64_TPREL16_HIGH: + case elfcpp::R_PPC64_TPREL16_HIGHA: case elfcpp::R_PPC64_TPREL16_HIGHER: - case elfcpp::R_PPC64_DTPREL16_HIGHERA: case elfcpp::R_PPC64_TPREL16_HIGHERA: - case elfcpp::R_PPC64_DTPREL16_HIGHEST: case elfcpp::R_PPC64_TPREL16_HIGHEST: - case elfcpp::R_PPC64_DTPREL16_HIGHESTA: case elfcpp::R_PPC64_TPREL16_HIGHESTA: - case elfcpp::R_PPC64_TPREL16_DS: - case elfcpp::R_PPC64_TPREL16_LO_DS: + case elfcpp::R_POWERPC_DTPREL16: + case elfcpp::R_POWERPC_DTPREL16_LO: + case elfcpp::R_POWERPC_DTPREL16_HI: + case elfcpp::R_POWERPC_DTPREL16_HA: case elfcpp::R_PPC64_DTPREL16_DS: case elfcpp::R_PPC64_DTPREL16_LO_DS: - case elfcpp::R_PPC64_SECTOFF_DS: - case elfcpp::R_PPC64_SECTOFF_LO_DS: + case elfcpp::R_PPC64_DTPREL16_HIGH: + case elfcpp::R_PPC64_DTPREL16_HIGHA: + case elfcpp::R_PPC64_DTPREL16_HIGHER: + case elfcpp::R_PPC64_DTPREL16_HIGHERA: + case elfcpp::R_PPC64_DTPREL16_HIGHEST: + case elfcpp::R_PPC64_DTPREL16_HIGHESTA: case elfcpp::R_PPC64_TLSGD: case elfcpp::R_PPC64_TLSLD: + case elfcpp::R_PPC64_ADDR64_LOCAL: break; case elfcpp::R_POWERPC_GOT16: @@ -3300,7 +6128,8 @@ Target_powerpc::Scan::global( got = target->got_section(symtab, layout); if (gsym->final_value_is_known()) { - if (size == 32 && gsym->type() == elfcpp::STT_GNU_IFUNC) + if (is_ifunc + && (size == 32 || target->abiversion() >= 2)) got->add_global_plt(gsym, GOT_TYPE_STANDARD); else got->add_global(gsym, GOT_TYPE_STANDARD); @@ -3312,18 +6141,17 @@ Target_powerpc::Scan::global( unsigned int off = got->add_constant(0); gsym->set_got_offset(GOT_TYPE_STANDARD, off); - Reloc_section* rela_dyn = target->rela_dyn_section(layout); + Reloc_section* rela_dyn + = target->rela_dyn_section(symtab, layout, is_ifunc); + if (gsym->can_use_relative_reloc(false) - && !(size == 32 + && !((size == 32 + || target->abiversion() >= 2) && gsym->visibility() == elfcpp::STV_PROTECTED && parameters->options().shared())) { - unsigned int dynrel = elfcpp::R_POWERPC_RELATIVE; - if (gsym->type() == elfcpp::STT_GNU_IFUNC) - { - rela_dyn = target->iplt_section()->rel_plt(); - dynrel = elfcpp::R_POWERPC_IRELATIVE; - } + unsigned int dynrel = (is_ifunc ? elfcpp::R_POWERPC_IRELATIVE + : elfcpp::R_POWERPC_RELATIVE); rela_dyn->add_global_relative(gsym, dynrel, got, off, 0, false); } else @@ -3356,18 +6184,33 @@ Target_powerpc::Scan::global( { Output_data_got_powerpc* got = target->got_section(symtab, layout); - got->add_global_pair_with_rel(gsym, GOT_TYPE_TLSGD, - target->rela_dyn_section(layout), + Reloc_section* rela_dyn = target->rela_dyn_section(layout); + got->add_global_pair_with_rel(gsym, GOT_TYPE_TLSGD, rela_dyn, elfcpp::R_POWERPC_DTPMOD, elfcpp::R_POWERPC_DTPREL); } else if (tls_type == tls::TLSOPT_TO_IE) { - Output_data_got_powerpc* got - = target->got_section(symtab, layout); - got->add_global_with_rel(gsym, GOT_TYPE_TPREL, - target->rela_dyn_section(layout), - elfcpp::R_POWERPC_TPREL); + if (!gsym->has_got_offset(GOT_TYPE_TPREL)) + { + Output_data_got_powerpc* got + = target->got_section(symtab, layout); + Reloc_section* rela_dyn = target->rela_dyn_section(layout); + if (gsym->is_undefined() + || gsym->is_from_dynobj()) + { + got->add_global_with_rel(gsym, GOT_TYPE_TPREL, rela_dyn, + elfcpp::R_POWERPC_TPREL); + } + else + { + unsigned int off = got->add_constant(0); + gsym->set_got_offset(GOT_TYPE_TPREL, off); + unsigned int dynrel = elfcpp::R_POWERPC_TPREL; + rela_dyn->add_symbolless_global_addend(gsym, dynrel, + got, off, 0); + } + } } else if (tls_type == tls::TLSOPT_TO_LE) { @@ -3429,17 +6272,26 @@ Target_powerpc::Scan::global( const tls::Tls_optimization tls_type = target->optimize_tls_ie(final); if (tls_type == tls::TLSOPT_NONE) { - Output_data_got_powerpc* got - = target->got_section(symtab, layout); - if (!gsym->final_value_is_known() - && (gsym->is_from_dynobj() - || gsym->is_undefined() - || gsym->is_preemptible())) - got->add_global_with_rel(gsym, GOT_TYPE_TPREL, - target->rela_dyn_section(layout), - elfcpp::R_POWERPC_TPREL); - else - got->add_global_tls(gsym, GOT_TYPE_TPREL); + if (!gsym->has_got_offset(GOT_TYPE_TPREL)) + { + Output_data_got_powerpc* got + = target->got_section(symtab, layout); + Reloc_section* rela_dyn = target->rela_dyn_section(layout); + if (gsym->is_undefined() + || gsym->is_from_dynobj()) + { + got->add_global_with_rel(gsym, GOT_TYPE_TPREL, rela_dyn, + elfcpp::R_POWERPC_TPREL); + } + else + { + unsigned int off = got->add_constant(0); + gsym->set_got_offset(GOT_TYPE_TPREL, off); + unsigned int dynrel = elfcpp::R_POWERPC_TPREL; + rela_dyn->add_symbolless_global_addend(gsym, dynrel, + got, off, 0); + } + } } else if (tls_type == tls::TLSOPT_TO_LE) { @@ -3454,6 +6306,21 @@ Target_powerpc::Scan::global( unsupported_reloc_global(object, r_type, gsym); break; } + + switch (r_type) + { + case elfcpp::R_POWERPC_GOT_TLSLD16: + case elfcpp::R_POWERPC_GOT_TLSGD16: + case elfcpp::R_POWERPC_GOT_TPREL16: + case elfcpp::R_POWERPC_GOT_DTPREL16: + case elfcpp::R_POWERPC_GOT16: + case elfcpp::R_PPC64_GOT16_DS: + case elfcpp::R_PPC64_TOC16: + case elfcpp::R_PPC64_TOC16_DS: + ppc_object->set_has_small_toc_reloc(); + default: + break; + } } // Process relocations for gc. @@ -3491,7 +6358,7 @@ Target_powerpc::gc_process_relocs( typename Powerpc_relobj::Section_refs::iterator s; for (s = p->second.begin(); s != p->second.end(); ++s) { - Object* src_obj = s->first; + Relobj* src_obj = s->first; unsigned int src_indx = s->second; symtab->gc()->add_reference(src_obj, src_indx, ppc_object, dst_indx); @@ -3499,6 +6366,7 @@ Target_powerpc::gc_process_relocs( p->second.clear(); } ppc_object->access_from_map()->clear(); + ppc_object->process_gc_mark(symtab); // Don't look at .opd relocs as .opd will reference everything. return; } @@ -3527,15 +6395,18 @@ template void Target_powerpc::do_gc_add_reference( Symbol_table* symtab, - Object* src_obj, + Relobj* src_obj, unsigned int src_shndx, - Object* dst_obj, + Relobj* dst_obj, unsigned int dst_shndx, Address dst_off) const { + if (size != 64 || dst_obj->is_dynamic()) + return; + Powerpc_relobj* ppc_object = static_cast*>(dst_obj); - if (size == 64 && dst_shndx == ppc_object->opd_shndx()) + if (dst_shndx != 0 && dst_shndx == ppc_object->opd_shndx()) { if (ppc_object->opd_valid()) { @@ -3567,14 +6438,163 @@ Target_powerpc::do_gc_mark_symbol( = static_cast*>(sym->object()); bool is_ordinary; unsigned int shndx = sym->shndx(&is_ordinary); - if (is_ordinary && shndx == ppc_object->opd_shndx()) + if (is_ordinary && shndx != 0 && shndx == ppc_object->opd_shndx()) { Sized_symbol* gsym = symtab->get_sized_symbol(sym); Address dst_off = gsym->value(); - unsigned int dst_indx = ppc_object->get_opd_ent(dst_off); - symtab->gc()->worklist().push(Section_id(ppc_object, dst_indx)); + if (ppc_object->opd_valid()) + { + unsigned int dst_indx = ppc_object->get_opd_ent(dst_off); + symtab->gc()->worklist().push_back(Section_id(ppc_object, + dst_indx)); + } + else + ppc_object->add_gc_mark(dst_off); + } + } +} + +// For a symbol location in .opd, set LOC to the location of the +// function entry. + +template +void +Target_powerpc::do_function_location( + Symbol_location* loc) const +{ + if (size == 64 && loc->shndx != 0) + { + if (loc->object->is_dynamic()) + { + Powerpc_dynobj* ppc_object + = static_cast*>(loc->object); + if (loc->shndx == ppc_object->opd_shndx()) + { + Address dest_off; + Address off = loc->offset - ppc_object->opd_address(); + loc->shndx = ppc_object->get_opd_ent(off, &dest_off); + loc->offset = dest_off; + } + } + else + { + const Powerpc_relobj* ppc_object + = static_cast*>(loc->object); + if (loc->shndx == ppc_object->opd_shndx()) + { + Address dest_off; + loc->shndx = ppc_object->get_opd_ent(loc->offset, &dest_off); + loc->offset = dest_off; + } + } + } +} + +// FNOFFSET in section SHNDX in OBJECT is the start of a function +// compiled with -fsplit-stack. The function calls non-split-stack +// code. Change the function to ensure it has enough stack space to +// call some random function. + +template +void +Target_powerpc::do_calls_non_split( + Relobj* object, + unsigned int shndx, + section_offset_type fnoffset, + section_size_type fnsize, + unsigned char* view, + section_size_type view_size, + std::string* from, + std::string* to) const +{ + // 32-bit not supported. + if (size == 32) + { + // warn + Target::do_calls_non_split(object, shndx, fnoffset, fnsize, + view, view_size, from, to); + return; + } + + // The function always starts with + // ld %r0,-0x7000-64(%r13) # tcbhead_t.__private_ss + // addis %r12,%r1,-allocate@ha + // addi %r12,%r12,-allocate@l + // cmpld %r12,%r0 + // but note that the addis or addi may be replaced with a nop + + unsigned char *entry = view + fnoffset; + uint32_t insn = elfcpp::Swap<32, big_endian>::readval(entry); + + if ((insn & 0xffff0000) == addis_2_12) + { + /* Skip ELFv2 global entry code. */ + entry += 8; + insn = elfcpp::Swap<32, big_endian>::readval(entry); + } + + unsigned char *pinsn = entry; + bool ok = false; + const uint32_t ld_private_ss = 0xe80d8fc0; + if (insn == ld_private_ss) + { + int32_t allocate = 0; + while (1) + { + pinsn += 4; + insn = elfcpp::Swap<32, big_endian>::readval(pinsn); + if ((insn & 0xffff0000) == addis_12_1) + allocate += (insn & 0xffff) << 16; + else if ((insn & 0xffff0000) == addi_12_1 + || (insn & 0xffff0000) == addi_12_12) + allocate += ((insn & 0xffff) ^ 0x8000) - 0x8000; + else if (insn != nop) + break; + } + if (insn == cmpld_7_12_0 && pinsn == entry + 12) + { + int extra = parameters->options().split_stack_adjust_size(); + allocate -= extra; + if (allocate >= 0 || extra < 0) + { + object->error(_("split-stack stack size overflow at " + "section %u offset %0zx"), + shndx, static_cast(fnoffset)); + return; + } + pinsn = entry + 4; + insn = addis_12_1 | (((allocate + 0x8000) >> 16) & 0xffff); + if (insn != addis_12_1) + { + elfcpp::Swap<32, big_endian>::writeval(pinsn, insn); + pinsn += 4; + insn = addi_12_12 | (allocate & 0xffff); + if (insn != addi_12_12) + { + elfcpp::Swap<32, big_endian>::writeval(pinsn, insn); + pinsn += 4; + } + } + else + { + insn = addi_12_1 | (allocate & 0xffff); + elfcpp::Swap<32, big_endian>::writeval(pinsn, insn); + pinsn += 4; + } + if (pinsn != entry + 12) + elfcpp::Swap<32, big_endian>::writeval(pinsn, nop); + + ok = true; } } + + if (!ok) + { + if (!object->has_no_split_stack()) + object->error(_("failed to match split-stack sequence at " + "section %u offset %0zx"), + shndx, static_cast(fnoffset)); + } } // Scan relocations for a section. @@ -3604,28 +6624,6 @@ Target_powerpc::scan_relocs( return; } - if (size == 32) - { - static Output_data_space* sdata; - - // Define _SDA_BASE_ at the start of the .sdata section. - if (sdata == NULL) - { - // layout->find_output_section(".sdata") == NULL - sdata = new Output_data_space(4, "** sdata"); - Output_section* os - = layout->add_output_section_data(".sdata", 0, - elfcpp::SHF_ALLOC - | elfcpp::SHF_WRITE, - sdata, ORDER_SMALL_DATA, false); - symtab->define_in_output_data("_SDA_BASE_", NULL, - Symbol_table::PREDEFINED, - os, 32768, 0, elfcpp::STT_OBJECT, - elfcpp::STB_LOCAL, elfcpp::STV_HIDDEN, - 0, false, false); - } - } - gold::scan_relocs( symtab, layout, @@ -3658,17 +6656,65 @@ class Global_symbol_visitor_opd || !sym->in_real_elf()) return; - Powerpc_relobj<64, big_endian>* symobj - = static_cast*>(sym->object()); - if (symobj->is_dynamic() - || symobj->opd_shndx() == 0) - return; + if (sym->object()->is_dynamic()) + return; + + Powerpc_relobj<64, big_endian>* symobj + = static_cast*>(sym->object()); + if (symobj->opd_shndx() == 0) + return; + + bool is_ordinary; + unsigned int shndx = sym->shndx(&is_ordinary); + if (shndx == symobj->opd_shndx() + && symobj->get_opd_discard(sym->value())) + { + sym->set_undefined(); + sym->set_visibility(elfcpp::STV_DEFAULT); + sym->set_is_defined_in_discarded_section(); + sym->set_symtab_index(-1U); + } + } +}; + +template +void +Target_powerpc::define_save_restore_funcs( + Layout* layout, + Symbol_table* symtab) +{ + if (size == 64) + { + Output_data_save_res<64, big_endian>* savres + = new Output_data_save_res<64, big_endian>(symtab); + layout->add_output_section_data(".text", elfcpp::SHT_PROGBITS, + elfcpp::SHF_ALLOC | elfcpp::SHF_EXECINSTR, + savres, ORDER_TEXT, false); + } +} + +// Sort linker created .got section first (for the header), then input +// sections belonging to files using small model code. - bool is_ordinary; - unsigned int shndx = sym->shndx(&is_ordinary); - if (shndx == symobj->opd_shndx() - && symobj->get_opd_discard(sym->value())) - sym->set_symtab_index(-1U); +template +class Sort_toc_sections +{ + public: + bool + operator()(const Output_section::Input_section& is1, + const Output_section::Input_section& is2) const + { + if (!is1.is_input_section() && is2.is_input_section()) + return true; + bool small1 + = (is1.is_input_section() + && (static_cast*>(is1.relobj()) + ->has_small_toc_reloc())); + bool small2 + = (is2.is_input_section() + && (static_cast*>(is2.relobj()) + ->has_small_toc_reloc())); + return small1 && !small2; } }; @@ -3715,6 +6761,26 @@ Target_powerpc::do_finalize_sections( { typedef Global_symbol_visitor_opd Symbol_visitor; symtab->for_all_symbols<64, Symbol_visitor>(Symbol_visitor()); + + if (!parameters->options().relocatable()) + { + this->define_save_restore_funcs(layout, symtab); + + // Annoyingly, we need to make these sections now whether or + // not we need them. If we delay until do_relax then we + // need to mess with the relaxation machinery checkpointing. + this->got_section(symtab, layout); + this->make_brlt_section(layout); + + if (parameters->options().toc_sort()) + { + Output_section* os = this->got_->output_section(); + if (os != NULL && os->input_sections().size() > 1) + std::stable_sort(os->input_sections().begin(), + os->input_sections().end(), + Sort_toc_sections()); + } + } } // Fill in some more dynamic tags. @@ -3743,8 +6809,7 @@ Target_powerpc::do_finalize_sections( this->glink_->finalize_data_size(); odyn->add_section_plus_offset(elfcpp::DT_PPC64_GLINK, this->glink_, - (this->glink_->pltresolve() - + this->glink_->pltresolve_size + (this->glink_->pltresolve_size - 32)); } } @@ -3756,41 +6821,82 @@ Target_powerpc::do_finalize_sections( this->copy_relocs_.emit(this->rela_dyn_section(layout)); } +// Return TRUE iff INSN is one we expect on a _LO variety toc/got +// reloc. + +static bool +ok_lo_toc_insn(uint32_t insn) +{ + return ((insn & (0x3f << 26)) == 14u << 26 /* addi */ + || (insn & (0x3f << 26)) == 32u << 26 /* lwz */ + || (insn & (0x3f << 26)) == 34u << 26 /* lbz */ + || (insn & (0x3f << 26)) == 36u << 26 /* stw */ + || (insn & (0x3f << 26)) == 38u << 26 /* stb */ + || (insn & (0x3f << 26)) == 40u << 26 /* lhz */ + || (insn & (0x3f << 26)) == 42u << 26 /* lha */ + || (insn & (0x3f << 26)) == 44u << 26 /* sth */ + || (insn & (0x3f << 26)) == 46u << 26 /* lmw */ + || (insn & (0x3f << 26)) == 47u << 26 /* stmw */ + || (insn & (0x3f << 26)) == 48u << 26 /* lfs */ + || (insn & (0x3f << 26)) == 50u << 26 /* lfd */ + || (insn & (0x3f << 26)) == 52u << 26 /* stfs */ + || (insn & (0x3f << 26)) == 54u << 26 /* stfd */ + || ((insn & (0x3f << 26)) == 58u << 26 /* lwa,ld,lmd */ + && (insn & 3) != 1) + || ((insn & (0x3f << 26)) == 62u << 26 /* std, stmd */ + && ((insn & 3) == 0 || (insn & 3) == 3)) + || (insn & (0x3f << 26)) == 12u << 26 /* addic */); +} + // Return the value to use for a branch relocation. template -typename elfcpp::Elf_types::Elf_Addr +bool Target_powerpc::symval_for_branch( - Address value, + const Symbol_table* symtab, const Sized_symbol* gsym, Powerpc_relobj* object, + Address *value, unsigned int *dest_shndx) { + if (size == 32 || this->abiversion() >= 2) + gold_unreachable(); *dest_shndx = 0; - if (size == 32) - return value; // If the symbol is defined in an opd section, ie. is a function // descriptor, use the function descriptor code entry address Powerpc_relobj* symobj = object; + if (gsym != NULL + && gsym->source() != Symbol::FROM_OBJECT) + return true; if (gsym != NULL) symobj = static_cast*>(gsym->object()); unsigned int shndx = symobj->opd_shndx(); if (shndx == 0) - return value; + return true; Address opd_addr = symobj->get_output_section_offset(shndx); - gold_assert(opd_addr != invalid_address); - opd_addr += symobj->output_section(shndx)->address(); - if (value >= opd_addr && value < opd_addr + symobj->section_size(shndx)) + if (opd_addr == invalid_address) + return true; + opd_addr += symobj->output_section_address(shndx); + if (*value >= opd_addr && *value < opd_addr + symobj->section_size(shndx)) { Address sec_off; - *dest_shndx = symobj->get_opd_ent(value - opd_addr, &sec_off); + *dest_shndx = symobj->get_opd_ent(*value - opd_addr, &sec_off); + if (symtab->is_section_folded(symobj, *dest_shndx)) + { + Section_id folded + = symtab->icf()->get_folded_section(symobj, *dest_shndx); + symobj = static_cast*>(folded.first); + *dest_shndx = folded.second; + } Address sec_addr = symobj->get_output_section_offset(*dest_shndx); - gold_assert(sec_addr != invalid_address); + if (sec_addr == invalid_address) + return false; + sec_addr += symobj->output_section(*dest_shndx)->address(); - value = sec_addr + sec_off; + *value = sec_addr + sec_off; } - return value; + return true; } // Perform a relocation. @@ -3810,45 +6916,80 @@ Target_powerpc::Relocate::relocate( Address address, section_size_type view_size) { + if (view == NULL) + return true; - bool is_tls_call = ((r_type == elfcpp::R_POWERPC_REL24 - || r_type == elfcpp::R_PPC_PLTREL24) - && gsym != NULL - && strcmp(gsym->name(), "__tls_get_addr") == 0); - enum skip_tls last_tls = this->call_tls_get_addr_; - this->call_tls_get_addr_ = CALL_NOT_EXPECTED; - if (is_tls_call) - { - if (last_tls == CALL_NOT_EXPECTED) - gold_error_at_location(relinfo, relnum, rela.get_r_offset(), - _("__tls_get_addr call lacks marker reloc")); - else if (last_tls == CALL_SKIP) - return false; + switch (this->maybe_skip_tls_get_addr_call(r_type, gsym)) + { + case Track_tls::NOT_EXPECTED: + gold_error_at_location(relinfo, relnum, rela.get_r_offset(), + _("__tls_get_addr call lacks marker reloc")); + break; + case Track_tls::EXPECTED: + // We have already complained. + break; + case Track_tls::SKIP: + return true; + case Track_tls::NORMAL: + break; } - else if (last_tls != CALL_NOT_EXPECTED) - gold_error_at_location(relinfo, relnum, rela.get_r_offset(), - _("missing expected __tls_get_addr call")); typedef Powerpc_relocate_functions Reloc; typedef typename elfcpp::Swap<32, big_endian>::Valtype Insn; Powerpc_relobj* const object = static_cast*>(relinfo->object); Address value = 0; - bool has_plt_value = false; + bool has_stub_value = false; unsigned int r_sym = elfcpp::elf_r_sym(rela.get_r_info()); - if (gsym != NULL - ? use_plt_offset(gsym, Scan::get_reference_flags(r_type)) - : object->local_has_plt_offset(r_sym)) + if ((gsym != NULL + ? gsym->use_plt_offset(Scan::get_reference_flags(r_type, target)) + : object->local_has_plt_offset(r_sym)) + && (!psymval->is_ifunc_symbol() + || Scan::reloc_needs_plt_for_ifunc(target, object, r_type, false))) { - const Output_data_glink* glink - = target->glink_section(); - unsigned int glink_index; - if (gsym != NULL) - glink_index = glink->find_entry(object, gsym, rela); + if (size == 64 + && gsym != NULL + && target->abiversion() >= 2 + && !parameters->options().output_is_position_independent() + && !is_branch_reloc(r_type)) + { + Address off = target->glink_section()->find_global_entry(gsym); + if (off != invalid_address) + { + value = target->glink_section()->global_entry_address() + off; + has_stub_value = true; + } + } else - glink_index = glink->find_entry(object, r_sym, rela); - value = glink->address() + glink_index * glink->glink_entry_size(); - has_plt_value = true; + { + Stub_table* stub_table + = object->stub_table(relinfo->data_shndx); + if (stub_table == NULL) + { + // This is a ref from a data section to an ifunc symbol. + if (target->stub_tables().size() != 0) + stub_table = target->stub_tables()[0]; + } + if (stub_table != NULL) + { + Address off; + if (gsym != NULL) + off = stub_table->find_plt_call_entry(object, gsym, r_type, + rela.get_r_addend()); + else + off = stub_table->find_plt_call_entry(object, r_sym, r_type, + rela.get_r_addend()); + if (off != invalid_address) + { + value = stub_table->stub_address() + off; + has_stub_value = true; + } + } + } + // We don't care too much about bogus debug references to + // non-local functions, but otherwise there had better be a plt + // call stub or global entry stub as appropriate. + gold_assert(has_stub_value || !(os->flags() & elfcpp::SHF_ALLOC)); } if (r_type == elfcpp::R_POWERPC_GOT16 @@ -3879,7 +7020,7 @@ Target_powerpc::Relocate::relocate( else if (gsym != NULL && (r_type == elfcpp::R_POWERPC_REL24 || r_type == elfcpp::R_PPC_PLTREL24) - && has_plt_value) + && has_stub_value) { if (size == 64) { @@ -3894,7 +7035,8 @@ Target_powerpc::Relocate::relocate( && (insn2 == nop || insn2 == cror_15_15_15 || insn2 == cror_31_31_31)) { - elfcpp::Swap<32, big_endian>::writeval(wv + 1, ld_2_1 + 40); + elfcpp::Swap<32, big_endian>:: + writeval(wv + 1, ld_2_1 + target->stk_toc()); can_plt_call = true; } } @@ -3909,20 +7051,26 @@ Target_powerpc::Relocate::relocate( } if (!can_plt_call) { - // This is not an error in one special case: A self - // call. It isn't possible to cheaply verify we have - // such a call so just check for a call to the same - // section. + // g++ as of 20130507 emits self-calls without a + // following nop. This is arguably wrong since we have + // conflicting information. On the one hand a global + // symbol and on the other a local call sequence, but + // don't error for this special case. + // It isn't possible to cheaply verify we have exactly + // such a call. Allow all calls to the same section. bool ok = false; Address code = value; if (gsym->source() == Symbol::FROM_OBJECT && gsym->object() == object) { - Address addend = rela.get_r_addend(); - unsigned int dest_shndx; - Address opdent = psymval->value(object, addend); - code = target->symval_for_branch(opdent, gsym, object, - &dest_shndx); + unsigned int dest_shndx = 0; + if (target->abiversion() < 2) + { + Address addend = rela.get_r_addend(); + code = psymval->value(object, addend); + target->symval_for_branch(relinfo->symtab, gsym, object, + &code, &dest_shndx); + } bool is_ordinary; if (dest_shndx == 0) dest_shndx = gsym->shndx(&is_ordinary); @@ -3989,9 +7137,12 @@ Target_powerpc::Relocate::relocate( || r_type == elfcpp::R_POWERPC_GOT_TLSGD16_LO) { Insn* iview = reinterpret_cast(view - 2 * big_endian); - Insn insn = addis_3_13; + Insn insn = elfcpp::Swap<32, big_endian>::readval(iview); + insn &= (1 << 26) - (1 << 21); // extract rt if (size == 32) - insn = addis_3_2; + insn |= addis_0_2; + else + insn |= addis_0_13; elfcpp::Swap<32, big_endian>::writeval(iview, insn); r_type = elfcpp::R_POWERPC_TPREL16_HA; value = psymval->value(object, rela.get_r_addend()); @@ -4024,9 +7175,12 @@ Target_powerpc::Relocate::relocate( || r_type == elfcpp::R_POWERPC_GOT_TLSLD16_LO) { Insn* iview = reinterpret_cast(view - 2 * big_endian); - Insn insn = addis_3_13; + Insn insn = elfcpp::Swap<32, big_endian>::readval(iview); + insn &= (1 << 26) - (1 << 21); // extract rt if (size == 32) - insn = addis_3_2; + insn |= addis_0_2; + else + insn |= addis_0_13; elfcpp::Swap<32, big_endian>::writeval(iview, insn); r_type = elfcpp::R_POWERPC_TPREL16_HA; value = dtp_offset; @@ -4114,7 +7268,7 @@ Target_powerpc::Relocate::relocate( { // Second instruction of a global dynamic sequence, // the __tls_get_addr call - this->call_tls_get_addr_ = CALL_EXPECTED; + this->expect_tls_get_addr_call(relinfo, relnum, rela.get_r_offset()); const bool final = gsym == NULL || gsym->final_value_is_known(); const tls::Tls_optimization tls_type = target->optimize_tls_gd(final); if (tls_type != tls::TLSOPT_NONE) @@ -4137,7 +7291,7 @@ Target_powerpc::Relocate::relocate( view += 2 * big_endian; value = psymval->value(object, rela.get_r_addend()); } - this->call_tls_get_addr_ = CALL_SKIP; + this->skip_next_tls_get_addr_call(); } } else if ((size == 64 && r_type == elfcpp::R_PPC64_TLSLD) @@ -4145,14 +7299,14 @@ Target_powerpc::Relocate::relocate( { // Second instruction of a local dynamic sequence, // the __tls_get_addr call - this->call_tls_get_addr_ = CALL_EXPECTED; + this->expect_tls_get_addr_call(relinfo, relnum, rela.get_r_offset()); const tls::Tls_optimization tls_type = target->optimize_tls_ld(); if (tls_type == tls::TLSOPT_TO_LE) { Insn* iview = reinterpret_cast(view); Insn insn = addi_3_3; elfcpp::Swap<32, big_endian>::writeval(iview, insn); - this->call_tls_get_addr_ = CALL_SKIP; + this->skip_next_tls_get_addr_call(); r_type = elfcpp::R_POWERPC_TPREL16_LO; view += 2 * big_endian; value = dtp_offset; @@ -4176,15 +7330,45 @@ Target_powerpc::Relocate::relocate( value = psymval->value(object, rela.get_r_addend()); } } - else if (!has_plt_value) + else if (!has_stub_value) { Address addend = 0; - unsigned int dest_shndx; - if (r_type != elfcpp::R_PPC_PLTREL24) + if (!(size == 32 && r_type == elfcpp::R_PPC_PLTREL24)) addend = rela.get_r_addend(); value = psymval->value(object, addend); if (size == 64 && is_branch_reloc(r_type)) - value = target->symval_for_branch(value, gsym, object, &dest_shndx); + { + if (target->abiversion() >= 2) + { + if (gsym != NULL) + value += object->ppc64_local_entry_offset(gsym); + else + value += object->ppc64_local_entry_offset(r_sym); + } + else + { + unsigned int dest_shndx; + target->symval_for_branch(relinfo->symtab, gsym, object, + &value, &dest_shndx); + } + } + Address max_branch_offset = max_branch_delta(r_type); + if (max_branch_offset != 0 + && value - address + max_branch_offset >= 2 * max_branch_offset) + { + Stub_table* stub_table + = object->stub_table(relinfo->data_shndx); + if (stub_table != NULL) + { + Address off = stub_table->find_long_branch_entry(object, value); + if (off != invalid_address) + { + value = (stub_table->stub_address() + stub_table->plt_size() + + off); + has_stub_value = true; + } + } + } } switch (r_type) @@ -4227,8 +7411,10 @@ Target_powerpc::Relocate::relocate( case elfcpp::R_PPC64_TPREL16_DS: case elfcpp::R_PPC64_TPREL16_LO_DS: + case elfcpp::R_PPC64_TPREL16_HIGH: + case elfcpp::R_PPC64_TPREL16_HIGHA: if (size != 64) - // R_PPC_TLSGD and R_PPC_TLSLD + // R_PPC_TLSGD, R_PPC_TLSLD, R_PPC_EMB_RELST_LO, R_PPC_EMB_RELST_HI break; case elfcpp::R_POWERPC_TPREL16: case elfcpp::R_POWERPC_TPREL16_LO: @@ -4258,10 +7444,19 @@ Target_powerpc::Relocate::relocate( case elfcpp::R_POWERPC_DTPREL16_HI: case elfcpp::R_POWERPC_DTPREL16_HA: case elfcpp::R_POWERPC_DTPREL: + case elfcpp::R_PPC64_DTPREL16_HIGH: + case elfcpp::R_PPC64_DTPREL16_HIGHA: // tls symbol values are relative to tls_segment()->vaddr() value -= dtp_offset; break; + case elfcpp::R_PPC64_ADDR64_LOCAL: + if (gsym != NULL) + value += object->ppc64_local_entry_offset(gsym); + else + value += object->ppc64_local_entry_offset(r_sym); + break; + default: break; } @@ -4305,7 +7500,77 @@ Target_powerpc::Relocate::relocate( break; } + if (size == 64) + { + // Multi-instruction sequences that access the TOC can be + // optimized, eg. addis ra,r2,0; addi rb,ra,x; + // to nop; addi rb,r2,x; + switch (r_type) + { + default: + break; + + case elfcpp::R_POWERPC_GOT_TLSLD16_HA: + case elfcpp::R_POWERPC_GOT_TLSGD16_HA: + case elfcpp::R_POWERPC_GOT_TPREL16_HA: + case elfcpp::R_POWERPC_GOT_DTPREL16_HA: + case elfcpp::R_POWERPC_GOT16_HA: + case elfcpp::R_PPC64_TOC16_HA: + if (parameters->options().toc_optimize()) + { + Insn* iview = reinterpret_cast(view - 2 * big_endian); + Insn insn = elfcpp::Swap<32, big_endian>::readval(iview); + if ((insn & ((0x3f << 26) | 0x1f << 16)) + != ((15u << 26) | (2 << 16)) /* addis rt,2,imm */) + gold_error_at_location(relinfo, relnum, rela.get_r_offset(), + _("toc optimization is not supported " + "for %#08x instruction"), insn); + else if (value + 0x8000 < 0x10000) + { + elfcpp::Swap<32, big_endian>::writeval(iview, nop); + return true; + } + } + break; + + case elfcpp::R_POWERPC_GOT_TLSLD16_LO: + case elfcpp::R_POWERPC_GOT_TLSGD16_LO: + case elfcpp::R_POWERPC_GOT_TPREL16_LO: + case elfcpp::R_POWERPC_GOT_DTPREL16_LO: + case elfcpp::R_POWERPC_GOT16_LO: + case elfcpp::R_PPC64_GOT16_LO_DS: + case elfcpp::R_PPC64_TOC16_LO: + case elfcpp::R_PPC64_TOC16_LO_DS: + if (parameters->options().toc_optimize()) + { + Insn* iview = reinterpret_cast(view - 2 * big_endian); + Insn insn = elfcpp::Swap<32, big_endian>::readval(iview); + if (!ok_lo_toc_insn(insn)) + gold_error_at_location(relinfo, relnum, rela.get_r_offset(), + _("toc optimization is not supported " + "for %#08x instruction"), insn); + else if (value + 0x8000 < 0x10000) + { + if ((insn & (0x3f << 26)) == 12u << 26 /* addic */) + { + // Transform addic to addi when we change reg. + insn &= ~((0x3f << 26) | (0x1f << 16)); + insn |= (14u << 26) | (2 << 16); + } + else + { + insn &= ~(0x1f << 16); + insn |= 2 << 16; + } + elfcpp::Swap<32, big_endian>::writeval(iview, insn); + } + } + break; + } + } + typename Reloc::Overflow_check overflow = Reloc::CHECK_NONE; + elfcpp::Shdr shdr(relinfo->data_shdr); switch (r_type) { case elfcpp::R_POWERPC_ADDR32: @@ -4319,25 +7584,70 @@ Target_powerpc::Relocate::relocate( overflow = Reloc::CHECK_SIGNED; break; - case elfcpp::R_POWERPC_ADDR24: - case elfcpp::R_POWERPC_ADDR16: case elfcpp::R_POWERPC_UADDR16: - case elfcpp::R_PPC64_ADDR16_DS: - case elfcpp::R_POWERPC_ADDR14: - case elfcpp::R_POWERPC_ADDR14_BRTAKEN: - case elfcpp::R_POWERPC_ADDR14_BRNTAKEN: overflow = Reloc::CHECK_BITFIELD; break; - case elfcpp::R_POWERPC_REL24: - case elfcpp::R_PPC_PLTREL24: - case elfcpp::R_PPC_LOCAL24PC: + case elfcpp::R_POWERPC_ADDR16: + // We really should have three separate relocations, + // one for 16-bit data, one for insns with 16-bit signed fields, + // and one for insns with 16-bit unsigned fields. + overflow = Reloc::CHECK_BITFIELD; + if ((shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) != 0) + overflow = Reloc::CHECK_LOW_INSN; + break; + + case elfcpp::R_POWERPC_ADDR16_HI: + case elfcpp::R_POWERPC_ADDR16_HA: + case elfcpp::R_POWERPC_GOT16_HI: + case elfcpp::R_POWERPC_GOT16_HA: + case elfcpp::R_POWERPC_PLT16_HI: + case elfcpp::R_POWERPC_PLT16_HA: + case elfcpp::R_POWERPC_SECTOFF_HI: + case elfcpp::R_POWERPC_SECTOFF_HA: + case elfcpp::R_PPC64_TOC16_HI: + case elfcpp::R_PPC64_TOC16_HA: + case elfcpp::R_PPC64_PLTGOT16_HI: + case elfcpp::R_PPC64_PLTGOT16_HA: + case elfcpp::R_POWERPC_TPREL16_HI: + case elfcpp::R_POWERPC_TPREL16_HA: + case elfcpp::R_POWERPC_DTPREL16_HI: + case elfcpp::R_POWERPC_DTPREL16_HA: + case elfcpp::R_POWERPC_GOT_TLSGD16_HI: + case elfcpp::R_POWERPC_GOT_TLSGD16_HA: + case elfcpp::R_POWERPC_GOT_TLSLD16_HI: + case elfcpp::R_POWERPC_GOT_TLSLD16_HA: + case elfcpp::R_POWERPC_GOT_TPREL16_HI: + case elfcpp::R_POWERPC_GOT_TPREL16_HA: + case elfcpp::R_POWERPC_GOT_DTPREL16_HI: + case elfcpp::R_POWERPC_GOT_DTPREL16_HA: + case elfcpp::R_POWERPC_REL16_HI: + case elfcpp::R_POWERPC_REL16_HA: + if (size != 32) + overflow = Reloc::CHECK_HIGH_INSN; + break; + case elfcpp::R_POWERPC_REL16: case elfcpp::R_PPC64_TOC16: case elfcpp::R_POWERPC_GOT16: case elfcpp::R_POWERPC_SECTOFF: case elfcpp::R_POWERPC_TPREL16: case elfcpp::R_POWERPC_DTPREL16: + case elfcpp::R_POWERPC_GOT_TLSGD16: + case elfcpp::R_POWERPC_GOT_TLSLD16: + case elfcpp::R_POWERPC_GOT_TPREL16: + case elfcpp::R_POWERPC_GOT_DTPREL16: + overflow = Reloc::CHECK_LOW_INSN; + break; + + case elfcpp::R_POWERPC_ADDR24: + case elfcpp::R_POWERPC_ADDR14: + case elfcpp::R_POWERPC_ADDR14_BRTAKEN: + case elfcpp::R_POWERPC_ADDR14_BRNTAKEN: + case elfcpp::R_PPC64_ADDR16_DS: + case elfcpp::R_POWERPC_REL24: + case elfcpp::R_PPC_PLTREL24: + case elfcpp::R_PPC_LOCAL24PC: case elfcpp::R_PPC64_TPREL16_DS: case elfcpp::R_PPC64_DTPREL16_DS: case elfcpp::R_PPC64_TOC16_DS: @@ -4346,14 +7656,30 @@ Target_powerpc::Relocate::relocate( case elfcpp::R_POWERPC_REL14: case elfcpp::R_POWERPC_REL14_BRTAKEN: case elfcpp::R_POWERPC_REL14_BRNTAKEN: - case elfcpp::R_POWERPC_GOT_TLSGD16: - case elfcpp::R_POWERPC_GOT_TLSLD16: - case elfcpp::R_POWERPC_GOT_TPREL16: - case elfcpp::R_POWERPC_GOT_DTPREL16: overflow = Reloc::CHECK_SIGNED; break; } + if (overflow == Reloc::CHECK_LOW_INSN + || overflow == Reloc::CHECK_HIGH_INSN) + { + Insn* iview = reinterpret_cast(view - 2 * big_endian); + Insn insn = elfcpp::Swap<32, big_endian>::readval(iview); + + if ((insn & (0x3f << 26)) == 10u << 26 /* cmpli */) + overflow = Reloc::CHECK_BITFIELD; + else if (overflow == Reloc::CHECK_LOW_INSN + ? ((insn & (0x3f << 26)) == 28u << 26 /* andi */ + || (insn & (0x3f << 26)) == 24u << 26 /* ori */ + || (insn & (0x3f << 26)) == 26u << 26 /* xori */) + : ((insn & (0x3f << 26)) == 29u << 26 /* andis */ + || (insn & (0x3f << 26)) == 25u << 26 /* oris */ + || (insn & (0x3f << 26)) == 27u << 26 /* xoris */)) + overflow = Reloc::CHECK_UNSIGNED; + else + overflow = Reloc::CHECK_SIGNED; + } + typename Powerpc_relocate_functions::Status status = Powerpc_relocate_functions::STATUS_OK; switch (r_type) @@ -4362,12 +7688,12 @@ Target_powerpc::Relocate::relocate( case elfcpp::R_POWERPC_TLS: case elfcpp::R_POWERPC_GNU_VTINHERIT: case elfcpp::R_POWERPC_GNU_VTENTRY: - case elfcpp::R_PPC_EMB_MRKREF: break; case elfcpp::R_PPC64_ADDR64: case elfcpp::R_PPC64_REL64: case elfcpp::R_PPC64_TOC: + case elfcpp::R_PPC64_ADDR64_LOCAL: Reloc::addr64(view, value); break; @@ -4384,10 +7710,10 @@ Target_powerpc::Relocate::relocate( break; case elfcpp::R_POWERPC_ADDR32: - case elfcpp::R_POWERPC_REL32: status = Reloc::addr32(view, value, overflow); break; + case elfcpp::R_POWERPC_REL32: case elfcpp::R_POWERPC_UADDR32: status = Reloc::addr32_u(view, value, overflow); break; @@ -4401,8 +7727,11 @@ Target_powerpc::Relocate::relocate( case elfcpp::R_POWERPC_GOT_DTPREL16: case elfcpp::R_POWERPC_GOT_DTPREL16_LO: + case elfcpp::R_POWERPC_GOT_TPREL16: + case elfcpp::R_POWERPC_GOT_TPREL16_LO: if (size == 64) { + // On ppc64 these are all ds form status = Reloc::addr16_ds(view, value, overflow); break; } @@ -4415,7 +7744,6 @@ Target_powerpc::Relocate::relocate( case elfcpp::R_POWERPC_DTPREL16: case elfcpp::R_POWERPC_GOT_TLSGD16: case elfcpp::R_POWERPC_GOT_TLSLD16: - case elfcpp::R_POWERPC_GOT_TPREL16: case elfcpp::R_POWERPC_ADDR16_LO: case elfcpp::R_POWERPC_REL16_LO: case elfcpp::R_PPC64_TOC16_LO: @@ -4425,7 +7753,6 @@ Target_powerpc::Relocate::relocate( case elfcpp::R_POWERPC_DTPREL16_LO: case elfcpp::R_POWERPC_GOT_TLSGD16_LO: case elfcpp::R_POWERPC_GOT_TLSLD16_LO: - case elfcpp::R_POWERPC_GOT_TPREL16_LO: status = Reloc::addr16(view, value, overflow); break; @@ -4433,6 +7760,12 @@ Target_powerpc::Relocate::relocate( status = Reloc::addr16_u(view, value, overflow); break; + case elfcpp::R_PPC64_ADDR16_HIGH: + case elfcpp::R_PPC64_TPREL16_HIGH: + case elfcpp::R_PPC64_DTPREL16_HIGH: + if (size == 32) + // R_PPC_EMB_MRKREF, R_PPC_EMB_RELST_LO, R_PPC_EMB_RELST_HA + goto unsupp; case elfcpp::R_POWERPC_ADDR16_HI: case elfcpp::R_POWERPC_REL16_HI: case elfcpp::R_PPC64_TOC16_HI: @@ -4447,6 +7780,12 @@ Target_powerpc::Relocate::relocate( Reloc::addr16_hi(view, value); break; + case elfcpp::R_PPC64_ADDR16_HIGHA: + case elfcpp::R_PPC64_TPREL16_HIGHA: + case elfcpp::R_PPC64_DTPREL16_HIGHA: + if (size == 32) + // R_PPC_EMB_RELSEC16, R_PPC_EMB_RELST_HI, R_PPC_EMB_BIT_FLD + goto unsupp; case elfcpp::R_POWERPC_ADDR16_HA: case elfcpp::R_POWERPC_REL16_HA: case elfcpp::R_PPC64_TOC16_HA: @@ -4571,11 +7910,6 @@ Target_powerpc::Relocate::relocate( case elfcpp::R_PPC64_PLT16_LO_DS: case elfcpp::R_PPC64_PLTGOT16_DS: case elfcpp::R_PPC64_PLTGOT16_LO_DS: - case elfcpp::R_PPC_EMB_RELSEC16: - case elfcpp::R_PPC_EMB_RELST_LO: - case elfcpp::R_PPC_EMB_RELST_HI: - case elfcpp::R_PPC_EMB_RELST_HA: - case elfcpp::R_PPC_EMB_BIT_FLD: case elfcpp::R_PPC_EMB_RELSDA: case elfcpp::R_PPC_TOC16: default: @@ -4585,9 +7919,17 @@ Target_powerpc::Relocate::relocate( r_type); break; } - if (status != Powerpc_relocate_functions::STATUS_OK) - gold_error_at_location(relinfo, relnum, rela.get_r_offset(), - _("relocation overflow")); + if (status != Powerpc_relocate_functions::STATUS_OK + && (has_stub_value + || !(gsym != NULL + && gsym->is_undefined() + && is_branch_reloc(r_type)))) + { + gold_error_at_location(relinfo, relnum, rela.get_r_offset(), + _("relocation overflow")); + if (has_stub_value) + gold_info(_("try relinking with a smaller --stub-group-size")); + } return true; } @@ -4610,48 +7952,13 @@ Target_powerpc::relocate_section( { typedef Target_powerpc Powerpc; typedef typename Target_powerpc::Relocate Powerpc_relocate; + typedef typename Target_powerpc::Relocate_comdat_behavior + Powerpc_comdat_behavior; gold_assert(sh_type == elfcpp::SHT_RELA); - unsigned char *opd_rel = NULL; - Powerpc_relobj* const object - = static_cast*>(relinfo->object); - if (size == 64 - && relinfo->data_shndx == object->opd_shndx()) - { - // Rewrite opd relocs, omitting those for discarded sections - // to silence gold::relocate_section errors. - const int reloc_size - = Reloc_types::reloc_size; - opd_rel = new unsigned char[reloc_count * reloc_size]; - const unsigned char* rrel = prelocs; - unsigned char* wrel = opd_rel; - - for (size_t i = 0; - i < reloc_count; - ++i, rrel += reloc_size, wrel += reloc_size) - { - typename Reloc_types::Reloc - reloc(rrel); - typename elfcpp::Elf_types::Elf_WXword r_info - = reloc.get_r_info(); - unsigned int r_type = elfcpp::elf_r_type(r_info); - Address r_off = reloc.get_r_offset(); - if (r_type == elfcpp::R_PPC64_TOC) - r_off -= 8; - bool is_discarded = object->get_opd_discard(r_off); - - // Reloc number is reported in some errors, so keep all relocs. - if (is_discarded) - memset(wrel, 0, reloc_size); - else - memcpy(wrel, rrel, reloc_size); - } - prelocs = opd_rel; - } - gold::relocate_section( + Powerpc_relocate, Powerpc_comdat_behavior>( relinfo, this, prelocs, @@ -4662,9 +7969,6 @@ Target_powerpc::relocate_section( address, view_size, reloc_symbol_changes); - - if (opd_rel != NULL) - delete[] opd_rel; } class Powerpc_scan_relocatable_reloc @@ -4748,7 +8052,7 @@ Target_powerpc::relocate_relocs( const unsigned char* prelocs, size_t reloc_count, Output_section* output_section, - off_t offset_in_output_section, + typename elfcpp::Elf_types::Elf_Off offset_in_output_section, const Relocatable_relocs* rr, unsigned char*, Address view_address, @@ -5031,7 +8335,7 @@ Target_powerpc::relocate_relocs( == reloc_view_size); } -// Return the value to use for a dynamic which requires special +// Return the value to use for a dynamic symbol which requires special // treatment. This is how we support equality comparisons of function // pointers across shared library boundaries, as described in the // processor specific ABI supplement. @@ -5043,12 +8347,22 @@ Target_powerpc::do_dynsym_value(const Symbol* gsym) const if (size == 32) { gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset()); - const Output_data_glink* glink = this->glink_section(); - unsigned int glink_index = glink->find_entry(gsym); - return glink->address() + glink_index * glink->glink_entry_size(); + for (typename Stub_tables::const_iterator p = this->stub_tables_.begin(); + p != this->stub_tables_.end(); + ++p) + { + Address off = (*p)->find_plt_call_entry(gsym); + if (off != invalid_address) + return (*p)->stub_address() + off; + } } - else - gold_unreachable(); + else if (this->abiversion() >= 2) + { + Address off = this->glink_section()->find_global_entry(gsym); + if (off != invalid_address) + return this->glink_section()->global_entry_address() + off; + } + gold_unreachable(); } // Return the PLT address to use for a local symbol. @@ -5062,13 +8376,17 @@ Target_powerpc::do_plt_address_for_local( { const Sized_relobj* relobj = static_cast*>(object); - const Output_data_glink* glink = this->glink_section(); - unsigned int glink_index = glink->find_entry(relobj->sized_relobj(), - symndx); - return glink->address() + glink_index * glink->glink_entry_size(); + for (typename Stub_tables::const_iterator p = this->stub_tables_.begin(); + p != this->stub_tables_.end(); + ++p) + { + Address off = (*p)->find_plt_call_entry(relobj->sized_relobj(), + symndx); + if (off != invalid_address) + return (*p)->stub_address() + off; + } } - else - gold_unreachable(); + gold_unreachable(); } // Return the PLT address to use for a global symbol. @@ -5079,12 +8397,22 @@ Target_powerpc::do_plt_address_for_global( { if (size == 32) { - const Output_data_glink* glink = this->glink_section(); - unsigned int glink_index = glink->find_entry(gsym); - return glink->address() + glink_index * glink->glink_entry_size(); + for (typename Stub_tables::const_iterator p = this->stub_tables_.begin(); + p != this->stub_tables_.end(); + ++p) + { + Address off = (*p)->find_plt_call_entry(gsym); + if (off != invalid_address) + return (*p)->stub_address() + off; + } } - else - gold_unreachable(); + else if (this->abiversion() >= 2) + { + Address off = this->glink_section()->find_global_entry(gsym); + if (off != invalid_address) + return this->glink_section()->global_entry_address() + off; + } + gold_unreachable(); } // Return the offset to use for the GOT_INDX'th got entry which is @@ -5157,7 +8485,8 @@ class Target_selector_powerpc : public Target_selector { public: Target_selector_powerpc() - : Target_selector(elfcpp::EM_NONE, size, big_endian, + : Target_selector(size == 64 ? elfcpp::EM_PPC64 : elfcpp::EM_PPC, + size, big_endian, (size == 64 ? (big_endian ? "elf64-powerpc" : "elf64-powerpcle") : (big_endian ? "elf32-powerpc" : "elf32-powerpcle")), @@ -5166,28 +8495,6 @@ public: : (big_endian ? "elf32ppc" : "elf32lppc"))) { } - virtual Target* - do_recognize(Input_file*, off_t, int machine, int, int) - { - switch (size) - { - case 64: - if (machine != elfcpp::EM_PPC64) - return NULL; - break; - - case 32: - if (machine != elfcpp::EM_PPC) - return NULL; - break; - - default: - return NULL; - } - - return this->instantiate_target(); - } - virtual Target* do_instantiate_target() { return new Target_powerpc(); } @@ -5198,4 +8505,17 @@ Target_selector_powerpc<32, false> target_selector_ppc32le; Target_selector_powerpc<64, true> target_selector_ppc64; Target_selector_powerpc<64, false> target_selector_ppc64le; +// Instantiate these constants for -O0 +template +const int Output_data_glink::pltresolve_size; +template +const typename Output_data_glink::Address + Output_data_glink::invalid_address; +template +const typename Stub_table::Address + Stub_table::invalid_address; +template +const typename Target_powerpc::Address + Target_powerpc::invalid_address; + } // End anonymous namespace.