X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=include%2FChangeLog;h=8b25ce724dcee0f6d800cd0f3a3ac47a57d1e6c4;hb=de837d77bca30483e8e926044fa497e3d49f7972;hp=96ddcc75695fdc045c35742f3869c35c06876fce;hpb=a4ddf8dc72f0ac10c3459a91949eb1bdb07ed10d;p=deliverable%2Fbinutils-gdb.git diff --git a/include/ChangeLog b/include/ChangeLog index 96ddcc7569..8b25ce724d 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,730 +1,532 @@ -2016-11-07 Jason Merrill +2017-07-02 Jan Kratochvil - * demangle.h (enum demangle_component_type): Add - DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC. + * dwarf2.def (DW_IDX_compile_unit, DW_IDX_type_unit, DW_IDX_die_offset) + (DW_IDX_parent, DW_IDX_type_hash, DW_IDX_lo_user, DW_IDX_hi_user) + (DW_IDX_GNU_internal, DW_IDX_GNU_external): New. + * dwarf2.h (DW_IDX, DW_IDX_DUP, DW_FIRST_IDX, DW_END_IDX): New. + (enum dwarf_name_index_attribute): Remove. + (get_DW_IDX_name): New declaration. -2016-11-18 Szabolcs Nagy +2017-06-30 Georg-Johann Lay - * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1, - AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3. - (enum aarch64_op): Add OP_FCMLA_ELEM. + PR gas/21683 + * opcode/avr.h (AVR_INSN): Add one for __gcc_isr. -2016-11-18 Szabolcs Nagy +2017-06-30 Maciej W. Rozycki + Andrew Bennett - * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10. - (enum aarch64_insn_class): Add ldst_imm10. + * opcode/mips.h (ASE_XPA_VIRT): New macro. -2016-11-11 Szabolcs Nagy +2017-06-29 Andreas Arnez - * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP. + * elf/common.h (NT_S390_GS_CB): New macro. + (NT_S390_GS_BC): Likewise. -2016-11-11 Szabolcs Nagy +2017-06-28 Tamar Christina - * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define. - (AARCH64_ARCH_V8_3): Define. - (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify. + * opcode/aarch64.h: (AARCH64_FEATURE_DOTPROD): New. + (aarch64_insn_class): Added dotprod. -2016-11-04 Thomas Preud'homme +2017-06-28 Jiong Wang - * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define. - (ARM_AEXT2_V8M_MAIN_DSP): Likewise. - (ARM_ARCH_V8M_MAIN_DSP): Likewise. + * opcode/arm.h (FPU_NEON_EXT_DOTPROD): New macro. + (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): New macro. -2016-11-03 Graham Markall +2017-06-28 Maciej W. Rozycki + Matthew Fortune - * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t. + * elf/mips.h (E_MIPS_MACH_IAMR2): New macro. + (AFL_EXT_INTERAPTIV_MR2): Likewise. + * opcode/mips.h: Document new operand codes defined. + (INSN_INTERAPTIV_MR2): New macro. + (INSN_CHIP_MASK): Adjust accordingly. + (CPU_INTERAPTIV_MR2): New macro. + (cpu_is_member) : New case. + (MIPS16_ALL_ARGS): Rename to... + (MIPS_SVRS_ALL_ARGS): ... this. + (MIPS16_ALL_STATICS): Rename to... + (MIPS_SVRS_ALL_STATICS): ... this. -2016-11-03 Andrew Burgess +2017-06-26 Kuan-Lin Chen - * opcode/arc.h (struct arc_opcode): Change type of opcode and mask - fields. - (struct arc_long_opcode): Delete. - (struct arc_operand): Change types for insert and extract - handlers. + * elf/riscv.h (R_RISCV_32_PCREL): New. -2016-11-03 Andrew Burgess +2017-06-24 Thomas Preud'homme - * opcode/arc.h: Make macros 64-bit safe. + * elf/arm.h (TAG_CPU_ARCH_V8R): New macro. + * opcode/arm.h (ARM_EXT2_V8A): New macro. + (ARM_AEXT2_V8A): Rename into ... + (ARM_AEXT2_V8AR): This. + (ARM_AEXT2_V8A): New macro. + (ARM_AEXT_V8R): New macro. + (ARM_AEXT2_V8R): New macro. + (ARM_ARCH_V8R): New macro. -2016-11-03 Graham Markall +2017-06-24 Thomas Preud'homme - * opcode/arc.h (arc_opcode_len): Declare. - (ARC_SHORT): Delete. + * opcode/arm.h (ARM_AEXT_V4TxM): Add ARM_EXT_OS bit to the set. + (ARM_AEXT_V4T): Likewise. + (ARM_AEXT_V5TxM): Likewise. + (ARM_AEXT_V5T): Likewise. + (ARM_AEXT_V6M): Mask off ARM_EXT_OS bit. -2016-11-01 Palmer Dabbelt - Andrew Waterman +2017-06-22 H.J. Lu - Add support for RISC-V architecture. - * dis-asm.h: Add prototypes for print_insn_riscv and - print_riscv_disassembler_options. - * elf/riscv.h: New file. - * opcode/riscv-opc.h: New file. - * opcode/riscv.h: New file. + * bfdlink.h (bfd_link_info): Add shstk. + * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_SHSTK): New. -2016-10-17 Nick Clifton +2017-06-22 H.J. Lu - * elf/common.h (DT_SYMTAB_SHNDX): Define. - (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define. - (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define. - (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define. - (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define. - (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define. - (ELFOSABI_OPENVOS): Define. - (GRP_MASKOS, GRP_MASKPROC): Define. + * bfdlink.h (bfd_link_info): Add ibtplt and ibt. + * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_AND): New. + (GNU_PROPERTY_X86_FEATURE_1_IBT): Likewise. -2016-10-14 Pedro Alves +2017-06-21 Thomas Preud'homme - * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL, - OVERRIDE): Define as empty. - [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as - __final. - [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as - empty. + * opcode/arm.h (FPU_ANY): New macro. -2016-10-14 Pedro Alves +2017-06-20 Andreas Krebbel - * ansidecl.h (GCC_FINAL): Delete. - (OVERRIDE, FINAL): New, moved from gcc/coretypes.h. + * elf/s390.h (PT_S390_PGSTE): Define macro. -2016-10-14 Claudiu Zissulescu +2017-06-16 Alan Modra - * opcode/arc.h (ARC_OPCODE_ARCV2): New define. + PR ld/20022 + PR ld/21557 + PR ld/21562 + PR ld/21571 + * bfdlink.h (struct bfd_link_hash_entry): Delete undef.section. -2016-09-29 Alan Modra +2017-06-14 Yao Qi - * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define. + * dis-asm.h (print_insn_aarch64): Move it to opcodes/disassemble.h. + (print_insn_big_arm, print_insn_big_mips): Likewise. + (print_insn_i386, print_insn_ia64): Likewise. + (print_insn_little_arm, print_insn_little_mips): Likewise. + (print_insn_spu): Likewise. -2016-09-26 Claudiu Zissulescu +2017-06-06 Andrew Burgess - * opcode/arc.h (insn_class_t): Add two new classes. + * bfdlink.h (struct bfd_link_info): Add new resolve_section_groups + flag. -2016-09-26 Alan Modra +2017-06-01 Alan Modra - * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values. + * elf/ppc64.h (PPC64_OPT_LOCALENTRY): Define. -2016-09-21 Richard Sandiford +2017-05-31 Eli Zaretskii - * opcode/aarch64.h (aarch64_cond): Bump array size to 4. + * environ.h: Add #ifndef guard. -2016-09-21 Richard Sandiford +2017-05-30 Anton Kolesov - * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro. - (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi) - (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P) - (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops. + * elf/arc-cpu.def: New file. -2016-09-21 Richard Sandiford +2017-05-24 Yao Qi - * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc) - (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred) - (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New - aarch64_insn_classes. + * dis-asm.h: Move some function declarations to + opcodes/disassemble.h. -2016-09-21 Richard Sandiford +2017-05-24 Yao Qi - * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd. - (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd) - (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise. + * dis-asm.h (disassembler): Update declaration. -2016-09-21 Richard Sandiford +2017-05-23 Claudiu Zissulescu - * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd. - (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO) - (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise. + * opcode/arc.h (MAX_INSN_FLGS): Update to 4. -2016-09-21 Richard Sandiford +2017-05-22 H.J. Lu - * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd. - (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM) - (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM) - (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED) - (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED) - (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5) - (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6) - (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3) - (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8) - (AARCH64_OPND_SVE_UIMM8_53): Likewise. - (aarch64_sve_dupm_mov_immediate_p): Declare. + * include/opcode/i386.h (NOTRACK_PREFIX_OPCODE): New. -2016-09-21 Richard Sandiford +2017-05-19 Jose E. Marchesi - * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd. - (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL) - (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL) - (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise. - (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind. + * elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define. + (ELF_SPARC_HWCAP2_ONADDSUB): Likewise. + (ELF_SPARC_HWCAP2_ONMUL): Likewise. + (ELF_SPARC_HWCAP2_ONDIV): Likewise. + (ELF_SPARC_HWCAP2_DICTUNP): Likewise. + (ELF_SPARC_HWCAP2_FPCMPSHL): Likewise. + (ELF_SPARC_HWCAP2_RLE): Likewise. + (ELF_SPARC_HWCAP2_SHA3): Likewise. + * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8 + and adjust SPARC_OPCODE_ARCH_MAX. + (HWCAP2_SPARC6): Define. + (HWCAP2_ONADDSUB): Likewise. + (HWCAP2_ONMUL): Likewise. + (HWCAP2_ONDIV): Likewise. + (HWCAP2_DICTUNP): Likewise. + (HWCAP2_FPCMPSHL): Likewise. + (HWCAP2_RLE): Likewise. + (HWCAP2_SHA3): Likewise. + (OPM): Likewise. + (OPMI): Likewise. + (ONFCN): Likewise. + (REVFCN): Likewise. + (SIMM10): Likewise. -2016-09-21 Richard Sandiford +2017-05-16 Alan Modra - * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd. - (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4) - (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR) - (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2) - (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX) - (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2) - (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ) - (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2) - (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14) - (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14) - (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14) - (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14) - (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5) - (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4) - (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL) - (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW): - Likewise. + * bfdlink.h (struct bfd_link_hash_entry ): Rename to + non_ir_ref_regular. -2016-09-21 Richard Sandiford +2017-05-16 Alan Modra - * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New - aarch64_opnd. - (AARCH64_MOD_MUL): New aarch64_modifier_kind. - (aarch64_opnd_info): Make shifter.amount an int64_t and - rearrange the fields. + * bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref + comment. Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic. -2016-09-21 Richard Sandiford +2017-05-15 Maciej W. Rozycki + Matthew Fortune - * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd. - (AARCH64_OPND_SVE_PRFOP): Likewise. - (aarch64_sve_pattern_array): Declare. - (aarch64_sve_prfop_array): Likewise. + * elf/mips.h (AFL_ASE_MIPS16E2): New macro. + (AFL_ASE_MASK): Adjust accordingly. + * opcode/mips.h: Document new operand codes defined. + (mips_operand_type): Add OP_REG28 enum value. + (INSN2_SHORT_ONLY): Update description. + (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros. -2016-09-21 Richard Sandiford +2017-05-14 John David Anglin - * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier. - (AARCH64_OPND_QLF_P_M): Likewise. + * opcode/hppa.h: Fix match and mask for 64-bit bb opcode. -2016-09-21 Richard Sandiford +2017-05-10 Claudiu Zissulescu + + * elf/arc.h (SHT_ARC_ATTRIBUTES): Define. + (Tag_ARC_*): Define. + (E_ARC_OSABI_V4): Define. + (E_ARC_OSABI_CURRENT): Reassign it. + (TAG_CPU_*): Define. + * opcode/arc-attrs.h: New file. + * opcode/arc.h (insn_subclass_t): Assign enum values. + (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64. + (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT) + (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP) + (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW) + (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC) + (ARC_CRC): Delete. - * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New - aarch64_operand_class. - (AARCH64_OPND_CLASS_PRED_REG): Likewise. - (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5) - (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16) - (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt) - (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd) - (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn) - (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN) - (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds. +2017-04-20 H.J. Lu -2016-09-21 Richard Sandiford + PR ld/21382 + * bfdlink.h (bfd_link_hash_entry): Add dynamic_ref_after_ir_def. - * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field. - (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind. +2017-04-19 Alan Modra -2016-09-21 Richard Sandiford + * bfdlink.h (struct bfd_link_info ): + Revise comment. - * opcode/aarch64.h (F_STRICT): New flag. +2017-04-11 Alan Modra -2016-09-07 Richard Earnshaw + * opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete. + (PPC_OPCODE_VSX3): Delete. + (PPC_OPCODE_HTM): Delete. + (PPC_OPCODE_*): Renumber and order chronologically. + (PPC_OPCODE_SPE): Comment on this and other bits used for APUinfo. - * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture. +2017-04-06 Pip Cet -2016-08-26 Cupertino Miranda - * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12, - SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations. - * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12 - relocation. + * dis-asm.h: Add prototypes for wasm32 disassembler. -2016-08-04 Thomas Preud'homme +2017-04-05 Pedro Alves - * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro. - (ARM_SET_SYM_CMSE_SPCL): Likewise. + * dis-asm.h (disassemble_info) : Now a + "const char *". + (next_disassembler_option): Constify. -2016-08-01 Andrew Jenner +2017-04-04 H.J. Lu - * opcode/ppc.h (PPC_OPCODE_E200Z4): New define. + * elf/common.h (PT_GNU_MBIND_NUM): New. + (PT_GNU_MBIND_LO): Likewise. + (PT_GNU_MBIND_HI): Likewise. + (SHF_GNU_MBIND): Likewise. + +2017-04-03 Palmer Dabbelt + + * elf/riscv.h (RISCV_GP_SYMBOL): New define. + +2017-03-27 Andrew Waterman + + * opcode/riscv-opc.h (CSR_PMPCFG0): New define. + (CSR_PMPCFG1): Likewise. + (CSR_PMPCFG2): Likewise. + (CSR_PMPCFG3): Likewise. + (CSR_PMPADDR0): Likewise. + (CSR_PMPADDR1): Likewise. + (CSR_PMPADDR2): Likewise. + (CSR_PMPADDR3): Likewise. + (CSR_PMPADDR4): Likewise. + (CSR_PMPADDR5): Likewise. + (CSR_PMPADDR6): Likewise. + (CSR_PMPADDR7): Likewise. + (CSR_PMPADDR8): Likewise. + (CSR_PMPADDR9): Likewise. + (CSR_PMPADDR10): Likewise. + (CSR_PMPADDR11): Likewise. + (CSR_PMPADDR12): Likewise. + (CSR_PMPADDR13): Likewise. + (CSR_PMPADDR14): Likewise. + (CSR_PMPADDR15): Likewise. + (pmpcfg0): Declare register. + (pmpcfg1): Likewise. + (pmpcfg2): Likewise. + (pmpcfg3): Likewise. + (pmpaddr0): Likewise. + (pmpaddr1): Likewise. + (pmpaddr2): Likewise. + (pmpaddr3): Likewise. + (pmpaddr4): Likewise. + (pmpaddr5): Likewise. + (pmpaddr6): Likewise. + (pmpaddr7): Likewise. + (pmpaddr8): Likewise. + (pmpaddr9): Likewise. + (pmpaddr10): Likewise. + (pmpaddr11): Likewise. + (pmpaddr12): Likewise. + (pmpaddr13): Likewise. + (pmpaddr14): Likewise. + (pmpaddr15): Likewise. + +2017-03-30 Pip Cet + + * opcode/wasm.h: New file to support wasm32 architecture. + * elf/wasm32.h: Add R_WASM32_32 relocation. + +2017-03-29 Alan Modra + + * opcode/ppc.h (PPC_OPCODE_RAW): Define. + (PPC_OPCODE_*): Make them all unsigned long long constants. + +2017-03-27 Pip Cet + + * elf/wasm32.h: New file to support wasm32 architecture. + +2017-03-27 Rinat Zelig + + * opcode/arc.h (insn_class_t): Add ULTRAIP and MISC class. + +2017-03-21 Andreas Krebbel + + * opcode/s390.h (S390_INSTR_FLAG_VX2): Remove. + (S390_INSTR_FLAG_FACILITY_MASK): Adjust value. + +2017-03-21 Rinat Zelig + + * opcode/arc.h (insn_class_t): Add DMA class. + +2017-03-16 Nick Clifton + + * elf/common.h (GNU_BUILD_ATTRIBUTE_SHORT_ENUM): New GNU BUILD + note type. + +2017-03-14 Jakub Jelinek + + PR debug/77589 + * dwarf2.def (DW_OP_GNU_variable_value): New opcode. + +2017-03-13 Markus Trippelsdorf + + PR demangler/70909 + PR demangler/67264 + * demangle.h (struct demangle_component): Add d_printing field. + (cplus_demangle_print): Remove const qualifier from tree + parameter. + (cplus_demangle_print_callback): Likewise. + +2017-03-13 Nick Clifton + + PR binutils/21202 + * elf/aarch64.h (R_AARCH64_TLSDESC_LD64_LO12_NC): Rename to + R_AARCH64_TLSDESC_LD64_LO12. + (R_AARCH64_TLSDESC_ADD_LO12_NC): Rename to + R_AARCH64_TLSDESC_ADD_LO12_NC. + +2017-03-10 Nick Clifton + + * elf/common.h (EM_LANAI): New machine number. + (EM_BPF): Likewise. + (EM_WEBASSEMBLY): Likewise. + Move low value, deprecated, numbers to their numerical + equivalents. + +2017-03-08 H.J. Lu + + PR binutils/21231 + * elf/common.h (GNU_PROPERTY_LOPROC): New. + (GNU_PROPERTY_HIPROC): Likewise. + (GNU_PROPERTY_LOUSER): Likewise. + (GNU_PROPERTY_HIUSER): Likewise. + +2017-03-01 Nick Clifton + + * elf/common.h (SHF_GNU_BUILD_NOTE): Define. + (NT_GNU_PROPERTY_TYPE_0): Define. + (NT_GNU_BUILD_ATTRIBUTE_OPEN): Define. + (NT_GNU_BUILD_ATTRIBUTE_FUN): Define. + (GNU_BUILD_ATTRIBUTE_TYPE_NUMERIC): Define. + (GNU_BUILD_ATTRIBUTE_TYPE_STRING): Define. + (GNU_BUILD_ATTRIBUTE_TYPE_BOOL_TRUE): Define. + (GNU_BUILD_ATTRIBUTE_TYPE_BOOL_FALSE): Define. + (GNU_BUILD_ATTRIBUTE_VERSION): Define. + (GNU_BUILD_ATTRIBUTE_STACK_PROT): Define. + (GNU_BUILD_ATTRIBUTE_RELRO): Define. + (GNU_BUILD_ATTRIBUTE_STACK_SIZE): Define. + (GNU_BUILD_ATTRIBUTE_TOOL): Define. + (GNU_BUILD_ATTRIBUTE_ABI): Define. + (GNU_BUILD_ATTRIBUTE_PIC): Define. + (NOTE_GNU_PROPERTY_SECTION_NAME): Define. + (GNU_BUILD_ATTRS_SECTION_NAME): Define. + (GNU_PROPERTY_STACK_SIZE): Define. + (GNU_PROPERTY_NO_COPY_ON_PROTECTED): Define. + (GNU_PROPERTY_X86_ISA_1_USED): Define. + (GNU_PROPERTY_X86_ISA_1_NEEDED): Define. + (GNU_PROPERTY_X86_ISA_1_486): Define. + (GNU_PROPERTY_X86_ISA_1_586): Define. + (GNU_PROPERTY_X86_ISA_1_686): Define. + (GNU_PROPERTY_X86_ISA_1_SSE): Define. + (GNU_PROPERTY_X86_ISA_1_SSE2): Define. + (GNU_PROPERTY_X86_ISA_1_SSE3): Define. + (GNU_PROPERTY_X86_ISA_1_SSSE3): Define. + (GNU_PROPERTY_X86_ISA_1_SSE4_1): Define. + (GNU_PROPERTY_X86_ISA_1_SSE4_2): Define. + (GNU_PROPERTY_X86_ISA_1_AVX): Define. + (GNU_PROPERTY_X86_ISA_1_AVX2): Define. + (GNU_PROPERTY_X86_ISA_1_AVX512F): Define. + (GNU_PROPERTY_X86_ISA_1_AVX512CD): Define. + (GNU_PROPERTY_X86_ISA_1_AVX512ER): Define. + (GNU_PROPERTY_X86_ISA_1_AVX512PF): Define. + (GNU_PROPERTY_X86_ISA_1_AVX512VL): Define. + (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Define. + (GNU_PROPERTY_X86_ISA_1_AVX512BW): Define. -2016-07-29 Aldy Hernandez +2017-02-28 Peter Bergner - * libiberty.h (MAX_ALLOCA_SIZE): New macro. + * dis-asm.h (disasm_options_t): New typedef. + (parse_arm_disassembler_option): Remove prototype. + (set_arm_regname_option): Likewise. + (get_arm_regnames): Likewise. + (get_arm_regname_num_options): Likewise. + (disassemble_init_s390): New prototype. + (disassembler_options_powerpc): Likewise. + (disassembler_options_arm): Likewise. + (disassembler_options_s390): Likewise. + (remove_whitespace_and_extra_commas): Likewise. + (disassembler_options_cmp): Likewise. + (next_disassembler_option): New inline function. + (FOR_EACH_DISASSEMBLER_OPTION): New macro. + +2017-02-28 Alan Modra + + * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment. + * elf/ppc.h (R_PPC_16DX_HA): Likewise. + +2017-02-24 Richard Sandiford + + * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16) + (AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2) + (AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX) + (AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds. + +2017-02-24 Richard Sandiford + + * opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro. + (AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM. + +2017-02-22 Andrew Waterman + + * opcode/riscv-opc.h (CSR_SCOUNTEREN): New define. + (CSR_MCOUNTEREN): Likewise. + (scounteren): Declare register. + (mcounteren): Likewise. + +2017-02-14 Andrew Waterman + + * opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define. + (MASK_SFENCE_VMA): Likewise. + (sfence_vma): Declare instruction. + +2017-02-14 Alan Modra + + PR 21118 + * opcode/ppc.h (PPC_OPERAND_*): Reassign values, regs first. + (PPC_OPERAND_SPR, PPC_OPERAND_GQR): Define. + +2017-01-24 Dimitar Dimitrov + + * opcode/hppa.h: Clarify that file is part of GNU opcodes. + * opcode/i860.h: Ditto. + * opcode/nios2.h: Ditto. + * opcode/nios2r1.h: Ditto. + * opcode/nios2r2.h: Ditto. + * opcode/pru.h: Ditto. + +2017-01-24 Alan Hayward + + * elf/common.h (NT_ARM_SVE): Define. + +2017-01-04 Jiong Wang + + * dwarf2.def: Sync with mainline gcc sources. -2016-07-27 Graham Markall + 2017-01-04 Richard Earnshaw + Jiong Wang - * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE, - ARC_OPERAND_COLON. Add the arc_nps_address_type enum and - ARC_NUM_ADDRTYPES. - * opcode/arc.h: Add BMU to insn_class_t enum. - * opcode/arc.h: Add PMU to insn_class_t enum. + * dwarf2.def (DW_OP_AARCH64_operation): Reserve the number 0xea. + (DW_CFA_GNU_window_save): Comments the multiplexing on AArch64. -2016-07-20 Claudiu Zissulescu +2017-01-04 Szabolcs Nagy - * dis-asm.h: Declare print_arc_disassembler_options. + * opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define. + (AARCH64_ARCH_V8_3): Update. -2016-07-15 Thomas Preud'homme +2017-01-03 Kito Cheng - * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and - out_implib_bfd fields. + * opcode/riscv-opc.h: Add support for the "q" ISA extension. -2016-07-14 Claudiu Zissulescu +2017-01-03 Nick Clifton - * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation. + * dwarf2.def: Sync with mainline gcc sources + * dwarf2.h: Likewise. -2016-07-05 Andre Vieria + 2016-12-21 Jakub Jelinek - * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ... - (SHF_ARM_PURECODE): ... this. + * dwarf2.def (DW_FORM_ref_sup): Renamed to ... + (DW_FORM_ref_sup4): ... this. New form. + (DW_FORM_ref_sup8): New form. -2016-07-01 Szabolcs Nagy + 2016-10-17 Jakub Jelinek - * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New. - (AARCH64_CPU_HAS_ANY_FEATURES): New. - (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES. - (AARCH64_OPCODE_HAS_FEATURE): Remove. + * dwarf2.h (enum dwarf_calling_convention): Add new DWARF5 + calling convention codes. + (enum dwarf_line_number_content_type): New. + (enum dwarf_location_list_entry_type): Add DWARF5 DW_LLE_* + codes. + (enum dwarf_source_language): Add new DWARF5 DW_LANG_* codes. + (enum dwarf_macro_record_type): Add DWARF5 DW_MACRO_* codes. + (enum dwarf_name_index_attribute): New. + (enum dwarf_range_list_entry): New. + (enum dwarf_unit_type): New. + * dwarf2.def: Add new DWARF5 DW_TAG_*, DW_FORM_*, DW_AT_*, + DW_OP_* and DW_ATE_* entries. -2016-06-30 Matthew Wahab + 2016-08-15 Jakub Jelinek - * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set - of enabled FPU features. + * dwarf2.def (DW_AT_string_length_bit_size, + DW_AT_string_length_byte_size): New attributes. -2016-06-29 Trevor Saunders + 2016-08-12 Alexandre Oliva - * opcode/sparc.h (enum sparc_opcode_arch_val): Move - SPARC_OPCODE_ARCH_MAX into the enum. + PR debug/63240 + * dwarf2.def (DW_AT_deleted, DW_AT_defaulted): New. + * dwarf2.h (enum dwarf_defaulted_attribute): New. -2016-06-28 Richard Sandiford - - * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t. - -2016-06-28 Maciej W. Rozycki - - * elf/mips.h (R_MIPS16_PC16_S1): New relocation. - -2016-06-25 Trevor Saunders - - * elf/xtensa.h (xtensa_make_property_section): New prototype. - -2016-06-24 John Baldwin - - * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY) - (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS) - (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN) - (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define. - -2016-06-23 Graham Markall - - * opcode/arc.h: Make insn_class_t alphabetical again. - -2016-06-22 Trevor Saunders - - * elf/dlx.h: Wrap in extern C. - * elf/xtensa.h: Likewise. - * opcode/arc.h: Likewise. - -2016-06-22 Trevor Saunders - - * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into - tilegx_pipeline. - -2016-06-21 Graham Markall - - * opcode/arc.h: Add nps400 extension and instruction - subclass. - Remove ARC_OPCODE_NPS400 - * elf/arc.h: Remove E_ARC_MACH_NPS400 - -2016-06-17 Jose E. Marchesi - - * opcode/sparc.h (enum sparc_opcode_arch_val): Add - SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D, - SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and - SPARC_OPCODE_ARCH_V9M. - -2016-06-14 John Baldwin - - * opcode/msp430-decode.h (MSP430_Size): Remove. - (Msp430_Opcode_Decoded): Change type of size to int. - -2016-06-11 Alan Modra - - * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define. - -2016-06-08 Jose E. Marchesi - - * opcode/sparc.h: Add missing documentation for hyperprivileged - registers in rd (%) and rs1 ($). - -2016-06-07 Alan Modra - - * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL, - PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, - PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, - PPC_APUINFO_VLE: Define. - -2016-06-07 Matthew Wahab - - * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding - entries. - (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS. - -2016-06-02 Andrew Burgess - - * opcode/arc.h (MAX_INSN_ARGS): Increase to 16. - (struct arc_long_opcode): New structure. - (arc_long_opcodes): Declare. - (arc_num_long_opcodes): Declare. - -2016-06-01 Trevor Saunders - - * elf/mips.h: Add extern "C". - * elf/sh.h: Likewise. - * opcode/d10v.h: Likewise. - * opcode/d30v.h: Likewise. - * opcode/ia64.h: Likewise. - * opcode/mips.h: Likewise. - * opcode/ppc.h: Likewise. - * opcode/sparc.h: Likewise. - * opcode/tic6x.h: Likewise. - * opcode/v850.h: Likewise. - -2016-05-28 Alan Modra - - * bfdlink.h (struct bfd_link_callbacks): Update comments. - Return void from multiple_definition, multiple_common, - add_to_set, constructor, warning, undefined_symbol, - reloc_overflow, reloc_dangerous and unattached_reloc. - -2016-05-26 Trevor Saunders - - * opcode/metag.h: wrap declarations in extern "C". - -2016-05-23 Claudiu Zissulescu - - * opcode/arc.h (insn_subclass_t): Add COND. - (flag_class_t): Add F_CLASS_EXTEND. - -2016-05-23 Cupertino Miranda - - * opcode/arc.h (struct arc_opcode): Renamed attribute class to - insn_class. - (struct arc_flag_class): Renamed attribute class to flag_class. - -2016-05-23 Trevor Saunders - - * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of - plain symbol. - -2016-04-29 Tom Tromey - - * dwarf2.h (enum dwarf_source_language) : New constants. - -2016-05-11 Andrew Bennett - - * elf/mips.h (AFL_ASE_DSPR3): New macro. - (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3. - * opcode/mips.h (ASE_DSPR3): New macro. - -2016-05-10 Thomas Preud'homme - Nick Clifton - - * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE - enumerator. - (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro. - (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise. - (ARM_SYM_BRANCH_TYPE): Replace by ... - (ARM_GET_SYM_BRANCH_TYPE): This and ... - (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether - BFD_ASSERT is defined or not. - -2016-05-10 Thomas Preud'homme - - * elf/arm.h (Tag_DSP_extension): Define. - -2016-05-10 Thomas Preud'homme - - * arm.h (ARM_FSET_CPU_SUBSET): Define macro. - -2016-05-10 Thomas Preud'homme - - * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit. - (ARM_AEXT2_V8M_MAIN): New architecture extension feature set. - (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M - for the high core bits. - -2016-05-03 Claudiu Zissulescu - - * opcode/arc.h (ARC_SYNTAX_1OP): Declare - (ARC_SYNTAX_NOP): Likewsie. - (ARC_OP1_MUST_BE_IMM): Update defined value. - (ARC_OP1_IMM_IMPLIED): Likewise. - (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare. - -2016-04-28 Nick Clifton - - PR target/19722 - * opcode/aarch64.h (struct aarch64_opcode): Add verifier field. - -2016-04-27 Alan Modra - - * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to - undef. Formatting. - -2016-04-21 Nick Clifton - - * bfdlink.h: Add prototype for bfd_link_check_relocs. - -2016-04-20 H.J. Lu - - * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input. - -2016-04-20 Andrew Burgess - - * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula. - -2016-04-19 Andrew Burgess - - * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8. - -2016-04-19 Andrew Burgess - - * opcode/arc.h (insn_class_t): Add NET and ACL class. - -2016-04-14 Andrew Burgess - - * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc. - * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define. - -2016-04-12 Claudiu Zissulescu - - * opcode/arc.h (flag_class_t): Update. - (ARC_OPCODE_NONE): Define. - (ARC_OPCODE_ARCALL): Likewise. - (ARC_OPCODE_ARCFPX): Likewise. - (ARC_REGISTER_READONLY): Likewise. - (ARC_REGISTER_WRITEONLY): Likewise. - (ARC_REGISTER_NOSHORT_CUT): Likewise. - (arc_aux_reg): Add cpu. - -2016-04-12 Claudiu Zissulescu - - * opcode/arc.h (arc_num_opcodes): Remove. - (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM) - (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND) - (ARC_SUFFIX_FLAG): Define. - (flags_none, flags_f, flags_cc, flags_ccf): Declare. - (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc) - (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6) - (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm) - (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm) - (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12) - (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc) - (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm) - (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6) - (arg_32bit_limms12, arg_32bit_limmlimm): Likewise. - -2016-04-05 Claudiu Zissulescu - - * opcode/arc.h (DPA, DPX, SPX): New subclass enums. - (ARC_FPUDA): Define. - (arc_aux_reg): Add new field. - -2016-04-05 Cupertino Miranda - - * opcode/arc-func.h (replace_bits24): Changed. - (replace_bits24_be): Created. - -2016-03-29 Claudiu Zissulescu - - * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass. - (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP) - (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL) - (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU) - (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS) - (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL) - (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC) - (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC) - (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU) - (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS) - (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL) - (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C) - (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL) - (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define. - -2016-03-22 Trevor Saunders - - * opcode/i960.h: Add const qualifiers. - * opcode/tic4x.h (struct tic4x_inst): Likewise. - -2016-03-21 Andrew Burgess - - * opcodes/arc.h (insn_class_t): Add BITOP type. - -2016-03-21 Andrew Burgess - - * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3 - new classes instead. - -2016-03-21 Andrew Burgess - - * elf/arc.h (E_ARC_MACH_NPS400): Define. - * opcode/arc.h (ARC_OPCODE_NPS400): Define. - -2016-03-21 Andrew Burgess - - * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment. - -2016-03-21 Andrew Burgess - - * elf/arc.h (EF_ARC_MACH): Delete. - (EF_ARC_MACH_MSK): Remove out of date comment. - -2016-03-21 Andrew Burgess - - * opcode/arc.h (ARC_OPCODE_BASE): Delete. - -2016-03-15 H.J. Lu - - PR ld/19807 - * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check. - -2016-03-08 Cupertino Miranda - Andrew Burgess - - * elf/arc-reloc.def: Add a call to ME within the formula for each - relocation that requires middle-endian correction. - -2016-03-07 Trevor Saunders - - * opcode/dlx.h (struct dlx_opcode): Add const qualifiers. - * opcode/h8300.h (struct h8_opcode): Likewise. - * opcode/hppa.h (struct pa_opcode): Likewise. - * opcode/msp430.h: Likewise. - * opcode/spu.h (struct spu_opcode): Likewise. - * opcode/tic30.h (struct _register): Likewise. - * opcode/tic4x.h (struct tic4x_register): Likewise. - (struct tic4x_cond): Likewise. - (struct tic4x_indirect): Likewise. - (struct tic4x_inst): Likewise. - * opcode/visium.h (struct reg_entry): Likewise. - -2016-03-04 Matthew Wahab - - * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA. - (ARM_CPU_HAS_FEATURE): Add comment. - -2016-03-03 Than McIntosh - - * plugin-api.h: Add new hooks to the plugin transfer vector to - to support querying section alignment and section size. - (ld_plugin_get_input_section_alignment): New hook. - (ld_plugin_get_input_section_size): New hook. - (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT - and LDPT_GET_INPUT_SECTION_SIZE. - (ld_plugin_tv): Add tv_get_input_section_alignment and - tv_get_input_section_size. - -2016-03-03 Evgenii Stepanov - - * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3. - -2016-02-26 H.J. Lu - - PR ld/19645 - * bfdlink.h (bfd_link_elf_stt_common): New enum. - (bfd_link_info): Add elf_stt_common. - -2016-02-26 H.J. Lu - - PR ld/19636 - PR ld/19704 - PR ld/19719 - * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak. - -2016-02-19 Matthew Wahab - Jiong Wang - - * opcode/arm.h (ARM_EXT2_FP16_INSN): New. - -2016-02-10 Claudiu Zissulescu - Janek van Oirschot - - * opcode/arc.h (arc_opcode arc_relax_opcodes) - (arc_num_relax_opcodes): Declare. - -2016-02-09 Nick Clifton - - * opcode/metag.h (metag_scondtab): Mark as possibly unused. - * opcode/nds32.h (nds32_r45map): Likewise. - (nds32_r54map): Likewise. - * opcode/visium.h (gen_reg_table): Likewise. - (fp_reg_table, cc_table, opcode_table): Likewise. - -2016-02-09 Alan Modra - - PR 16583 - * elf/common.h (AT_SUN_HWCAP): Undef before defining. - -2016-02-04 Nick Clifton - - PR target/19561 - * opcode/msp430.h (IGNORE_CARRY_BIT): New define. - (RRUX): Synthesise using case 2 rather than 7. - -2016-01-19 John Baldwin - - * elf/common.h (NT_FREEBSD_THRMISC): Define. - (NT_FREEBSD_PROCSTAT_PROC): Define. - (NT_FREEBSD_PROCSTAT_FILES): Define. - (NT_FREEBSD_PROCSTAT_VMMAP): Define. - (NT_FREEBSD_PROCSTAT_GROUPS): Define. - (NT_FREEBSD_PROCSTAT_UMASK): Define. - (NT_FREEBSD_PROCSTAT_RLIMIT): Define. - (NT_FREEBSD_PROCSTAT_OSREL): Define. - (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define. - (NT_FREEBSD_PROCSTAT_AUXV): Define. - -2016-01-18 Miranda Cupertino - Zissulescu Claudiu - - * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT) - (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9) - (ARC_TLS_LE_32): Fixed formula. - (ARC_TLS_GD_LD): Use new special function. - * opcode/arc-func.h: Changed all the replacement - functions to clear the patching bits before doing an or it with the value - argument. - -2016-01-18 Nick Clifton - - PR ld/19440 - * coff/internal.h (internal_syment): Use int to hold section - number. - (N_UNDEF): Cast to int not short. - (N_ABS): Likewise. - (N_DEBUG): Likewise. - (N_TV): Likewise. - (P_TV): Likewise. - -2016-01-11 Nick Clifton - - Import this change from GCC mainline: - - 2016-01-07 Mike Frysinger - - * longlong.h: Change !__SHMEDIA__ to - (!defined (__SHMEDIA__) || !__SHMEDIA__). - Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__. - -2016-01-06 Maciej W. Rozycki - - * opcode/mips.h: Add a summary of MIPS16 operand codes. - -2016-01-05 Mike Frysinger - - * libiberty.h (dupargv): Change arg to char * const *. - (writeargv, countargv): Likewise. - -2016-01-01 Alan Modra +2017-01-02 Alan Modra Update year range in copyright notice of all files. -For older changes see ChangeLog-0415, aout/ChangeLog-9115, -cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415, -mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415, -som/ChangeLog-1015, and vms/ChangeLog-1015 +For older changes see ChangeLog-2016 -Copyright (C) 2016 Free Software Foundation, Inc. +Copyright (C) 2017 Free Software Foundation, Inc. Copying and distribution of this file, with or without modification, are permitted in any medium without royalty provided the copyright