X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=include%2Fopcode%2Fd30v.h;h=f55adca9ab5840fcc9b680124a8d7e0190c793fa;hb=8d70a9f0938b9e9efc4fd2eee80cf806b5e97a4a;hp=6882e029d219ee121f4d1c16f2be9c993f60f788;hpb=e98fe4f7b54cbdf29aef9287bbb1bea8801dd05a;p=deliverable%2Fbinutils-gdb.git diff --git a/include/opcode/d30v.h b/include/opcode/d30v.h index 6882e029d2..f55adca9ab 100644 --- a/include/opcode/d30v.h +++ b/include/opcode/d30v.h @@ -1,26 +1,31 @@ /* d30v.h -- Header file for D30V opcode table - Copyright 1997 Free Software Foundation, Inc. + Copyright (C) 1997-2019 Free Software Foundation, Inc. Written by Martin Hunt (hunt@cygnus.com), Cygnus Solutions -This file is part of GDB, GAS, and the GNU binutils. + This file is part of GDB, GAS, and the GNU binutils. -GDB, GAS, and the GNU binutils are free software; you can redistribute -them and/or modify them under the terms of the GNU General Public -License as published by the Free Software Foundation; either version -1, or (at your option) any later version. + GDB, GAS, and the GNU binutils are free software; you can redistribute + them and/or modify them under the terms of the GNU General Public + License as published by the Free Software Foundation; either version 3, + or (at your option) any later version. -GDB, GAS, and the GNU binutils are distributed in the hope that they -will be useful, but WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See -the GNU General Public License for more details. + GDB, GAS, and the GNU binutils are distributed in the hope that they + will be useful, but WITHOUT ANY WARRANTY; without even the implied + warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See + the GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this file; see the file COPYING. If not, write to the Free -Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this file; see the file COPYING3. If not, write to the Free + Software Foundation, 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ #ifndef D30V_H #define D30V_H +#ifdef __cplusplus +extern "C" { +#endif + #define NOP 0x00F00000 /* Structure to hold information about predefined registers. */ @@ -32,7 +37,7 @@ struct pd_reg }; extern const struct pd_reg pre_defined_registers[]; -int reg_name_cnt(); +int reg_name_cnt (void); /* the number of control registers */ #define MAX_CONTROL_REG 64 @@ -85,45 +90,53 @@ struct d30v_opcode #define SHORT_A 9 #define SHORT_B1 11 #define SHORT_B2 12 -#define SHORT_B3 13 -#define SHORT_B3b 15 -#define SHORT_D1 17 -#define SHORT_D2 19 -#define SHORT_D2B 21 -#define SHORT_U 23 /* unary SHORT_A. ABS for example */ -#define SHORT_F 25 /* SHORT_A with flag registers */ -#define SHORT_AF 27 /* SHORT_A with only the first register a flag register */ -#define SHORT_T 29 /* for trap instruction */ -#define SHORT_A5 30 /* SHORT_A with a 5-bit immediate instead of 6 */ -#define SHORT_CMP 32 /* special form for CMPcc */ -#define SHORT_CMPU 34 /* special form for CMPUcc */ -#define SHORT_A1 36 /* special form of SHORT_A for MACa opcodes where a=1 */ -#define SHORT_AA 38 /* SHORT_A with the first register an accumulator */ -#define SHORT_RA 40 /* SHORT_A with the second register an accumulator */ -#define SHORT_MODINC 42 -#define SHORT_MODDEC 43 -#define SHORT_C1 44 -#define SHORT_C2 45 -#define SHORT_UF 46 -#define SHORT_A2 47 -#define SHORT_A5S 49 -#define SHORT_NONE 51 /* no operands */ -#define LONG 52 -#define LONG_U 53 /* unary LONG */ -#define LONG_AF 54 /* LONG with the first register a flag register */ -#define LONG_CMP 55 /* special form for CMPcc and CMPUcc */ -#define LONG_M 56 /* Memory long for ldb, stb */ -#define LONG_M2 57 /* Memory long for ld2w, st2w */ -#define LONG_2 58 /* LONG with 2 operands; bratnz */ -#define LONG_2b 59 /* LONG_2 with modifier of 3 */ -#define LONG_D 60 /* for DBRAI*/ -#define LONG_Db 61 /* for repeati*/ +#define SHORT_B2r 13 +#define SHORT_B3 14 +#define SHORT_B3r 16 +#define SHORT_B3b 18 +#define SHORT_B3br 20 +#define SHORT_D1r 22 +#define SHORT_D2 24 +#define SHORT_D2r 26 +#define SHORT_D2Br 28 +#define SHORT_U 30 /* unary SHORT_A. ABS for example */ +#define SHORT_F 31 /* SHORT_A with flag registers */ +#define SHORT_AF 33 /* SHORT_A with only the first register a flag register */ +#define SHORT_T 35 /* for trap instruction */ +#define SHORT_A5 36 /* SHORT_A with a 5-bit immediate instead of 6 */ +#define SHORT_CMP 38 /* special form for CMPcc */ +#define SHORT_CMPU 40 /* special form for CMPUcc */ +#define SHORT_A1 42 /* special form of SHORT_A for MACa opcodes where a=1 */ +#define SHORT_AA 44 /* SHORT_A with the first register an accumulator */ +#define SHORT_RA 46 /* SHORT_A with the second register an accumulator */ +#define SHORT_MODINC 48 +#define SHORT_MODDEC 49 +#define SHORT_C1 50 +#define SHORT_C2 51 +#define SHORT_UF 52 +#define SHORT_A2 53 +#define SHORT_NONE 55 /* no operands */ +#define SHORT_AR 56 /* like SHORT_AA but only accept register as third parameter */ +#define LONG 57 +#define LONG_U 58 /* unary LONG */ +#define LONG_Ur 59 /* LONG pc-relative */ +#define LONG_CMP 60 /* special form for CMPcc and CMPUcc */ +#define LONG_M 61 /* Memory long for ldb, stb */ +#define LONG_M2 62 /* Memory long for ld2w, st2w */ +#define LONG_2 63 /* LONG with 2 operands; jmptnz */ +#define LONG_2r 64 /* LONG with 2 operands; bratnz */ +#define LONG_2b 65 /* LONG_2 with modifier of 3 */ +#define LONG_2br 66 /* LONG_2r with modifier of 3 */ +#define LONG_D 67 /* for DJMPI */ +#define LONG_Dr 68 /* for DBRAI */ +#define LONG_Dbr 69 /* for repeati */ /* the execution unit(s) used */ int unit; #define EITHER 0 #define IU 1 #define MU 2 +#define EITHER_BUT_PREFER_MU 3 /* this field is used to decide if two instructions */ /* can be executed in parallel */ @@ -145,10 +158,14 @@ struct d30v_opcode #define FLAG_JMP (1L<<13) /* instruction is a branch */ #define FLAG_JSR (1L<<14) /* subroutine call. must be aligned */ #define FLAG_MEM (1L<<15) /* reads/writes memory */ -#define FLAG_2WORD (1L<<16) /* 2 word/4 byte operation */ +#define FLAG_NOT_WITH_ADDSUBppp (1L<<16) /* Old meaning: a 2 word 4 byter operation + New meaning: operation cannot be + combined in parallel with ADD/SUBppp. */ #define FLAG_MUL16 (1L<<17) /* 16 bit multiply */ #define FLAG_MUL32 (1L<<18) /* 32 bit multiply */ #define FLAG_ADDSUBppp (1L<<19) /* ADDppp or SUBppp */ +#define FLAG_DELAY (1L<<20) /* This is a delayed branch or jump */ +#define FLAG_LKR (1L<<21) /* insn in left slot kills right slot */ #define FLAG_CVVA (FLAG_5|FLAG_6|FLAG_7) #define FLAG_C FLAG_7 #define FLAG_ALL (FLAG_0 | \ @@ -243,6 +260,10 @@ extern const struct d30v_operand d30v_operand_table[]; /* let the optimizer know that two registers are affected */ #define OPERAND_2REG (0x10000) +/* This operand is pc-relative. Note that repeati can have two immediate + operands, one of which is pcrel, the other (the IMM6U one) is not. */ +#define OPERAND_PCREL (0x20000) + /* The format table is an array of struct d30v_format. */ struct d30v_format { @@ -267,4 +288,8 @@ struct d30v_insn /* by setting high bits to indicate type */ #define REGISTER_MASK 0xFF +#ifdef __cplusplus +} +#endif + #endif /* D30V_H */