X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=ld%2Femultempl%2Ftic6xdsbt.em;h=d0e345d20e8f7c14ad1411a15a781f3dbf0305a2;hb=fbd9ad907dc6a283dc1bec51ecd91355ac866949;hp=875148e2f96c35bfabf63d83b10e040bed8a6f8d;hpb=1bce6bd86f99b05ddc311eb34545165983ff8ddc;p=deliverable%2Fbinutils-gdb.git

diff --git a/ld/emultempl/tic6xdsbt.em b/ld/emultempl/tic6xdsbt.em
index 875148e2f9..d0e345d20e 100644
--- a/ld/emultempl/tic6xdsbt.em
+++ b/ld/emultempl/tic6xdsbt.em
@@ -31,6 +31,8 @@ static struct elf32_tic6x_params params =
   0, 64
 };
 
+static int merge_exidx_entries = -1;
+
 static int
 is_tic6x_target (void)
 {
@@ -58,6 +60,92 @@ tic6x_after_open (void)
 
   gld${EMULATION_NAME}_after_open ();
 }
+
+static int
+compare_output_sec_vma (const void *a, const void *b)
+{
+  asection *asec = *(asection **) a, *bsec = *(asection **) b;
+  asection *aout = asec->output_section, *bout = bsec->output_section;
+  bfd_vma avma, bvma;
+  
+  /* If there's no output section for some reason, compare equal.  */
+  if (!aout || !bout)
+    return 0;
+  
+  avma = aout->vma + asec->output_offset;
+  bvma = bout->vma + bsec->output_offset;
+  
+  if (avma > bvma)
+    return 1;
+  else if (avma < bvma)
+    return -1;
+  
+  return 0;
+}
+
+static void
+gld${EMULATION_NAME}_after_allocation (void)
+{
+  int layout_changed = 0;
+
+  if (!link_info.relocatable)
+    {
+      /* Build a sorted list of input text sections, then use that to process
+	 the unwind table index.  */
+      unsigned int list_size = 10;
+      asection **sec_list = (asection **)
+          xmalloc (list_size * sizeof (asection *));
+      unsigned int sec_count = 0;
+
+      LANG_FOR_EACH_INPUT_STATEMENT (is)
+	{
+	  bfd *abfd = is->the_bfd;
+	  asection *sec;
+	  
+	  if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
+	    continue;
+	  
+	  for (sec = abfd->sections; sec != NULL; sec = sec->next)
+	    {
+	      asection *out_sec = sec->output_section;
+
+	      if (out_sec
+		  && elf_section_data (sec)
+		  && elf_section_type (sec) == SHT_PROGBITS
+		  && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
+		  && (sec->flags & SEC_EXCLUDE) == 0
+		  && sec->sec_info_type != ELF_INFO_TYPE_JUST_SYMS
+		  && out_sec != bfd_abs_section_ptr)
+		{
+		  if (sec_count == list_size)
+		    {
+		      list_size *= 2;
+		      sec_list = (asection **) 
+                          xrealloc (sec_list, list_size * sizeof (asection *));
+		    }
+
+		  sec_list[sec_count++] = sec;
+		}
+	    }
+	}
+	
+      qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
+      
+      if (elf32_tic6x_fix_exidx_coverage (sec_list, sec_count, &link_info,
+					   merge_exidx_entries))
+	layout_changed = 1;
+      
+      free (sec_list);
+    }
+
+  /* bfd_elf32_discard_info just plays with debugging sections,
+     ie. doesn't affect any code, so we can delay resizing the
+     sections.  */
+  if (bfd_elf_discard_info (link_info.output_bfd, & link_info))
+    layout_changed = 1;
+
+  gld${EMULATION_NAME}_map_segments (layout_changed);
+}
 EOF
 
 # This code gets inserted into the generic elf32.sc linker script
@@ -65,11 +153,13 @@ EOF
 PARSE_AND_LIST_PROLOGUE='
 #define OPTION_DSBT_INDEX		300
 #define OPTION_DSBT_SIZE		301
+#define OPTION_NO_MERGE_EXIDX_ENTRIES   302
 '
 
 PARSE_AND_LIST_LONGOPTS='
   {"dsbt-index", required_argument, NULL, OPTION_DSBT_INDEX},
   {"dsbt-size", required_argument, NULL, OPTION_DSBT_SIZE},
+  { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
 '
 
 PARSE_AND_LIST_OPTIONS='
@@ -77,6 +167,7 @@ PARSE_AND_LIST_OPTIONS='
   fprintf (file, _("\t\t\tUse this as the DSBT index for the output object\n"));
   fprintf (file, _("  --dsbt-size <index>\n"));
   fprintf (file, _("\t\t\tUse this as the number of entries in the DSBT table\n"));
+  fprintf (file, _("  --no-merge-exidx-entries    Disable merging exidx entries\n"));
 '
 
 PARSE_AND_LIST_ARGS_CASES='
@@ -100,6 +191,9 @@ PARSE_AND_LIST_ARGS_CASES='
 	einfo (_("%P%F: invalid --dsbt-size %s\n"), optarg);
       }
       break;
+   case OPTION_NO_MERGE_EXIDX_ENTRIES:
+      merge_exidx_entries = 0;
 '
 
 LDEMUL_AFTER_OPEN=tic6x_after_open
+LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation