X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=1d8ed0259a8a6248ee416e42895edb8ce502b029;hb=a2dfd01fa7b41122647b654d6abe936f6d3f610e;hp=f764d0eb83a63aba8b492f6b07f2aee98e7e3eaa;hpb=fd54057a29e296d29e662780fc6079e42c742228;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f764d0eb83..1d8ed0259a 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,84 @@
+2005-08-30  Paul Brook  <paul@codesourcery.com>
+
+	* arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
+
+2005-08-26  Jan Beulich  <jbeulich@novell.com>
+
+	* i386-dis.c (intel_operand_size): New, broken out from OP_E for
+	re-use.
+	(OP_E): Call intel_operand_size, move call site out of mode
+	dependent code.
+	(OP_OFF): Call intel_operand_size if suffix_always. Remove
+	ATTRIBUTE_UNUSED from parameters.
+	(OP_OFF64): Likewise.
+	(OP_ESreg): Call intel_operand_size.
+	(OP_DSreg): Likewise.
+	(OP_DIR): Use colon rather than semicolon as separator of far
+	jump/call operands.
+
+2005-08-25  Chao-ying Fu  <fu@mips.com>
+
+	* mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
+	(mips_builtin_opcodes): Add DSP instructions.
+	* mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
+	mips64, mips64r2.
+	(print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
+	operand formats.
+
+2005-08-23  David Ung  <davidu@mips.com>
+
+	* mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
+	instructions to the table. 
+
+2005-08-18  Alan Modra  <amodra@bigpond.net.au>
+
+	* a29k-dis.c: Delete.
+	* Makefile.am: Remove a29k support.
+	* configure.in: Likewise.
+	* disassemble.c: Likewise.
+	* Makefile.in: Regenerate.
+	* configure: Regenerate.
+	* po/POTFILES.in: Regenerate.
+
+2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	* ppc-dis.c (powerpc_dialect): Handle e300.
+	(print_ppc_disassembler_options): Likewise.
+	* ppc-opc.c (PPCE300): Define.
+	(powerpc_opcodes): Mark icbt as available for the e300.
+
+2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+	* hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
+	Use "rp" instead of "%r2" in "b,l" insns.
+
+2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
+
+	* s390-dis.c (print_insn_s390): Print unsigned operands with %u.
+	* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
+	(main): Likewise.
+	* s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
+	and 4 bit optional masks.
+	(INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
+	INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
+	(MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
+	MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
+	(s390_opformats): Likewise.
+	* s390-opc.txt: Add new instructions for cpu type z9-109.
+
+2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
+
+	* hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
+
+2005-07-29  Paul Brook  <paul@codesourcery.com>
+
+	* arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
+
+2005-07-29  Paul Brook  <paul@codesourcery.com>
+
+	* arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
+	(print_insn_thumb32): Fix decoding of thumb2 'I' operands.
+
 2005-07-25  DJ Delorie  <dj@redhat.com>
 
 	* m32c-asm.c Regenerate.