X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=49822804c330e71c8676052086de1278644214cf;hb=3d207518c117df7a6c58f20bc2693171b7690650;hp=89ea01acf3c28c3feb703d24aad9323a996b60ae;hpb=8bc526963edde8cf8789ce82072d05fd2bcc90c4;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 89ea01acf3..49822804c3 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,36 @@
+2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
+
+	* tic54x-dis.c (sprint_mmr): Adjust.
+	* tic54x-opc.c: Likewise.
+
+2016-05-19  Alan Modra  <amodra@gmail.com>
+
+	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
+
+2016-05-19  Alan Modra  <amodra@gmail.com>
+
+	* ppc-opc.c: Formatting.
+	(NSISIGNOPT): Define.
+	(powerpc_opcodes <subis>): Use NSISIGNOPT.
+
+2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
+	replacing references to `micromips_ase' throughout.
+	(_print_insn_mips): Don't use file-level microMIPS annotation to
+	determine the disassembly mode with the symbol table.
+
+2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
+
+	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
+
+2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
+	mips64r6.
+	* mips-opc.c (D34): New macro.
+	(mips_builtin_opcodes): Define bposge32c for DSPr3.
+
 2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
 
 	* i386-dis.c (prefix_table): Add RDPID instruction.