X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=e80421bd60d9987704766d22b535d00567b30dfa;hb=a52f75a078dfdc82a22c07cdccff4c76aab61fc1;hp=a0f02d5d8782316d3f13e19d8d2a6504ed50e626;hpb=320cdccfb1377a913b89052241d80b0b7488ca1e;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a0f02d5d87..e80421bd60 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,999 @@ +start-sanitize-sh3e +Wed Aug 30 11:11:58 1995 Jim Wilson + + * sh-opc.h: Add blank lines to improve readabililty of sh3e + instructions. + +end-sanitize-sh3e +Wed Aug 30 11:09:38 1995 Jim Wilson + + * sh-dis.c: Correct comment on first line of file. + +Tue Aug 29 15:37:18 1995 Doug Evans + + * disassemble.c (disassembler): Handle bfd_mach_sparc64. + + * sparc-opc.c (asi, membar): New static locals. + (sparc_{encode,decode}_{asi,membar}): New functions. + (sparc_opcodes, membar insn): Fix. + * sparc-dis.c (print_insn): Call sparc_decode_asi. + Support decoding of membar masks. + (X_MEMBAR): Define. + +Sat Aug 26 21:22:48 1995 Ian Lance Taylor + + * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl. + +Mon Aug 21 17:33:36 1995 Ian Lance Taylor + + * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis, + and likewise for the other branches. Add bhs as an alias for bcc, + and likewise for the size variants. Add dbhs as an alias for + dbcc. + +start-sanitize-sh3e +Fri Aug 11 13:40:24 1995 Jeff Law (law@snake.cs.utah.edu) + + * sh-opc.h (FP sts instructions): Update to match reality. + +end-sanitize-sh3e +Mon Aug 7 16:12:58 1995 Ian Lance Taylor + + * m68k-dis.c: (fpcr_names): Add % before all register names. + (reg_names): Likewise. + (print_insn_arg): Don't explicitly print % before register names. + Add % before register names in static array names. In case 'r', + print data registers as `@(Dn)', not `Dn@'. When printing a + memory address, don't print @# before it. + (print_indexed): Change base_disp and outer_disp from int to + bfd_vma. Print using MIT syntax, not mutant invalid Motorola + syntax. Sign extend 8 byte displacement correctly. + (print_base): Print using MIT syntax. Print zpc when appropriate. + Change parameter disp from int to bfd_vma. + + * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases + for jsr. + +start-sanitize-sh3e +Mon Aug 7 02:21:40 1995 Jeff Law (law@snake.cs.utah.edu) + + * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N, + F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N. + * sh-opc.h (sh_arg_type): Add new operand types. + (sh_table): Add new opcodes from SH3E Floating Point ISA. + +end-sanitize-sh3e +Sat Aug 5 16:50:14 1995 Fred Fish + + * Makefile.in (distclean): Remove generated file config.h. + +Sat Aug 5 16:50:14 1995 Fred Fish + + * Makefile.in (distclean): Remove generated file config.h. + +Wed Aug 2 18:33:40 1995 Ian Lance Taylor + + * m68k-opc.c: New file, holding tables from include/opcode/m68k.h. + Clean up tables. + * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff. + (opcode): Remove. + (print_insn_m68k): Change d to be const. Use m68k_numopcodes + rather than numopcodes. Use m68k_opcodes rather than removed + opcode function. Don't check F_ALIAS. + (print_insn_arg): Change first parameter to be const char *. + * Makefile.in (ALL_MACHINES): Add m68k-opc.o. + (m68k-opc.o): New target. + * configure.in: Build m68k-opc.o for bfd_m68k_arch. + * configure: Rebuild. + +Wed Aug 2 08:23:38 1995 Doug Evans + + * sparc-dis.c (HASH_SIZE, HASH_INSN): Define. + (opcode_bits, opcode_hash_table): New variables. + (opcodes_initialized): Renamed from opcodes_sorted. + (build_hash_table): New function. + (is_delayed_branch): Use hash table. + (print_insn): Renamed from print_insn_sparc, made static. + Build and use hash table. If !sparc64, ignore sparc64 insns, + and vice-versa if sparc64. + (print_insn_sparc, print_insn_sparc64): New functions. + (compare_opcodes): Move sparc64 opcodes to end. + Print commutative insns with constant second. + * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS. + +Tue Aug 1 00:12:49 1995 Ian Lance Taylor + + * sh-dis.c (print_insn_shx): Remove unused local dslot. Use + print_address_func for A_BDISP12 and A_BDISP8. Correct test which + avoids printing a delay slot in a delay slot. + * sh-opc.h (sh_table): Fully bracket last entry. + +Mon Jul 31 12:04:47 1995 Doug Evans + + * sparc-opc.c (sllx, srax, srlx): Fix disassembly. + +Wed Jul 12 00:59:34 1995 Ken Raeburn + + * configure.in: Get host_makefile_frag from ${srcdir}. + + * configure.in: Autoconfiscated. Check for string[s].h. Create + config.h from config.in. Don't set up sysdep.h link. + * sysdep.h: New file. + * configure, config.in: New files, generated from configure.in. + * Makefile.in: Updated to be processed autoconf-style. + (distclean): Keep sysdep.h. Remove config.log and config.cache. + (Makefile): Depend on config.status. + (config.status): New rule. + * configure.bat: Update Makefile substitutions. + +Tue Jul 11 14:23:37 1995 Jeff Spiegel + + * mips-opc.c (L1): Define. + (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid, + addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti, + and wb. + +Tue Jul 11 11:49:49 1995 Ian Lance Taylor + + * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu + if ISA 3 and addu otherwise, replacing or, since some MIPS chips + have multiple add units but only a single logical unit. + + * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3, + shifted by 18, without any insertion or extraction function. + (insert_cr, extract_cr): Remove. + +start-sanitize-arc +Mon Jul 3 11:54:31 1995 Ian Lance Taylor + + * Makefile.in (ALL_MACHINES): Add arc-dis.o and arc-opc.o. + +end-sanitize-arc +Wed Jun 21 20:05:39 1995 Ken Raeburn + + * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before + register names. + +Thu Jun 15 17:23:31 1995 Stan Shebs + + * mpw-config.in: Add sh and i386 configs, remove sparc config. + * sh-opc.h: Add copyright. + +Mon Jun 5 03:30:43 1995 Ken Raeburn + + * Makefile.in (crunch-m68k): Delete extra target accidentally + checked in a while ago. + +Wed May 24 16:22:13 1995 Jim Wilson + + * sh-opc.h (sh_table): Add SH3 support. + +Wed May 24 14:16:08 1995 Steve Chamberlain + + * sh-opc.h: Added bsrf and braf. + +Wed May 10 14:28:16 1995 Richard Earnshaw (rearnsha@armltd.co.uk) + + * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete + bogus [ls]fm{ea,fd} patterns. + + * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc. + * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and + initialize it from memory. Make function static. + (print_insn_{big,little}_arm): New functions. + * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for + the correct endianness. + +start-sanitize-arc +Sat Apr 29 23:20:05 1995 Doug Evans + + * arc-opc.c (arc_opcodes): Add ARC_OPCODE_CONDITIONAL_BRANCH flag. + (arc_suffixes): Use ARC_DELAY_{NONE,NORMAL,JUMP}. +end-sanitize-arc + +Mon Apr 24 14:18:05 1995 Jason Molenda (crash@phydeaux.cygnus.com> + + * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from + enum list. + +Wed Apr 19 14:07:03 1995 Michael Meissner + + * m68k-dis.c (opcode): Finish change made by Kung Hsu on April + 17th, so that it builds again using GCC as the compiler. + +Tue Apr 18 12:14:51 1995 Ken Raeburn + + * mips-dis.c (print_insn_little_mips): Cast return value from + bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips + expects an unsigned long, and that might be fewer words of + argument storage (e.g., if bfd_vma is long long on a 32-bit + machine). + (print_insn_big_mips): Likewise with bfd_getb32 value. + (_print_insn_mips): Now static. + +Mon Apr 17 12:23:28 1995 Kung Hsu + + * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because + gcc memory hog problem with initializer is fixed. + +start-sanitize-arc +Wed Apr 12 09:04:12 1995 Doug Evans + + * arc-opc.c (NULL): Define. + (arc_operands, insn fields u,s): Delete. + (arc_operands, insn fields a,b,c): Mark as signed. + (arc_opcodes): No longer const, links computed at run-time. + (arc_opcodes, mac/mul insns): Breakout suffixes as we don't handle + suffixes that affect the insn code. + (arc_opcodes): Resort table to macros are first. + (arc_opcodes, ld [b,c] entry): Add %Q to prevent shimms. + (arc_opcodes, st [b] entry): Likewise. + (arc_opcodes, st [b,d] entry): Fix mask, value. + (arc_reg_names): Add entries for r29, r30, r31, r60. + (opcode_map, icode_map): New static globals. + (arc_opcode_init_tables): Initialize them. + (arc_opcode_lookup_asm, arc_opcode_lookup_dis): New functions. + (insert_shimmoffset): Signal error if register present. + Validate constant. + * arc-dis.c (print_insn): Call arc_opcode_lookup_dis. +end-sanitize-arc + +Mon Apr 10 15:55:01 1995 Stan Shebs + + Merge in support for Mac MPW as a host. + (Old change descriptions retained for informational value.) + + * mpw-config.in (archname): Compute from the config. + (BFD_MACHINES, ARCHDEFS): Put into mk.tmp. + + * mpw-config.in (target_arch): Compute from canonical target. + (m68k, mips, powerpc, sparc): Add architectures. + * mpw-make.in (disassemble.c.o): Add. + (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far). + + * mpw-config.in (BFD_MACHINES): Set to a default value. + * mpw-make.in (BFD_MACHINES): Remove wired-in value. + + * mpw-make.in (CSEARCH): Add extra-include to search path. + + * mpw-config.in (varargs.h): Don't create. + (sysdep.h): Create using forward-include. + * mpw-make.in (CSEARCH): Add include/mpw to search path. + + * mpw-config.in: New file, MPW version of configure.in. + * mpw-make.in: New file, MPW version of Makefile.in. + +start-sanitize-arc +Thu Apr 6 20:36:08 1995 Doug Evans + + * arc-dis.c (print_insn): New parameter `big_p'. Callers updated. + Call arc_get_opcode_mach to map bfd mach number to opcode value. + (print_insn_*): Pass bfd mach number, not opcode version. + * arc-opc.c (arc_get_opcode_mach): New function. +end-sanitize-arc + +Fri Mar 31 14:23:38 1995 Ken Raeburn + + * alpha-dis.c (print_insn_alpha): Put empty statement after + default label. + +Tue Mar 21 10:51:40 1995 Jeff Law (law@snake.cs.utah.edu) + + * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version. + (low_sign_extend): Likewise. + (get_field): Delete unused function. + (set_field, deposit_14, deposit_21): Likewise. + +Fri Mar 17 15:55:53 1995 J.T. Conklin + + * i386-dis.c: Support for more pentium opcodes. From Guy Harris + (guy@netapp.com). + +Tue Mar 14 00:52:57 1995 Ken Raeburn (raeburn@kr-pc.cygnus.com) + + Sat Feb 11 17:22:41 1995 Klaus Kaempf (kkaempf@didymus.rmi.de) + + * alpha-opc.h (OSF_ASMCODE): define + print pal-code names as defined in App C of the + Alpha Architecture Reference Manual + + * alpha-dis.c: cleaned up output + print stylized code forms as defined in App A.4.3 of the + Alpha Architecture Reference Manual + +Wed Mar 8 15:21:14 1995 Ian Lance Taylor + + * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for + `rfe'. + * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R', + 'N', and 'M'. + +Wed Mar 8 02:54:05 1995 Ken Raeburn + + * m68k-dis.c (opcode): New function. Returns address of opcode + table entry given index, even if the opcode table was split to + work around gcc bugs. + (print_insn_m68k): Call opcode instead of referencing m68k_opcodes + directly. + (BREAK_UP_BIG_DECL): Make secondary array static and const. + (reg_names): Now const. + (print_insn_arg): Arrays cacheFieldName and names now const. + (print_indexed): Array scales now const. + +start-sanitize-arc +Tue Mar 7 21:14:14 1995 Doug Evans + + * arc-dis.c (print_insn_arc_base): Split into big and little fns. + (print_insn_arc_{host,graphics,audio}): Likewise. + (print_insn): Add prototype. + (arc_get_disassembler): New arg `big_p'. Return little or big + print fn accordingly. + * arc-opc.c (arc_opcode_init_tables): Init arc_operand_map once. + (arc_opcode_supported): Use ARC_OPCODE_CPU to ignore byte order. + (arc_opval_supported): Likewise. + * disassemble.c (disassembler): Pass big endian flag to + arc_get_disassembler. +end-sanitize-arc + +Tue Mar 7 16:41:21 1995 Ian Lance Taylor + + * ppc-opc.c: Sort recently added instructions by minor opcode + number within major opcode number. + +Mon Mar 6 10:04:36 1995 Jeff Law (law@snake.cs.utah.edu) + + * hppa-dis.c: Include libhppa.h. + +Fri Feb 24 19:15:36 1995 Ian Lance Taylor + + * mips-opc.c: Change dli to use M_DLI, and add dla. + +Mon Feb 20 23:54:38 1995 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) + + * Makefile.in (ALL_MACHINES): Add w65-dis.o. + +start-sanitize-arc +Fri Feb 17 12:42:25 1995 Doug Evans + + * arc-dis.c (arc_get_disassembler): Change argument to int, + one of bfd_mach_arc_xxx. All callers updated. +end-sanitize-arc + +Thu Feb 16 17:34:41 1995 Ian Lance Taylor + + * mips-opc.c: Add r4650 mul instruction. + +Wed Feb 15 15:45:20 1995 Ian Lance Taylor + + * mips-opc.c: Add uld and usd macros for unaligned double load and + store. + +Tue Feb 14 13:17:37 1995 Michael Meissner + + * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci, + mfdcr, mtdcr, icbt, iccci. + +start-sanitize-arc +Mon Feb 13 11:09:17 1995 Doug Evans + + * arc-dis.c (print_insn): Handle ARC_OPERAND_ADDRESS. + * arc-opc.c (arc_operands): New operand 'J' for jump addresses. + ('L' operand): Mark as ARC_OPERAND_ADDRESS. + (arc_opcodes, j insn): Use 'J' operand type, not 'L'. + (arc_opcodes, ld/st insns): Fix address writeback operand letter. + (insert_absaddr): New function. + +Thu Feb 9 19:19:23 1995 Doug Evans + + * arc-dis.c (print_insn_arc): Rename to print_insn and make static. + New argument `cpu', pass it to arc_opcode_init_tables. + Document byte order dependencies. Ignore unsupported insns. + (arc_get_disassembler): New function. + (print_insn_arc_base, print_insn_arc_host, print_insn_arc_graphics, + print_insn_arc_audio): New functions. + * arc-opc.c (MULTSHIFT operand): Delete. + (UNSIGNED, SATURATION): New operands. + (mac, mul, mul64, mulu64): New insns. + (ext. asl, asr, lsr, ror): Only available on host and graphics cpus. + (padc, padd, pmov, pand, psbc, psub, swap): New insns. + (host,graphics,audio extended and auxiliary regs): Define. + (ss, sc, mh, ml): New suffixes. + (arc_opcode_supported, arc_opval_supported): New functions. + (insert_multshift, extract_multshift): Deleted. + * disassemble.c (disassembler, case bfd_arch_arc): Call + arc_get_disassembler to get disassembler routine. +end-sanitize-arc + +Thu Feb 9 12:28:13 1995 Stan Shebs + + * i960-dis.c (struct tabent, struct sparse_tabent): Change the + signed char fields to shorts, more portable. + +Wed Feb 8 17:29:29 1995 Stan Shebs + + * i960-dis.c (struct tabent, struct sparse_tabent): Declare the + char fields as signed chars, since they may have negative values. + +Mon Feb 6 10:52:06 1995 J.T. Conklin + + * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum + (mycroft@netbsd.org). + +Mon Jan 30 12:38:00 1995 Ian Lance Taylor + + From "Logg, Ed" : + * ppc-opc.c (extract_bdm): Correct parenthezisation. + * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized + value. + +Thu Jan 26 18:32:08 1995 Ian Lance Taylor + + * ppc-opc.c: Changes based on patch from David Edelsohn + . + (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of + SPR. + (FXM_MASK): Define. + (insert_tbr): New static function. + (extract_tbr): New static function. + (XFXFXM_MASK, XFXM): Define. + (XSPRBAT_MASK, XSPRG_MASK): Define. + (powerpc_opcodes): Add instructions to access special registers by + name. Add mtcr and mftbu. + +Tue Jan 17 10:56:43 1995 Ian Lance Taylor + + * mips-opc.c (P3): Define. + (mips_opcodes): Add mad and madu. + +Sun Jan 15 16:32:59 1995 Steve Chamberlain + + * configure.in: Add W65 support. + * disassemble.c: Likewise. + * w65-opc.h, w65-dis.c: New files. + +Wed Dec 28 22:15:33 1994 Steve Chamberlain (sac@jonny.cygnus.com) + + * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit + immediates. + +start-sanitize-arc +Tue Dec 20 10:36:55 1994 Doug Evans + + * arc-dis.c (print_insn_arc): Branch offsets are relative to delay + slot. + * arc-opc.c (extract_reladdr): New function. + (insert_reladdr): Store address right-shifted by 2. +end-sanitize-arc + +Tue Dec 20 11:25:12 1994 Ian Lance Taylor + + * mips-opc.c: Add dli as a synonym for li. + +start-sanitize-arc +Mon Dec 19 12:35:51 1994 Doug Evans + + * arc-opc.c (insertion fns): Pass pointer to value's table entry. + All uses changed. + (extraction fns): Insn argument now array of two words. Return pointer + to value's table entry. All uses changed. + (arc_opcode_lookup_suffix): Exported for arc-dis.c. + (insert_multshift, extract_multshift): New fns. + (arc_operands): Add support for cache bypass suffix. Add support for + predefined aux regs. Modifier bits moved to flags field. + (arc_opcodes): Likewise. + Add mul/mulu/shift insns. Syntax of zero/sign extension insns changed. + New insn rlc. Update to syntax in programmer's manual. + (arc_reg_names): Fix typo in lp_count. Add predefined aux regs. + (arc_suffixes): New synonyms lo,hs for cs,cc. New suffix for cache + bypass. + (arc_opcode_init_tables): New argument to indicate cpu type. + (insert_reg): Handle predefined aux regs. + (extract_reg): Likewise. + (lookup_register): New fn. + * arc-dis.c (arc_condition_codes): Deleted. + (print_insn_arc): Handle insns with 32 bit immediate constants better. + Clean up modifier handling. Handle predefined aux regs. +end-sanitize-arc + +Thu Dec 8 18:23:31 1994 Ken Raeburn + + * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and + print something for reserved opcode values, even if it won't + assemble again. + + * mips-dis.c (_print_insn_mips): When initializing, shift right + and mask, to avoid sign extension problems on the Alpha. + + * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr + control registers. + +start-sanitize-arc +Tue Nov 29 18:02:43 1994 Doug Evans + + * configure.in: Add ARC support. + * disassemble.c: Likewise. + * arc-dis.c, arc-opc.c: New files. +end-sanitize-arc + +Wed Nov 23 22:34:51 1994 Steve Chamberlain (sac@jonny.cygnus.com) + + * sh-opc.h (mov.l gbr): Get direction right. + * sh-dis.c (print_insn_shx): New function. + (print_insn_shl, print_insn_sh): Call print_insn_shx to + print opcodes with right byte order. + +Thu Nov 3 19:32:22 1994 Ken Raeburn + + * ns32k-dis.c (struct ns32k_option): Renamed from struct option, + to avoid conflicts with getopt. + +Mon Oct 31 18:48:10 1994 Ian Lance Taylor + + * hppa-dis.c (print_insn_hppa): Read the instruction using + bfd_getb32, so that it works on a little endian or 64 bit host. + Remove unused local variable op. + +Tue Oct 25 17:07:57 1994 Ian Lance Taylor + + * mips-opc.c: Use or instead of addu for pseudo-op move, since + addu does not work correctly if -mips3. + +Wed Oct 19 13:40:16 1994 Ian Lance Taylor + + * a29k-dis.c (print_special): Add special register names defined + on 29030, 29040 and 29050. + (print_insn): Handle new operand type 'I'. + +Wed Oct 12 11:59:55 1994 Ian Lance Taylor + + * Makefile.in (INSTALL): Use top level install.sh script. + +Wed Oct 5 19:16:29 1994 Ian Lance Taylor + + * sparc-dis.c: Rewrite to use bitfields, rather than a union, so + that it works on a little endian host. + +Tue Oct 4 12:14:21 1994 Ian Lance Taylor + + * configure.in: Use ${config_shell} when running config.bfd. + +Wed Sep 21 18:49:12 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + + * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3. + +Thu Sep 15 16:30:22 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + + * a29k-dis.c (print_insn): Print the opcode. + +Wed Sep 14 17:52:14 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + + * mips-opc.c (mips_opcodes): Set WR_t for sc and scd. + +Sun Sep 11 22:32:17 1994 Jeff Law (law@snake.cs.utah.edu) + + * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3. + +Tue Sep 6 11:37:12 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + + * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions + which store a value into memory. + +Sun Sep 04 17:58:10 1994 Richard Earnshaw (rwe@pegasus.esprit.ec.org) + + * configure.in, Makefile.in, disassemble.c: Add support for the ARM. + * arm-dis.c, arm-opc.h: New files. + +Fri Aug 5 14:00:05 1994 Stan Shebs (shebs@andros.cygnus.com) + + * Makefile.in (ns32k-dis.o): Add dependency. + * ns32k-dis.c (print_insn_arg): Declare initialized local as + string, not as array of chars. + +Thu Jul 28 18:14:16 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'. + + * sparc-opc.c: Added sparclite extended FP operations, and + versions of v9 impdep* instructions permitting specification of + the OPF field. + +Tue Jul 26 16:36:03 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * i960-dis.c (reg_names): Now const. + (struct sparse_tabent): New type, copied from array type in mem + function. + (ctrl): Local static array ctrl_tab now const. + (cobr): Local static array cobr_tab now const. + (mem): Local variables reg1, reg2, reg3 now point to const. Local + static variable mem_tab no longer explicitly initialized. Changed + mem_init to const array of struct sparse_tabent. + (reg): Local static variable reg_tab no longer explicitly + initialized. Changed reg_init to const array of struct + sparse_tabent. + (ea): Local static array scale_tab now const. + + start-sanitize-i960xl + * i960-dis.c (reg): Added i960XL instructions to reg_init table. + (REG_MAX): Updated. + end-sanitize-i960xl + +Tue Jul 19 21:00:00 1994 DJ Delorie (dj@ctron.com) + + * configure.bat: the disassember needs to be enabled for + "objdump -d" to work in djgpp. + +Wed Jul 13 18:01:58 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * ns32k-dis.c: Deleted all code in "#ifdef GDB". + (invalid_float): Enabled general version, doesn't require running + on ns32k host. Changed to take char* argument, and test for + explicitly specified sizes, instead of using sizeof() on host CPU + types. + (INVALID_FLOAT): Cast first argument. + (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532, + list_P032, list_M032): Now const. + (optlist, list_search): Made appropriate arguments now point to + const. + (print_insn_arg): Changed static array of one-character-string + pointers into a static const array of characters; fixed sprintf + statement accordingly. + +Sun Jul 10 00:27:47 1994 Ian Dall (dall@hfrd.dsto.gov.au) + + * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped + from distribution. A ns32k-dis.c from a previous distribution has + been brought up to date and supports the new interface. + + * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k. + + * configure.in: add bfd_ns32k_arch target support. + + * Makefile.in: add ns32k-dis.o to ALL_MACHINES. + Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o. + +Wed Jun 29 22:10:37 1994 Steve Chamberlain (sac@cygnus.com) + + * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch + disassembly right. + +Tue Jun 28 13:22:06 1994 Stan Shebs (shebs@andros.cygnus.com) + + * h8300-dis.c, mips-dis.c: Don't use true and false. + +Thu Jun 23 12:53:19 1994 David J. Mackenzie (djm@rtl.cygnus.com) + + * configure.in: Change --with-targets to --enable-targets. + +Wed Jun 22 13:38:32 1994 Ian Lance Taylor (ian@sanguine.cygnus.com) + + * mips-dis.c (_print_insn_mips): Build a static hash table mapping + opcodes to the first instruction with that opcode, to speed + disassembly of large files. From ralphc@pyramid.com (Ralph + Campbell). + +Tue Jun 7 12:49:44 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * Makefile.in (mostlyclean): Fix typo (was mostyclean). + +Wed May 11 22:32:00 1994 DJ Delorie (dj@ctron.com) + + * configure.bat: update to latest makefile.in + +Sat May 7 17:13:21 1994 Steve Chamberlain (sac@cygnus.com) + + * a29k-dis.c (print_insn): Print 'x' type operand in hex. + * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly. + * sh-dis.c (print_insn_sh): Don't recur endlessly if delay + slot insn is in a delay slot. + * z8k-opc.h: (resflg): Fix patterns. + * h8500-opc.h Fix CR insn patterns. + +Fri May 6 14:34:46 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and + "cmpl" before POWER versions, so that gas -many uses them. + +Thu Apr 28 18:32:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com) + + * disassemble.c: New file. + * Makefile.in (OFILES): Add disassemble.o. + (disassemble.o): Provide dependencies; compile with $(ARCHDEFS). + * configure.in: Define ARCHDEFS in Makefile. Code taken from + binutils/configure.in. + + * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the + opcode being examined. + +Thu Apr 21 17:08:40 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS. + (insert_ral, insert_ram, insert_ras): New functions. + (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and + RAS for store with update. + +Sat Apr 16 23:41:44 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn + (edelsohn@npac.syr.edu). + +Wed Apr 6 17:11:45 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c (mips_opcodes): Correct operands of "nor" with an + immediate argument. + +Mon Apr 4 16:30:46 1994 Doug Evans (dje@canuck.cygnus.com) + + * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0". + +Mon Apr 4 13:22:00 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * ppc-opc.c (powerpc_operands): The signedp field has been + removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag + instead. Add new operand SISIGNOPT. + (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT. + Based on patch from David Edelsohn (edelsohn@npac.syr.edu). + * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather + than signedp field. + +Wed Mar 30 00:31:49 1994 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) + + * i386-dis.c (struct private): Renamed to dis_private. `private' + is a reserved word for dynix cc. + +Mon Mar 28 13:00:15 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * configure.in: Change error message to refer to bfd/config.bfd + rather than bfd/configure.in. + +Mon Mar 28 12:28:30 1994 David Edelsohn (edelsohn@npac.syr.edu) + + * ppc-opc.c: Define POWER2 as short alias flag. + (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and + fsqrt. + +Wed Mar 23 12:23:05 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * i960-dis.c (print_insn_i960): Don't read a second word for + opcodes 0, 1, 2 and 3. + +Wed Mar 16 15:37:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * configure.in: Don't build m68881-ext.o for bfd_m68k_arch. + +Mon Mar 14 14:53:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * m68881-ext.c: Removed; no longer used. + * Makefile.in: Changed accordingly. + + * m68k-dis.c (ext_format_68881): Don't declare. + (print_insn_m68k): If an instruction uses place 'i', it uses at + least four fixed bytes. + (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For + extended float, convert to double using floatformat_to_double, not + ieee_extended_to_double, and fetch the data before converting it. + +Tue Mar 8 18:12:25 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c: It's sqrt.s, not sqrt.w. From + davidj@ICSI.Berkeley.EDU (David Johnson). + +Tue Feb 8 16:55:27 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the + PowerPC uses bdnz[l][a]. + +Tue Feb 8 00:32:28 1994 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) + + * dis-buf.c, i386-dis.c: Include sysdep.h. + +Mon Feb 7 19:22:23 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o. + + * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported + by Motorola PowerPC 601 with PPC_OPCODE_601. + * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): + Disassemble Motorola PowerPC 601 instructions as well as normal + PowerPC instructions. + +Sun Feb 6 07:45:17 1994 Jim Kingdon (kingdon@lioth.cygnus.com) + + * i960-dis.c (reg, mem): Just use a static array instead of + calling xmalloc. + +Sat Feb 5 00:04:02 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the + condition name index if this is for a negated condition. + + * hppa-dis.c (print_insn_hppa): No space before 'H' operand. + Floating point format for 'H' operand is backwards from normal + case (0 == double, 1 == single). For '4', '6', '7', '9', and '8' + operands (fmpyadd and fmpysub), handle bizarre register + translation correctly for single precision format. + + * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F' + or 'I' operands if the next format specifier is 'M' (fcmp + condition completer). + +Feb 4 23:38:03 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * ppc-opc.c (powerpc_operands): New operand type MBE to handle a + single number giving a bitmask for the MB and ME fields of an M + form instruction. Change NB to accept 32, and turn it into 0; + also turn 0 into 32 when disassembling. Seperated SH from NB. + (insert_mbe, extract_mbe): New functions. + (insert_nb, extract_nb): New functions. + (SC_MASK): Mask out SA and LK bits. + (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT, + RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark + "bctr" and "bctrl" as accepted by POWER. Change "rlwimi", + "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.", + "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to + use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions. + (powerpc_macros): Define table of macro definitions. + (powerpc_num_macros): Define. + + * ppc-dis.c (print_insn_powerpc): Don't skip optional operands + if PPC_OPERAND_NEXT is set. + +Sat Jan 22 23:10:07 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of + char. Retrieve contents using bfd_getl32 instead of shifting. + +Fri Jan 21 19:01:39 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * ppc-opc.c: New file. Opcode table for PowerPC, including + opcodes for POWER (RS/6000). + * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler. + * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o. + (CFILES): Add ppc-dis.c. + (ppc-dis.o, ppc-opc.o): New targets. + * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch. + +Mon Jan 17 20:05:49 1994 Jeffrey A. Law (law@snake.cs.utah.edu) + + * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template. + No space before 'u', 'f', or 'N'. + +Sun Jan 16 14:20:16 1994 Jim Kingdon (kingdon@deneb.cygnus.com) + + * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading + farther than we should. + + * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS. + +Thu Jan 6 12:38:05 1994 David J. Mackenzie (djm@thepub.cygnus.com) + + * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments. + +Wed Jan 5 11:56:21 1994 David J. Mackenzie (djm@thepub.cygnus.com) + + * i960-dis.c (print_insn_i960): Only read word2 if the instruction + needs it, to prevent reading past the end of a section. + +Wed Nov 17 17:20:12 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.h: Use macro for j instruction, to support SVR4 PIC. + Removed t,A case for la; always use t,A(b) case. + +Mon Nov 8 12:37:36 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + From Ted Lemen + * mips-dis.c (print_insn_arg): Handle 'k'. + * mips-opc.c: Make cache use k, not t. + +Sun Nov 7 23:52:34 1993 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) + + * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add + FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct + FLOAT_FORMAT_CODE to put out floating point register names. + +Mon Nov 1 18:17:51 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c: Use macros for jal variants, to support SVR4 PIC. + +Thu Oct 28 17:42:23 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x. + +Wed Oct 27 11:48:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts + larger than 32. Moved dsxx32 variants first for disassembler. + +Mon Oct 25 11:33:14 1993 Steve Chamberlain (sac@phydeaux.cygnus.com) + + * z8kgen.c, z8k-opc.h: Add full lda information. + +Tue Oct 19 12:39:25 1993 Jeffrey A Law (law@cs.utah.edu) + + * hppa-dis.c (print_insn_hppa): Do not emit a space after + movb instructions. Any necessary space will be emitted by + the code to handle nullification completers. + +Wed Oct 13 16:19:07 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c: Moved l.d down so that it disassembles as ldc1. + +Fri Oct 8 02:34:21 1993 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) + + * alpha-opc.h: Add ldl_l, fix typo for ldq_u. + * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE. + +Tue Oct 5 17:47:53 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c: Correct lwu opcode value (book had it wrong). + +Thu Sep 30 11:26:18 1993 Steve Chamberlain (sac@phydeaux.cygnus.com) + + * z8k-dis.c (FETCH_DATA): get just the right amount of data. + (unpack_instr): Cope with ARG_IMM4M1 type instructions. + +Wed Sep 29 16:24:49 1993 K. Richard Pixley (rich@sendai.cygnus.com) + + * m88k-dis.c (m88kdis): comment change. Remove space after + printing mnemonic. + (printop): handle new arg types DEC and XREG for m88110. + +Tue Sep 28 19:20:16 1993 Jeffrey A Law (law@snake.cs.utah.edu) + + * hppa-dis.c (print_insn_hppa): Handle 'z' operand + type for absolute branch addresses. Delete special + "ble" and "be" code in 'W' operand code. + +Fri Sep 24 14:08:33 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c: Set hazard information correctly for branch + likely instructions. + +Fri Sep 17 04:41:17 1993 Peter Schauer (pes@regent.e-technik.tu-muenchen.de) + + * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use + info->fprintf_func for printing and info->print_address_func for + address output. + +Wed Sep 15 12:12:07 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c: Set INSN_TRAP for tXX instructions. + +Thu Sep 9 10:11:27 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c: From davidj@ICSI.Berkeley.EDU (David Johnson): + Corrected second case of "b" for disassembler. + +Tue Sep 7 14:25:15 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls + to BFD swapping routines to correspond to BFD name changes. + +Thu Sep 2 10:35:25 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c: Change div machine instruction to be z,s,t rather + than s,t. Change div macro to be d,v,t rather than d,s,t. + Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu, + rem and remu which generates only the corresponding div + instruction. This is for compatibility with the MIPS assembler, + which only generates the simple machine instruction when an + explicit destination of $0 is used. + * mips-dis.c (print_insn_arg): Handle 'z' (always register zero). + +Thu Aug 26 17:41:44 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) + + * mips-opc.c: From davidj@ICSI.Berkeley.EDU (David Johnson): Set + WR_31 hazard for bal, bgezal, bltzal. + +Thu Aug 26 17:20:02 1993 Jim Kingdon (kingdon@lioth.cygnus.com) + + * hppa-dis.c (print_insn_hppa): Use print function + from within the disassemble_info, not fprintf_filtered. + +Wed Aug 25 13:51:40 1993 Ken Raeburn (raeburn@cambridge.cygnus.com) + + * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff + Law, law@cs.utah.edu.) + Mon Aug 23 12:44:05 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com) * mips-opc.c ("absu"): Removed. @@ -447,5 +1443,7 @@ Mon Aug 31 13:47:35 1992 Steve Chamberlain (sac@thepub.cygnus.com) * z8k-dis.c: knows how to disassemble z8k stuff * z8k-opc.h: new file full of z8000 opcodes - - + +Local Variables: +version-control: never +End: