X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=ea063357821f92ca3bb37165407e1f91b013caa8;hb=7ba29e2a41ab1802c0e56ce97b290d5f0aece80e;hp=ae44dbfdd8de459efd7bf6939f4ff10a17045ce9;hpb=22da050bbf8e86cc51b5c83f21d4012e407dcc70;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ae44dbfdd8..ea06335782 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,753 @@ +2009-08-06 Michael Eager + + * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to + CFILES, microblaze-dis.lo to ALL_MACHINES, targets. + * Makefile.in: Regenerate. + * configure.in: Add bfd_microblaze_arch target. + * configure: Regenerate. + * disassemble.c: Define ARCH_microblaze, return + print_insn_microblaze(). + * microblaze-dis.c: New MicroBlaze disassembler. + * microblaze-opc.h: New MicroBlaze opcode definitions. + * microblaze-opcm.h: New MicroBlaze opcode types. + +2009-07-25 H.J. Lu + + * configure.in: Handle bfd_l1om_arch. + * disassemble.c (disassembler): Likewise. + + * configure: Regenerated. + + * i386-dis.c (print_insn): Handle bfd_mach_l1om and + bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM. + + * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM. + Add CPU_L1OM_FLAGS. + (cpu_flags): Add CpuL1OM. + (set_bitfield): Take an argument to set the value field. + (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY). + (process_i386_opcode_modifier): Updated. + (process_i386_operand_type): Likewise. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + + * i386-opc.h (CpuL1OM): New. + (CpuXsave): Updated. + (i386_cpu_flags): Add cpul1om. + +2009-07-24 Jan Beulich + + * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add + frstpm. + * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed. + (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP. + (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387. + * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP): + Define. + (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687, + and cpufisttp. + * i386-opc.tbl: Qualify floating point instructions by their + respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos, + and fsincos to be avilable only on 387. Fix fstsw ax to be + available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm, + and frstpm. + * i386-init.h, i386-tbl.h: Regenerate. + +2009-07-20 Nick Clifton + + PR 10288 + * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register + offset or indexed based addressing mode 3. + +2009-07-14 Nick Clifton + + PR 10288 + * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1 + patterns. + (arm_decode_shift): Catch illegal register based shifts. + (print_insn_arm): Properly handle negative register r0 + post-indexed addressing. + +2009-07-10 Doug Kwan + + * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only + lower 32 bits of long types to make hexadecimal output consistent + on both 32-bit and 64-bit hosts. + +2009-07-10 Alan Modra + + * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h, + * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h, + * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h, + * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h, + * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h, + * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c, + * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, + * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h, + * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h, + * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h, + * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h, + * xstormy16-opc.c, * xstormy16-opc.h: Regenerate. + +2009-07-07 Chung-Lin Tang + + * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus. + +2009-07-07 Nick Clifton + + PR 10288 + * arm-dis.c (arm_opcodes): Be more strict about decoding scaled + addressing modes. + +2009-07-06 DJ Delorie + + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-07-06 Dwarakanath Rajagopal + + * i386-opc.h (CpuFMA4): Add CpuFMA4. + (i386_cpu_flags): New. + * i386-gen.c: Add CPU_FMA4_FLAGS. + * i386-opc.tbl: Add FMA4 instructions. + * i386-tbl.h: Regenerate. + * i386-init.h: Regenerate. + * i386-dis.c (OP_VEX_FMA): New. Handle FMA4. + (OP_XMM_VexW): Ditto. + (OP_EX_VexW): Ditto. + (VEXI4_Fixup): Ditto. + (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros. + (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New. + (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New. + (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New. + (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New. + (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New. + (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New. + (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New. + (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New. + (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New. + (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New. + (get_vex_imm8): New. handle FMA4. + (OP_EX_VexReg): Ditto. + +2009-06-30 Nick Clifton + + PR 10288 + * arm-dis.c (coprocessor): Print the LDC and STC versions of the + LFM and SFM instructions as comments,. + Improve consistency of formatting for instructions displayed as + comments and decimal values displayed with their hexadecimal + equivalents. + Formatting tidy ups. + +2009-06-29 Nick Clifton + + PR 10288 + * arm-dis.c (enum opcode_sentinels): New: Used to mark the + boundary between variaant and generic coprocessor instuctions. + (coprocessor): Use it. + Fix architecture version of MCRR and MRRC instructions. + (arm_opcdes): Fix patterns for STRB and STRH instructions. + (print_insn_coprocessor): Check architecture and extension masks. + Print a hexadecimal version of any decimal constant that is + outside of the range of -16 to +32. + (print_arm_address): Add a return value of the offset used in the + adress, if it is worth printing a hexadecimal version of it. + (print_insn_neon): Print a hexadecimal version of any decimal + constant that is outside of the range of -16 to +32. + (print_insn_arm): Likewise. + (print_insn_thumb16): Likewise. + (print_insn_thumb32): Likewise. + + PR 10297 + * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description + of an undefined instruction. + (arm_opcodes): Use it. + (thumb_opcod): Use it. + (thumb32_opc): Use it. + +2009-06-23 DJ Delorie + + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + + * mep-asm.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-06-22 Nick Clifton + + * po/fi.po: Updated Finish translation. + +2009-06-22 Alan Modra + + * m32c-asm.c: Regenerate. + +2009-06-22 Alan Modra + + * score-dis.c (print_insn_score48, print_insn_score32): Move default + case label to proper lexical block. + * score7-dis.c (print_insn_score32): Likewise. + +2009-06-19 Martin Schwidefsky + + * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT, + MASK_RX_0RRD_OPT): New instruction formats with optional arguments. + * s390-opc.txt (nopr, nop): Use new instruction format. + +2009-06-18 Nick Clifton + + PR 10288 + * arm-dis.c (print_insn_coprocessor): Check that a user specified + ARM architecture supports the matched instruction. + (print_insn_arm): Likewise. + (select_arm_features): New function. Fills in the fields of an + arm_feature_set structure based on a given arm machine number. + (print_insn): Initialise an arm_feature_set structure. + +2009-06-16 Maciej W. Rozycki + + * vax-dis.c (is_function_entry): Return success for synthetic + symbols too. + (is_plt_tail): New function. + (print_insn_vax): Decode PLT entry offset longword. + +2009-06-15 Nick Clifton + + PR 10186 + * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W + instruction. + + PR 10173 + * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice. + +2009-06-15 Nick Clifton + + PR 10263 + * arm-dis.c (print_insn): Ignore is_data if the user has requested + the disassembly of data as well as instructions. + +2009-06-11 Doug Evans + + * cgen.sh: Handle multiple simultaneous runs for parallel makes. + +2009-06-11 Anthony Green + + * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions. + (moxie_form3_opc_info): Add branch instructions. + * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL + encoded instructions. + +2009-06-06 Anthony Green + + * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M. + * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case. + +2009-06-04 Alan Modra + + * dep-in.sed: Don't use \n in replacement part of s command. + * Makefile.am (DEP1): LC_ALL for uniq. + * Makefile.in: Regenerate. + +2009-06-02 Nick Clifton + + * po/nl.po: Updated Dutch translation. + +2009-06-02 Tristan Gingold + + * ia64-gen.c (parse_resource_users, print_dependency_table, + add_dis_table_ent, finish_distable, insert_bit_table_ent, + add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq, + get_prefix_len, compute_completer_bits, insert_opcode_dependencies, + insert_completer_entry, print_completer_entry, print_completer_table, + opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions. + +2009-05-28 DJ Delorie + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + +2009-05-26 DJ Delorie + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-05-26 Nick Clifton + + * po/id.po: Updated Indonesian translation. + * po/opcodes.pot: Updated template file. + +2009-05-26 Alan Modra + + * dep-in.sed: Don't modify .o to .lo here. Output one filename + per line with all lines having continuation backslash. Prefix + first line with "A", following lines with "B". + * Makefile.am (DEP): Don't use dep.sed here. + (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use + dep.sed here on dependencies, sort and uniq. + * Makefile.in: Regenerate. + +2009-05-25 Tristan Gingold + + * makefile.vms (OPT): New variable. + (CFLAGS): Update compilation flags. + +2009-05-22 DJ Delorie + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-05-22 Dwarakanath Rajagopal + + * i386-opc.h (Cpusse5): Delete. + (i386_cpu_flags): Delete. + * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc. + * i386-opc.tbl: Remove SSE5 instructions. + * i386-tbl.h: Regenerate. + * i386-init.h: Regenerate. + * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling. + (print_drex_arg): Delete. + (OP_DREX4): Delete. + (OP_DREX3): Delete. + (OP_DREX_ICMP): Delete. + (OP_DREX_FCMP): Delete. + (DREX_*): Delete. + (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete. + +2009-05-22 Alan Modra + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + +2009-05-19 DJ Delorie + + * mep-asm.c: Regenerate. + * mep-opc.c: Regenerate. + +2009-04-30 DJ Delorie + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-04-17 DJ Delorie + + * moxie-opc.c, moxie-dis.c: Created. + * Makefile.am: Build the moxie source files. + * configure.in: Add moxie support. + * Makefile.in, configure: Rebuilt. + * disassemble.c (disassembler): Add moxie support. + (ARCH_moxie): Define. + +2009-04-15 Jan Beulich + + * i386-opc.tbl (protb, protw, protd, protq): Set opcode + extension to None. + (pshab, pshaw, pshad, pshaq): Likewise. + * i386-tbl.h: Re-generate. + +2009-04-08 DJ Delorie + + * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva", + "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation. + Reorder entries so the extended mnemonics are listed before tlbilx. + +2009-04-02 Peter Bergner + + * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect + due to -many/-Many. + (print_insn_powerpc): Make sure we only deprecate instructions using + the original dialect and not a modified dialect due to -Many handling. + Move the handling of the condition register and default operands to + the end of the if/else if/else chain. + * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that + instructions from newer processors are listed before older ones. + <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors + that have instructions with conflicting opcodes. + +2009-04-01 Peter Bergner + + * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and + E500MC entries. + +2009-04-01 Christophe Lyon + + * arm-dis.c (print_insn): Print BE8 opcodes in little endianness. + +2009-03-30 Joseph Myers + + * arm-dis.c (print_insn): Also check section matches in backwards + search for mapping symbol. + +2009-03-26 H.J. Lu + + * i386-dis.c (get_valid_dis386): Abort on unhandled table. + +2009-03-18 Alan Modra + + * cgen-opc.c: Include alloca-conf.h rather than alloca.h. + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * openrisc-opc.c: Regenerate. + +2009-03-10 Nick Clifton + + * po/id.po: Updated Indonesian translation. + +2009-03-10 Alan Modra + + * ppc-dis.c: Include "opintl.h". + (struct ppc_mopt, ppc_opts): New. + (ppc_parse_cpu): New function. + (powerpc_init_dialect): Use it. + (print_ppc_disassembler_options): Dump options from ppc_opts. + Internationalize message. + +2009-03-06 Nick Clifton + + * po/es.po: Updated Spanish translation. + +2009-03-04 Alan Modra + + PR 6768 + * configure.in: Test for ld --as-needed support. Link shared + libopcodes against libm. + * configure: Regenerate. + +2009-03-03 Peter Bergner + + * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that + instructions from newer processors are listed before older ones. + +2009-03-03 Alan Modra + + * Makefile.am: Run "make dep-am". + (HFILES): Move lm32-desc.h and lm32-opc.h from.. + (CFILES): ..here. + * Makefile.in: Regenerate. + +2009-03-02 Qinwei + + * score7-dis.c: New file. + * Makefile.am: Add dependencies for score7-dis.c. + * Makefile.in: Regenerate. + * configure.in: Add score7-dis to score files. + * configure: Regenerate. + * score-dis.c: Add support for score7 architecture. + * score-opc.h: Likewise. + +2009-03-01 Ralf Wildenhues + + * configure: Regenerate. + +2009-02-27 H.J. Lu + + * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E. + +2009-02-26 Peter Bergner + + * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble + the power7 and the isel instructions. + * ppc-opc.c (insert_xc6, extract_xc6): New static functions. + (insert_dm, extract_dm): Likewise. + (XB6): Update comment to include XX2 form. + (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK, + XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New. + (RemoveXX3DM): Delete. + (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr", + "mftgpr">: Deprecate for POWER7. + <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte", + "frsqrte.">: Deprecate the three operand form and enable the two + operand form for POWER7 and later. + <"wait">: Extend to accept optional parameter. Enable for POWER7. + <"waitsrv", "waitimpl">: Add extended opcodes. + <"ldbrx", "stdbrx">: Enable for POWER7. + <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes. + <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde", + "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo", + "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.", + "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.", + "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.", + "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx", + "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes. + <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx", + "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp", + "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds", + "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp", + "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp", + "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp", + "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic", + "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp", + "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp", + "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp", + "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.", + "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp", + "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp", + "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp", + "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp", + "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp", + "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp", + "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp", + "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp", + "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp", + "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi", + "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp", + "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp", + "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp", + "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor", + "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd", + "xxspltw", "xxswapd">: Add VSX opcodes. + +2009-02-23 H.J. Lu + + * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4. + (operand_types): Remove Vex_Imm4. + + * i386-opc.h (Vex_Imm4): Removed. + (OTMax): Updated. + (i386_operand_type): Remove vex_imm4. + + * i386-opc.tbl: Remove Vex_Imm4 comments. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2009-02-23 Richard Earnshaw + + * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for + vq{r}shr{u}n.s64 insnstructions. + +2009-02-19 Peter Bergner + + * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first + operand to be a float point register (FRT/FRS). + +2009-02-18 Adam Nemet + + * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific + dmfc2 and dmtc2 before the architecture-level variants. + +2009-02-18 Pierre Muller + + * fr30-opc.c: Regenerate. + * frv-opc.c: Regenerate. + * ip2k-opc.c: Regenerate. + * iq2000-opc.c: Regenerate. + * lm32-opc.c: Regenerate. + * m32c-opc.c: Regenerate. + * m32r-opc.c: Regenerate. + * mep-opc.c: Regenerate. + * mt-opc.c: Regenerate. + * xc16x-opc.c: Regenerate. + * xstormy16-opc.c: Regenerate. + * tic54x-dis.c (print_instruction): Avoid compiler warning on + sprintf call. + +2009-02-12 Nathan Sidwell + + * m68k-opc.c (m68k_opcodes): Add stldsr instruction. + +2009-02-05 Peter Bergner + + * ppc-opc.c: Update copyright year. + (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand + ordering for POWER4 and later and use the correct Server ordering. + +2009-02-04 H.J. Lu + + AVX Programming Reference (January, 2009) + * i386-dis.c (PREFIX_VEX_3A44): New. + (VEX_LEN_3A44_P_2): Likewise. + (PREFIX_VEX_3A48): Updated. + (VEX_LEN_3A4C_P_2): Likewise. + (prefix_table): Add PREFIX_VEX_3A44. + (vex_table): Likewise. + (vex_len_table): Add VEX_LEN_3A44_P_2. + + * i386-opc.tbl: Add PCLMUL + AVX instructions. + * i386-tbl.h: Regenerated. + +2009-02-03 Sandip Matte + + * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define. + (mips_arch_choices): Add XLR entry. + * mips-opc.c (XLR): Define. + (mips_builtin_opcodes): Add XLR instructions. + +2009-02-03 Carlos O'Donell + + * Makefile.am: Add install-pdf target. + * po/Make-in: Add install-pdf target. + * Makefile.in: Regenerate. + +2009-02-02 DJ Delorie + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-01-29 Mark Mitchell + + * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd, + qsub, and qdsub. + +2009-01-28 Chao-ying Fu + + * mips-opc.c (suxc1): Add the flag of FP_D. + +2009-01-20 Alan Modra + + * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c, + * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c, + * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c, + * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c, + * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c, + * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c, + * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c, + * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate. + +2009-01-16 Alan Modra + + * configure.in (commonbfdlib): Delete. + (SHARED_LIBADD): Add pic libiberty if such is available. + * configure: Regenerate. + * po/POTFILES.in: Regenerate. + +2009-01-14 Peter Bergner + + * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated. + * ppc-opc.c (powerpc_opcodes) : Deprecate the two + operand form and enable the four operand form for POWER6 and later. + : Deprecate the two operand form and enable the + three operand form for POWER6 and later. + +2009-01-14 Mike Frysinger + + * bfin-dis.c (OUTS): Use "%s" as format string. + +2009-01-13 H.J. Lu + + * i386-gen.c (cpu_flag_init): Remove a white space. + (operand_type_init): Likewise. + +2009-01-12 H.J. Lu + + * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence. + * i386-tbl.h: Regenerated. + +2009-01-12 H.J. Lu + + * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB, + subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS, + subS, xorS and cmpS. + +2009-01-10 H.J. Lu + + * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with + CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add + CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS. + (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush + and CpuSYSCALL. + (lineno): Removed. + (set_bitfield): Take an argument, lineno. Don't report lineno + on error if it is -1. + (process_i386_cpu_flag): Take an argument, lineno. + (process_i386_opcode_modifier): Likewise. + (process_i386_operand_type): Likewise. + (output_i386_opcode): Likewise. + (opcode_hash_entry): Add lineno. + (process_i386_opcodes): Updated. + (process_i386_registers): Likewise. + (process_i386_initializers): Likewise. + + * i386-opc.h (CpuP4): Removed. + (CpuK6): Likewise. + (CpuK8): Likewise. + (CpuClflush): New. + (CpuSYSCALL): Likewise. + (CpuMMX): Updated. + (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add + cpuclflush and cpusyscall. + + * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause, + syscall and sysret. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2009-01-09 H.J. Lu + + * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS + and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS. + (cpu_flags): Add CpuRdtscp. + (set_bitfield): Remove CpuSledgehammer check. + + * i386-opc.h (CpuRdtscp): New. + (CpuLM): Updated. + (i386_cpu_flags): Add cpurdtscp. + + * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2009-01-09 Peter Bergner + + * ppc-opc.c (PPCNONE): Define. + (NOPOWER4): Delete. + (powerpc_opcodes): Initialize the new "deprecated" field. + +2009-01-06 H.J. Lu + + AVX Programming Reference (December, 2008) + * i386-dis.c (VEX_LEN_2B_M_0): Removed. + (VEX_LEN_E7_P_2_M_0): Likewise. + (VEX_LEN_2C_P_1): Updated. + (VEX_LEN_E8_P_2): Likewise. + (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0. + (mod_table): Likewise. + + * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps. + * i386-tbl.h: Regenerated. + 2009-01-05 H.J. Lu * i386-gen.c (process_copyright): Update for 2009.