X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=fbd74873f26282608e9c3903c7fcce9c700a480f;hb=8b301fbb6114faba4e95e24e3a1c3108f64885c6;hp=9bd41c01af24f2ddcd9136494c62a8841f0f8cd0;hpb=1f4cd317b6606fcb2a582a3fc1c1f9437ef7d7b6;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 9bd41c01af..fbd74873f2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,212 @@ +2019-11-22 Mihail Ionescu + + * opcodes/arm-dis.c (arm_opcodes, thumb32_opcodes): + Change the coproc CRC conditions to use the extension + feature set, second word, base on ARM_EXT2_CRC. + +2019-11-14 Jan Beulich + + * i386-opc.tbl (syscall, sysret): Drop Cpu64 forms. + * i386-tbl.h: Re-generate. + +2019-11-14 Jan Beulich + + * i386-gen.c (opcode_modifiers): Remove JumpDword, JumpByte, + JumpInterSegment, and JumpAbsolute entries. + * i386-opc.h (JUMP, JUMP_DWORD, JUMP_BYTE, JUMP_INTERSEGMENT, + JUMP_ABSOLUTE): Define. + (struct i386_opcode_modifier): Extend jump field to 3 bits. + Remove jumpdword, jumpbyte, jumpintersegment, and jumpabsolute + fields. + * i386-opc.tbl (JumpByte, JumpDword, JumpAbsolute, + JumpInterSegment): Define. + * i386-tbl.h: Re-generate. + +2019-11-14 Jan Beulich + + * i386-gen.c (operand_type_init): Remove + OPERAND_TYPE_JUMPABSOLUTE entry. + (opcode_modifiers): Add JumpAbsolute entry. + (operand_types): Remove JumpAbsolute entry. + * i386-opc.h (JumpAbsolute): Move between enums. + (struct i386_opcode_modifier): Add jumpabsolute field. + (union i386_operand_type): Remove jumpabsolute field. + * i386-opc.tbl (call, lcall, jmp, ljmp): Move JumpAbsolute. + * i386-init.h, i386-tbl.h: Re-generate. + +2019-11-14 Jan Beulich + + * i386-gen.c (opcode_modifiers): Add AnySize entry. + (operand_types): Remove AnySize entry. + * i386-opc.h (AnySize): Move between enums. + (struct i386_opcode_modifier): Add anysize field. + (OTUnused): Un-comment. + (union i386_operand_type): Remove anysize field. + * i386-opc.tbl (lea, invlpg, clflush, prefetchnta, prefetcht0, + prefetcht1, prefetcht2, prefetchtw, bndmk, bndcl, bndcu, bndcn, + bndstx, bndldx, prefetchwt1, clflushopt, clwb, cldemote): Move + AnySize. + * i386-tbl.h: Re-generate. + +2019-11-12 Nelson Chu + + * riscv-opc.c (riscv_insn_types): Replace the INSN_CLASS_I with + INSN_CLASS_F and the INSN_CLASS_C with INSN_CLASS_F_AND_C if we + use the floating point register (FPR). + +2019-11-12 Mihail Ionescu + + * opcodes/arm-dis.c (mve_opcodes): Enable VMOV imm to vec with + cmode 1101. + (is_mve_encoding_conflict): Update cmode conflict checks for + MVE_VMVN_IMM. + +2019-11-12 Jan Beulich + + * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_ESSEG + entry. + (operand_types): Remove EsSeg entry. + (main): Replace stale use of OTMax. + * i386-opc.h (IS_STRING_ES_OP0, IS_STRING_ES_OP1): Define. + (struct i386_opcode_modifier): Expand isstring field to 2 bits. + (EsSeg): Delete. + (OTUnused): Comment out. + (union i386_operand_type): Remove esseg field. + * i386-opc.tbl (IsStringEsOp0, IsStringEsOp1): Define. + (cmps, scmp, scas, ssca, cmpsd): Add IsStringEsOp0. + (ins, movs, smov, movsd): Add IsStringEsOpOp1. + (stos, ssto): Add IsStringEsOp0/IsStringEsOpOp1. + * i386-init.h, i386-tbl.h: Re-generate. + +2019-11-12 Jan Beulich + + * i386-gen.c (operand_instances): Add RegB entry. + * i386-opc.h (enum operand_instance): Add RegB. + * i386-opc.tbl (RegC, RegD, RegB): Define. + (Acc, ShiftCount, InOutPortReg): Adjust definitions. + (monitor, mwait, invlpga, skinit, vmload, vmrun, vmsave, clzero, + monitorx, mwaitx): Drop ImmExt and convert encodings + accordingly. + * i386-reg.tbl (ecx, rcx): Add Instance=RegC. + (edx, rdx): Add Instance=RegD. + (ebx, rbx): Add Instance=RegB. + * i386-tbl.h: Re-generate. + +2019-11-12 Jan Beulich + + * i386-gen.c (operand_type_init): Adjust + OPERAND_TYPE_INOUTPORTREG, OPERAND_TYPE_SHIFTCOUNT, + OPERAND_TYPE_FLOATACC, OPERAND_TYPE_ACC8, OPERAND_TYPE_ACC16, + OPERAND_TYPE_ACC32, and OPERAND_TYPE_ACC64 entries. + (operand_instances): New. + (operand_types): Drop InOutPortReg, ShiftCount, and Acc entries. + (output_operand_type): New parameter "instance". Process it. + (process_i386_operand_type): New local variable "instance". + (main): Adjust static assertions. + * i386-opc.h (INSTANCE_WIDTH): Define. + (enum operand_instance): New. + (Acc, InOutPortReg, ShiftCount): Replace by ClassInstance. + (union i386_operand_type): Replace acc, inoutportreg, and + shiftcount by instance. + * i386-opc.tbl (Acc, InOutPortReg, ShiftCount): Define. + * i386-reg.tbl (st, al, cl, ax, dx, eax, rax, xmm0, st(0)): + Add Instance=. + * i386-init.h, i386-tbl.h: Re-generate. + +2019-11-11 Jan Beulich + + * aarch64-tbl.h (aarch64_opcode_table): Switch SVE2's + smaxp/sminp entries' "tied_operand" field to 2. + +2019-11-11 Jan Beulich + + * aarch64-opc.c (operand_general_constraint_met_p): Replace + "index" local variable by that of the already existing "num". + +2019-11-08 H.J. Lu + + PR gas/25167 + * i386-opc.tbl: Remove IgnoreSize from cmpsd and movsd. + * i386-tbl.h: Regenerated. + +2019-11-08 Jan Beulich + + * i386-gen.c (operand_type_init): Add Class= to + OPERAND_TYPE_REGMASK and OPERAND_TYPE_REGBND entries. Move up + OPERAND_TYPE_REGBND entry. + (operand_classes): Add RegMask and RegBND entries. + (operand_types): Drop RegMask and RegBND entry. + * i386-opc.h (enum operand_class): Add RegMask and RegBND. + (RegMask, RegBND): Delete. + (union i386_operand_type): Remove regmask and regbnd fields. + * i386-opc.tbl (RegMask, RegBND): Define. + * i386-reg.tbl: Replace RegMask by Class=RegMask and RegBND by + Class=RegBND. + * i386-init.h, i386-tbl.h: Re-generate. + +2019-11-08 Jan Beulich + + * i386-gen.c (operand_type_init): Add Class= to + OPERAND_TYPE_REGMMX, OPERAND_TYPE_REGXMM, OPERAND_TYPE_REGYMM, and + OPERAND_TYPE_REGZMM entries. + (operand_classes): Add RegMMX and RegSIMD entries. + (operand_types): Drop RegMMX and RegSIMD entries. + * i386-opc.h (enum operand_class): Add RegMMX and RegSIMD. + (RegMMX, RegSIMD): Delete. + (union i386_operand_type): Remove regmmx and regsimd fields. + * i386-opc.tbl (RegMMX): Define. + (RegXMM, RegYMM, RegZMM): Add Class=. + * i386-reg.tbl: Replace RegMMX by Class=RegMMX and RegSIMD by + Class=RegSIMD. + * i386-init.h, i386-tbl.h: Re-generate. + +2019-11-08 Jan Beulich + + * i386-gen.c (operand_type_init): Add Class= to + OPERAND_TYPE_CONTROL, OPERAND_TYPE_TEST, and OPERAND_TYPE_DEBUG + entries. + (operand_classes): Add RegCR, RegDR, and RegTR entries. + (operand_types): Drop Control, Debug, and Test entries. + * i386-opc.h (enum operand_class): Add RegCR, RegDR, and RegTR. + (Control, Debug, Test): Delete. + (union i386_operand_type): Remove control, debug, and test + fields. + * i386-opc.tbl (Control, Debug, Test): Define. + * i386-reg.tbl: Replace Control by Class=RegCR, Debug by + Class=RegDR, and Test by Class=RegTR. + * i386-init.h, i386-tbl.h: Re-generate. + +2019-11-08 Jan Beulich + + * i386-gen.c (operand_type_init): Add Class= to + OPERAND_TYPE_SREG entry. + (operand_classes): Add SReg entry. + (operand_types): Drop SReg entry. + * i386-opc.h (enum operand_class): Add SReg. + (SReg): Delete. + (union i386_operand_type): Remove sreg field. + * i386-opc.tbl (SReg): Define. + * i386-reg.tbl: Replace SReg by Class=SReg. + * i386-init.h, i386-tbl.h: Re-generate. + +2019-11-08 Jan Beulich + + * i386-gen.c (operand_type_init): Add Class=. New + OPERAND_TYPE_ANYIMM entry. + (operand_classes): New. + (operand_types): Drop Reg entry. + (output_operand_type): New parameter "class". Process it. + (process_i386_operand_type): New local variable "class". + (main): Adjust static assertions. + * i386-opc.h (CLASS_WIDTH): Define. + (enum operand_class): New. + (Reg): Replace by Class. Adjust comment. + (union i386_operand_type): Replace reg by class. + * i386-opc.tbl (Reg8, Reg16, Reg32, Reg64, FloatReg): Add + Class=. + * i386-reg.tbl: Replace Reg by Class=Reg. + * i386-init.h: Re-generate. + 2019-11-07 Mihail Ionescu * opcodes/aarch64-tbl.h (V8_6_INSN): New macro for v8.6 instructions.