X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Faarch64-asm.h;h=6f88d86fe0bca51354c253f1b3017b7800d1ebc6;hb=0c0adcc52478ebb707ed780173e18262df6eab7e;hp=b81cfa16d567461c44fb33c142acff7c54d7d5ed;hpb=4df068de5214ff55b01ae320ec580f2928eb74e5;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/aarch64-asm.h b/opcodes/aarch64-asm.h
index b81cfa16d5..6f88d86fe0 100644
--- a/opcodes/aarch64-asm.h
+++ b/opcodes/aarch64-asm.h
@@ -1,5 +1,5 @@
 /* aarch64-asm.h -- Header file for aarch64-asm.c and aarch64-asm-2.c.
-   Copyright (C) 2012-2016 Free Software Foundation, Inc.
+   Copyright (C) 2012-2020 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.
@@ -30,15 +30,17 @@ const aarch64_opcode* aarch64_find_real_opcode (const aarch64_opcode *);
 
 /* Switch-table-based high-level operand inserter.  */
 
-const char* aarch64_insert_operand (const aarch64_operand *,
+bfd_boolean aarch64_insert_operand (const aarch64_operand *,
 				    const aarch64_opnd_info *, aarch64_insn *,
-				    const aarch64_inst *);
+				    const aarch64_inst *,
+				    aarch64_operand_error *);
 
 /* Operand inserters.  */
 
 #define AARCH64_DECL_OPD_INSERTER(x)	\
-  const char* aarch64_##x (const aarch64_operand *, const aarch64_opnd_info *, \
-			   aarch64_insn *, const aarch64_inst *)
+  bfd_boolean aarch64_##x (const aarch64_operand *, const aarch64_opnd_info *, \
+			   aarch64_insn *, const aarch64_inst *, \
+			   aarch64_operand_error *)
 
 AARCH64_DECL_OPD_INSERTER (ins_regno);
 AARCH64_DECL_OPD_INSERTER (ins_reglane);
@@ -54,10 +56,13 @@ AARCH64_DECL_OPD_INSERTER (ins_fpimm);
 AARCH64_DECL_OPD_INSERTER (ins_fbits);
 AARCH64_DECL_OPD_INSERTER (ins_aimm);
 AARCH64_DECL_OPD_INSERTER (ins_limm);
+AARCH64_DECL_OPD_INSERTER (ins_inv_limm);
 AARCH64_DECL_OPD_INSERTER (ins_ft);
 AARCH64_DECL_OPD_INSERTER (ins_addr_simple);
+AARCH64_DECL_OPD_INSERTER (ins_addr_offset);
 AARCH64_DECL_OPD_INSERTER (ins_addr_regoff);
 AARCH64_DECL_OPD_INSERTER (ins_addr_simm);
+AARCH64_DECL_OPD_INSERTER (ins_addr_simm10);
 AARCH64_DECL_OPD_INSERTER (ins_addr_uimm12);
 AARCH64_DECL_OPD_INSERTER (ins_simd_addr_post);
 AARCH64_DECL_OPD_INSERTER (ins_cond);
@@ -69,6 +74,10 @@ AARCH64_DECL_OPD_INSERTER (ins_hint);
 AARCH64_DECL_OPD_INSERTER (ins_prfop);
 AARCH64_DECL_OPD_INSERTER (ins_reg_extended);
 AARCH64_DECL_OPD_INSERTER (ins_reg_shifted);
+AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4);
+AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4xvl);
+AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s6xvl);
+AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s9xvl);
 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_u6);
 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_rr_lsl);
 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_rz_xtw);
@@ -76,9 +85,20 @@ AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zi_u5);
 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_lsl);
 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_sxtw);
 AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_uxtw);
+AARCH64_DECL_OPD_INSERTER (ins_sve_aimm);
+AARCH64_DECL_OPD_INSERTER (ins_sve_asimm);
+AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_one);
+AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_two);
+AARCH64_DECL_OPD_INSERTER (ins_sve_float_zero_one);
 AARCH64_DECL_OPD_INSERTER (ins_sve_index);
+AARCH64_DECL_OPD_INSERTER (ins_sve_limm_mov);
+AARCH64_DECL_OPD_INSERTER (ins_sve_quad_index);
 AARCH64_DECL_OPD_INSERTER (ins_sve_reglist);
 AARCH64_DECL_OPD_INSERTER (ins_sve_scale);
+AARCH64_DECL_OPD_INSERTER (ins_sve_shlimm);
+AARCH64_DECL_OPD_INSERTER (ins_sve_shrimm);
+AARCH64_DECL_OPD_INSERTER (ins_imm_rotate1);
+AARCH64_DECL_OPD_INSERTER (ins_imm_rotate2);
 
 #undef AARCH64_DECL_OPD_INSERTER