X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Faarch64-asm.h;h=6f88d86fe0bca51354c253f1b3017b7800d1ebc6;hb=ef96a356b87730e05257297ad853ae4225c90c61;hp=df49db42eb38d6b64b40303ee9fb1ff05ca623f2;hpb=2571583aed598dd3f9651b53434e5f177a0e3cf7;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/aarch64-asm.h b/opcodes/aarch64-asm.h index df49db42eb..6f88d86fe0 100644 --- a/opcodes/aarch64-asm.h +++ b/opcodes/aarch64-asm.h @@ -1,5 +1,5 @@ /* aarch64-asm.h -- Header file for aarch64-asm.c and aarch64-asm-2.c. - Copyright (C) 2012-2017 Free Software Foundation, Inc. + Copyright (C) 2012-2020 Free Software Foundation, Inc. Contributed by ARM Ltd. This file is part of the GNU opcodes library. @@ -30,15 +30,17 @@ const aarch64_opcode* aarch64_find_real_opcode (const aarch64_opcode *); /* Switch-table-based high-level operand inserter. */ -const char* aarch64_insert_operand (const aarch64_operand *, +bfd_boolean aarch64_insert_operand (const aarch64_operand *, const aarch64_opnd_info *, aarch64_insn *, - const aarch64_inst *); + const aarch64_inst *, + aarch64_operand_error *); /* Operand inserters. */ #define AARCH64_DECL_OPD_INSERTER(x) \ - const char* aarch64_##x (const aarch64_operand *, const aarch64_opnd_info *, \ - aarch64_insn *, const aarch64_inst *) + bfd_boolean aarch64_##x (const aarch64_operand *, const aarch64_opnd_info *, \ + aarch64_insn *, const aarch64_inst *, \ + aarch64_operand_error *) AARCH64_DECL_OPD_INSERTER (ins_regno); AARCH64_DECL_OPD_INSERTER (ins_reglane); @@ -57,6 +59,7 @@ AARCH64_DECL_OPD_INSERTER (ins_limm); AARCH64_DECL_OPD_INSERTER (ins_inv_limm); AARCH64_DECL_OPD_INSERTER (ins_ft); AARCH64_DECL_OPD_INSERTER (ins_addr_simple); +AARCH64_DECL_OPD_INSERTER (ins_addr_offset); AARCH64_DECL_OPD_INSERTER (ins_addr_regoff); AARCH64_DECL_OPD_INSERTER (ins_addr_simm); AARCH64_DECL_OPD_INSERTER (ins_addr_simm10); @@ -71,6 +74,7 @@ AARCH64_DECL_OPD_INSERTER (ins_hint); AARCH64_DECL_OPD_INSERTER (ins_prfop); AARCH64_DECL_OPD_INSERTER (ins_reg_extended); AARCH64_DECL_OPD_INSERTER (ins_reg_shifted); +AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4xvl); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s6xvl); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s9xvl); @@ -88,11 +92,13 @@ AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_two); AARCH64_DECL_OPD_INSERTER (ins_sve_float_zero_one); AARCH64_DECL_OPD_INSERTER (ins_sve_index); AARCH64_DECL_OPD_INSERTER (ins_sve_limm_mov); +AARCH64_DECL_OPD_INSERTER (ins_sve_quad_index); AARCH64_DECL_OPD_INSERTER (ins_sve_reglist); AARCH64_DECL_OPD_INSERTER (ins_sve_scale); AARCH64_DECL_OPD_INSERTER (ins_sve_shlimm); AARCH64_DECL_OPD_INSERTER (ins_sve_shrimm); -AARCH64_DECL_OPD_INSERTER (ins_imm_rotate); +AARCH64_DECL_OPD_INSERTER (ins_imm_rotate1); +AARCH64_DECL_OPD_INSERTER (ins_imm_rotate2); #undef AARCH64_DECL_OPD_INSERTER