X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Falpha-dis.c;h=92e2d8e44edb94ba565d161ec14ac6e36d99320c;hb=b2c759ce68102931140ce34c2ac00619ba363622;hp=db2d8fac021fbd656a8920ec5249f5cd4399354d;hpb=ed288bb597072176e84fc8279707a3f2f475779b;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/alpha-dis.c b/opcodes/alpha-dis.c index db2d8fac02..92e2d8e44e 100644 --- a/opcodes/alpha-dis.c +++ b/opcodes/alpha-dis.c @@ -1,35 +1,33 @@ /* alpha-dis.c -- Disassemble Alpha AXP instructions - Copyright 1996, 1999 Free Software Foundation, Inc. + Copyright (C) 1996-2020 Free Software Foundation, Inc. Contributed by Richard Henderson , patterned after the PPC opcode handling written by Ian Lance Taylor. -This file is part of GDB, GAS, and the GNU binutils. + This file is part of libopcodes. -GDB, GAS, and the GNU binutils are free software; you can redistribute -them and/or modify them under the terms of the GNU General Public -License as published by the Free Software Foundation; either version -2, or (at your option) any later version. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -GDB, GAS, and the GNU binutils are distributed in the hope that they -will be useful, but WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See -the GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License -along with this file; see the file COPYING. If not, write to the Free -Software Foundation, 59 Temple Place - Suite 330, Boston, MA -02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this file; see the file COPYING. If not, write to the Free + Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA + 02110-1301, USA. */ -#include -#include "ansidecl.h" #include "sysdep.h" -#include "dis-asm.h" +#include +#include "disassemble.h" #include "opcode/alpha.h" /* OSF register names. */ -static const char * const osf_regnames[64] = -{ +static const char * const osf_regnames[64] = { "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", @@ -42,8 +40,7 @@ static const char * const osf_regnames[64] = /* VMS register names. */ -static const char * const vms_regnames[64] = -{ +static const char * const vms_regnames[64] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23", @@ -57,9 +54,7 @@ static const char * const vms_regnames[64] = /* Disassemble Alpha instructions. */ int -print_insn_alpha (memaddr, info) - bfd_vma memaddr; - struct disassemble_info *info; +print_insn_alpha (bfd_vma memaddr, struct disassemble_info *info) { static const struct alpha_opcode *opcode_index[AXP_NOPS+1]; const char * const * regnames; @@ -75,11 +70,11 @@ print_insn_alpha (memaddr, info) opcode_end = opcode + alpha_num_opcodes; for (op = 0; op < AXP_NOPS; ++op) - { - opcode_index[op] = opcode; - while (opcode < opcode_end && op == AXP_OP (opcode->opcode)) + { + opcode_index[op] = opcode; + while (opcode < opcode_end && op == AXP_OP (opcode->opcode)) ++opcode; - } + } opcode_index[op] = opcode; } @@ -108,8 +103,8 @@ print_insn_alpha (memaddr, info) int status = (*info->read_memory_func) (memaddr, buffer, 4, info); if (status != 0) { - (*info->memory_error_func) (status, memaddr, info); - return -1; + (*info->memory_error_func) (status, memaddr, info); + return -1; } insn = bfd_getl32 (buffer); } @@ -118,10 +113,10 @@ print_insn_alpha (memaddr, info) op = AXP_OP (insn); /* Find the first match in the opcode table. */ - opcode_end = opcode_index[op+1]; + opcode_end = opcode_index[op + 1]; for (opcode = opcode_index[op]; opcode < opcode_end; ++opcode) { - if ((insn & opcode->mask) != opcode->opcode) + if ((insn ^ opcode->opcode) & opcode->mask) continue; if (!(opcode->flags & isa_mask)) @@ -131,14 +126,14 @@ print_insn_alpha (memaddr, info) have extraction functions, and, if they do, make sure the instruction is valid. */ { - int invalid = 0; - for (opindex = opcode->operands; *opindex != 0; opindex++) + int invalid = 0; + for (opindex = opcode->operands; *opindex != 0; opindex++) { - const struct alpha_operand *operand = alpha_operands + *opindex; + const struct alpha_operand *operand = alpha_operands + *opindex; if (operand->extract) (*operand->extract) (insn, &invalid); } - if (invalid) + if (invalid) continue; } @@ -148,7 +143,7 @@ print_insn_alpha (memaddr, info) /* No instruction found */ (*info->fprintf_func) (info->stream, ".long %#08x", insn); - + return 4; found: @@ -183,7 +178,7 @@ found: } if (need_comma && - ((operand->flags & (AXP_OPERAND_PARENS|AXP_OPERAND_COMMA)) + ((operand->flags & (AXP_OPERAND_PARENS | AXP_OPERAND_COMMA)) != AXP_OPERAND_PARENS)) { (*info->fprintf_func) (info->stream, ","); @@ -195,7 +190,7 @@ found: if (operand->flags & AXP_OPERAND_IR) (*info->fprintf_func) (info->stream, "%s", regnames[value]); else if (operand->flags & AXP_OPERAND_FPR) - (*info->fprintf_func) (info->stream, "%s", regnames[value+32]); + (*info->fprintf_func) (info->stream, "%s", regnames[value + 32]); else if (operand->flags & AXP_OPERAND_RELATIVE) (*info->print_address_func) (memaddr + 4 + value, info); else if (operand->flags & AXP_OPERAND_SIGNED)