X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Farc-dis.c;h=a47e81f0a28be49522bb9e2e38bb43ec0b7c0b93;hb=747cfc8c6bb23d40b3fa987f6c3df9d3a0d7b817;hp=8207c05519320d315ac20fec1aa5202985a0878b;hpb=0f3f71676a8971e0376d7d99b383660f06ff4d95;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c index 8207c05519..a47e81f0a2 100644 --- a/opcodes/arc-dis.c +++ b/opcodes/arc-dis.c @@ -137,8 +137,7 @@ static bfd_boolean print_hex = FALSE; (info->endian == BFD_ENDIAN_LITTLE ? bfd_getm32 (bfd_getl32 (buf)) \ : bfd_getb32 (buf)) -#define BITS(word,s,e) (((word) << (sizeof (word) * 8 - 1 - e)) >> \ - (s + (sizeof (word) * 8 - 1 - e))) +#define BITS(word,s,e) (((word) >> (s)) & ((1ull << ((e) - (s)) << 1) - 1)) #define OPCODE_32BIT_INSN(word) (BITS ((word), 27, 31)) /* Functions implementation. */ @@ -295,7 +294,7 @@ find_format_from_table (struct disassemble_info *info, if (operand->extract) value = (*operand->extract) (insn, &invalid); else - value = (insn >> operand->shift) & ((1 << operand->bits) - 1); + value = (insn >> operand->shift) & ((1ull << operand->bits) - 1); /* Check for LIMM indicator. If it is there, then make sure we pick the right format. */ @@ -672,7 +671,7 @@ arc_insn_length (bfd_byte msb, bfd_byte lsb, struct disassemble_info *info) break; default: - abort (); + return 0; } } @@ -1009,7 +1008,6 @@ print_insn_arc (bfd_vma memaddr, the number of bytes objdump should display on a single line. If the instruction decoder sets this, it should always set it to the same value in order to get reasonable looking output. */ - info->bytes_per_line = 8; /* In the next lines, we set two info variables control the way @@ -1017,7 +1015,6 @@ print_insn_arc (bfd_vma memaddr, 8 and bytes_per_chunk is 4, the output will look like this: 00: 00000000 00000000 with the chunks displayed according to "display_endian". */ - if (info->section && !(info->section->flags & SEC_CODE)) { @@ -1072,13 +1069,16 @@ print_insn_arc (bfd_vma memaddr, (*info->fprintf_func) (info->stream, ".word\t0x%08lx", data); break; default: - abort (); + return -1; } return size; } insn_len = arc_insn_length (buffer[highbyte], buffer[lowbyte], info); pr_debug ("instruction length = %d bytes\n", insn_len); + if (insn_len == 0) + return -1; + arc_infop = info->private_data; arc_infop->insn_len = insn_len; @@ -1131,7 +1131,7 @@ print_insn_arc (bfd_vma memaddr, default: /* There is no instruction whose length is not 2, 4, 6, or 8. */ - abort (); + return -1; } pr_debug ("instruction value = %llx\n", insn); @@ -1159,24 +1159,28 @@ print_insn_arc (bfd_vma memaddr, (*info->fprintf_func) (info->stream, ".shor\t%#04llx", insn & 0xffff); break; + case 4: (*info->fprintf_func) (info->stream, ".word\t%#08llx", insn & 0xffffffff); break; + case 6: (*info->fprintf_func) (info->stream, ".long\t%#08llx", insn & 0xffffffff); (*info->fprintf_func) (info->stream, ".long\t%#04llx", (insn >> 32) & 0xffff); break; + case 8: (*info->fprintf_func) (info->stream, ".long\t%#08llx", insn & 0xffffffff); (*info->fprintf_func) (info->stream, ".long\t%#08llx", insn >> 32); break; + default: - abort (); + return -1; } info->insn_type = dis_noninsn;