X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fbfin-dis.c;h=4f66f12e3cb01007ac244e21abdae8ce0cc10b02;hb=c7d7aea2f5fadff84eee78aaa0b1830016d26319;hp=393276273e68405e189830eabad2606dd4548662;hpb=13c02f06ff791ad9a09b562b141f07d9cefd52f8;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c
index 393276273e..4f66f12e3c 100644
--- a/opcodes/bfin-dis.c
+++ b/opcodes/bfin-dis.c
@@ -1,6 +1,5 @@
 /* Disassemble ADI Blackfin Instructions.
-   Copyright 2005, 2006, 2007, 2008, 2009, 2010, 2011
-   Free Software Foundation, Inc.
+   Copyright (C) 2005-2020 Free Software Foundation, Inc.
 
    This file is part of libopcodes.
 
@@ -19,9 +18,8 @@
    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
    MA 02110-1301, USA.  */
 
+#include "sysdep.h"
 #include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
 
 #include "opcode/bfin.h"
 
@@ -35,17 +33,19 @@
 
 typedef long TIword;
 
-#define HOST_LONG_WORD_SIZE (sizeof (long) * 8)
-#define XFIELD(w,p,s)       (((w) & ((1 << (s)) - 1) << (p)) >> (p))
-#define SIGNEXTEND(v, n)    ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n)))
-#define MASKBITS(val, bits) (val & ((1 << bits) - 1))
+#define SIGNBIT(bits)       (1ul << ((bits) - 1))
+#define MASKBITS(val, bits) ((val) & ((1ul << (bits)) - 1))
+#define SIGNEXTEND(v, n)    ((MASKBITS (v, n) ^ SIGNBIT (n)) - SIGNBIT (n))
 
-#include "dis-asm.h"
+#include "disassemble.h"
 
 typedef unsigned int bu32;
 
-static char comment = 0;
-static char parallel = 0;
+struct private
+{
+  TIword iw0;
+  bfd_boolean comment, parallel;
+};
 
 typedef enum
 {
@@ -124,24 +124,28 @@ fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info *outf)
 
   if (constant_formats[cf].reloc)
     {
-      bfd_vma ea = (((constant_formats[cf].pcrel ? SIGNEXTEND (x, constant_formats[cf].nbits)
-		      : x) + constant_formats[cf].offset) << constant_formats[cf].scale);
+      bfd_vma ea;
+
+      if (constant_formats[cf].pcrel)
+	x = SIGNEXTEND (x, constant_formats[cf].nbits);
+      ea = x + constant_formats[cf].offset;
+      ea = ea << constant_formats[cf].scale;
       if (constant_formats[cf].pcrel)
 	ea += pc;
 
-     /* truncate to 32-bits for proper symbol lookup/matching */
-     ea = (bu32)ea;
+      /* truncate to 32-bits for proper symbol lookup/matching */
+      ea = (bu32)ea;
 
-     if (outf->symbol_at_address_func (ea, outf) || !constant_formats[cf].exact)
-       {
+      if (outf->symbol_at_address_func (ea, outf) || !constant_formats[cf].exact)
+	{
 	  outf->print_address_func (ea, outf);
 	  return "";
-       }
-     else
-       {
+	}
+      else
+	{
 	  sprintf (buf, "%lx", (unsigned long) x);
 	  return buf;
-       }
+	}
     }
 
   /* Negative constants have an implied sign bit.  */
@@ -149,33 +153,21 @@ fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info *outf)
     {
       int nb = constant_formats[cf].nbits + 1;
 
-      x = x | (1 << constant_formats[cf].nbits);
+      x = x | (1ul << constant_formats[cf].nbits);
       x = SIGNEXTEND (x, nb);
     }
-  else
-    x = constant_formats[cf].issigned ? SIGNEXTEND (x, constant_formats[cf].nbits) : x;
-
-  if (constant_formats[cf].offset)
-    x += constant_formats[cf].offset;
+  else if (constant_formats[cf].issigned)
+    x = SIGNEXTEND (x, constant_formats[cf].nbits);
 
-  if (constant_formats[cf].scale)
-    x <<= constant_formats[cf].scale;
+  x += constant_formats[cf].offset;
+  x = (unsigned long) x << constant_formats[cf].scale;
 
   if (constant_formats[cf].decimal)
-    {
-      if (constant_formats[cf].leading)
-	{
-	  char ps[10];
-	  sprintf (ps, "%%%ii", constant_formats[cf].leading);
-	  sprintf (buf, ps, x);
-	}
-      else
-	sprintf (buf, "%li", x);
-    }
+    sprintf (buf, "%*li", constant_formats[cf].leading, x);
   else
     {
       if (constant_formats[cf].issigned && x < 0)
-	sprintf (buf, "-0x%x", abs (x));
+	sprintf (buf, "-0x%lx", (unsigned long)(- x));
       else
 	sprintf (buf, "0x%lx", (unsigned long) x);
     }
@@ -188,10 +180,12 @@ fmtconst_val (const_forms_t cf, unsigned int x, unsigned int pc)
 {
   if (0 && constant_formats[cf].reloc)
     {
-      bu32 ea = (((constant_formats[cf].pcrel
-		   ? SIGNEXTEND (x, constant_formats[cf].nbits)
-		   : x) + constant_formats[cf].offset)
-		 << constant_formats[cf].scale);
+      bu32 ea;
+
+      if (constant_formats[cf].pcrel)
+	x = SIGNEXTEND (x, constant_formats[cf].nbits);
+      ea = x + constant_formats[cf].offset;
+      ea = ea << constant_formats[cf].scale;
       if (constant_formats[cf].pcrel)
 	ea += pc;
 
@@ -202,7 +196,7 @@ fmtconst_val (const_forms_t cf, unsigned int x, unsigned int pc)
   if (constant_formats[cf].negative)
     {
       int nb = constant_formats[cf].nbits + 1;
-      x = x | (1 << constant_formats[cf].nbits);
+      x = x | (1ul << constant_formats[cf].nbits);
       x = SIGNEXTEND (x, nb);
     }
   else if (constant_formats[cf].issigned)
@@ -319,7 +313,7 @@ static const enum machine_registers decode_pregs[] =
 
 #define pregs(x)	REGNAME (decode_pregs[(x) & 7])
 #define spfp(x)		REGNAME (decode_spfp[(x) & 1])
-#define dregs_hilo(x,i)	REGNAME (decode_dregs_hilo[((i) << 3)|x])
+#define dregs_hilo(x, i)	REGNAME (decode_dregs_hilo[((i) << 3) | (x)])
 #define accum_ext(x)	REGNAME (decode_accum_ext[(x) & 1])
 #define accum_word(x)	REGNAME (decode_accum_word[(x) & 1])
 #define accum(x)	REGNAME (decode_accum[(x) & 1])
@@ -358,7 +352,7 @@ static const enum machine_registers decode_gregs[] =
   REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
 };
 
-#define gregs(x,i) REGNAME (decode_gregs[((i) << 3)|x])
+#define gregs(x, i) REGNAME (decode_gregs[(((i) << 3) | (x)) & 15])
 
 /* [dregs pregs (iregs mregs) (bregs lregs)].  */
 static const enum machine_registers decode_regs[] =
@@ -369,7 +363,7 @@ static const enum machine_registers decode_regs[] =
   REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
 };
 
-#define regs(x,i) REGNAME (decode_regs[((i) << 3)|x])
+#define regs(x, i) REGNAME (decode_regs[(((i) << 3) | (x)) & 31])
 
 /* [dregs pregs (iregs mregs) (bregs lregs) Low Half].  */
 static const enum machine_registers decode_regs_lo[] =
@@ -380,7 +374,8 @@ static const enum machine_registers decode_regs_lo[] =
   REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3,
 };
 
-#define regs_lo(x,i) REGNAME (decode_regs_lo[((i) << 3)|x])
+#define regs_lo(x, i) REGNAME (decode_regs_lo[(((i) << 3) | (x)) & 31])
+
 /* [dregs pregs (iregs mregs) (bregs lregs) High Half].  */
 static const enum machine_registers decode_regs_hi[] =
 {
@@ -390,7 +385,7 @@ static const enum machine_registers decode_regs_hi[] =
   REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3,
 };
 
-#define regs_hi(x,i) REGNAME (decode_regs_hi[((i) << 3)|x])
+#define regs_hi(x, i) REGNAME (decode_regs_hi[(((i) << 3) | (x)) & 31])
 
 static const enum machine_registers decode_statbits[] =
 {
@@ -443,7 +438,7 @@ static const enum machine_registers decode_allregs[] =
 #define allreg(r,g)	(!IS_RESERVEDREG (g, r))
 #define mostreg(r,g)	(!(IS_DREG (g, r) || IS_PREG (g, r) || IS_RESERVEDREG (g, r)))
 
-#define allregs(x,i)	REGNAME (decode_allregs[((i) << 3) | x])
+#define allregs(x, i)	REGNAME (decode_allregs[((i) << 3) | (x)])
 #define uimm16s4(x)	fmtconst (c_uimm16s4, x, 0, outf)
 #define uimm16s4d(x)	fmtconst (c_uimm16s4d, x, 0, outf)
 #define pcrel4(x)	fmtconst (c_pcrel4, x, pc, outf)
@@ -489,8 +484,9 @@ static const enum machine_registers decode_allregs[] =
 
 /* (arch.pm)arch_disassembler_functions.  */
 #ifndef OUTS
-#define OUTS(p, txt) ((p) ? (((txt)[0]) ? (p->fprintf_func)(p->stream, "%s", txt) :0) :0)
+#define OUTS(p, txt) (p)->fprintf_func ((p)->stream, "%s", txt)
 #endif
+#define OUT(p, txt, ...) (p)->fprintf_func ((p)->stream, txt, ## __VA_ARGS__)
 
 static void
 amod0 (int s0, int x0, disassemble_info *outf)
@@ -560,7 +556,7 @@ aligndir (int r0, disassemble_info *outf)
 }
 
 static int
-decode_multfunc (int h0, int h1, int src0, int src1, disassemble_info * outf)
+decode_multfunc (int h0, int h1, int src0, int src1, disassemble_info *outf)
 {
   const char *s0, *s1;
 
@@ -581,7 +577,7 @@ decode_multfunc (int h0, int h1, int src0, int src1, disassemble_info * outf)
 }
 
 static int
-decode_macfunc (int which, int op, int h0, int h1, int src0, int src1, disassemble_info * outf)
+decode_macfunc (int which, int op, int h0, int h1, int src0, int src1, disassemble_info *outf)
 {
   const char *a;
   const char *sop = "<unknown op>";
@@ -653,53 +649,31 @@ decode_optmode (int mod, int MM, disassemble_info *outf)
   OUTS (outf, ")");
 }
 
-struct saved_state
+static struct saved_state
 {
   bu32 dpregs[16], iregs[4], mregs[4], bregs[4], lregs[4];
-  bu32 a0x, a0w, a1x, a1w;
+  bu32 ax[2], aw[2];
   bu32 lt[2], lc[2], lb[2];
-  int ac0, ac0_copy, ac1, an, aq;
-  int av0, av0s, av1, av1s, az, cc, v, v_copy, vs;
-  int rnd_mod;
-  int v_internal;
-  bu32 pc, rets;
-
-  int ticks;
-  int insts;
-
-  int exception;
-
-  int end_of_registers;
-
-  int msize;
-  unsigned char *memory;
-  unsigned long bfd_mach;
-}  saved_state;
+  bu32 rets;
+} saved_state;
 
 #define DREG(x)         (saved_state.dpregs[x])
-#define GREG(x,i)       DPREG ((x) | (i << 3))
+#define GREG(x, i)      DPREG ((x) | ((i) << 3))
 #define DPREG(x)        (saved_state.dpregs[x])
 #define DREG(x)         (saved_state.dpregs[x])
-#define PREG(x)         (saved_state.dpregs[x + 8])
+#define PREG(x)         (saved_state.dpregs[(x) + 8])
 #define SPREG           PREG (6)
 #define FPREG           PREG (7)
 #define IREG(x)         (saved_state.iregs[x])
 #define MREG(x)         (saved_state.mregs[x])
 #define BREG(x)         (saved_state.bregs[x])
 #define LREG(x)         (saved_state.lregs[x])
-#define A0XREG          (saved_state.a0x)
-#define A0WREG          (saved_state.a0w)
-#define A1XREG          (saved_state.a1x)
-#define A1WREG          (saved_state.a1w)
-#define CCREG           (saved_state.cc)
-#define LC0REG          (saved_state.lc[0])
-#define LT0REG          (saved_state.lt[0])
-#define LB0REG          (saved_state.lb[0])
-#define LC1REG          (saved_state.lc[1])
-#define LT1REG          (saved_state.lt[1])
-#define LB1REG          (saved_state.lb[1])
+#define AXREG(x)        (saved_state.ax[x])
+#define AWREG(x)        (saved_state.aw[x])
+#define LCREG(x)        (saved_state.lc[x])
+#define LTREG(x)        (saved_state.lt[x])
+#define LBREG(x)        (saved_state.lb[x])
 #define RETSREG         (saved_state.rets)
-#define PCREG           (saved_state.pc)
 
 static bu32 *
 get_allreg (int grp, int reg)
@@ -717,34 +691,35 @@ get_allreg (int grp, int reg)
      REG_LASTREG */
   switch (fullreg >> 2)
     {
-    case 0: case 1: return &DREG (reg); break;
-    case 2: case 3: return &PREG (reg); break;
-    case 4: return &IREG (reg & 3); break;
-    case 5: return &MREG (reg & 3); break;
-    case 6: return &BREG (reg & 3); break;
-    case 7: return &LREG (reg & 3); break;
+    case 0: case 1: return &DREG (reg);
+    case 2: case 3: return &PREG (reg);
+    case 4: return &IREG (reg & 3);
+    case 5: return &MREG (reg & 3);
+    case 6: return &BREG (reg & 3);
+    case 7: return &LREG (reg & 3);
     default:
       switch (fullreg)
 	{
-	case 32: return &saved_state.a0x;
-	case 33: return &saved_state.a0w;
-	case 34: return &saved_state.a1x;
-	case 35: return &saved_state.a1w;
-	case 39: return &saved_state.rets;
-	case 48: return &LC0REG;
-	case 49: return &LT0REG;
-	case 50: return &LB0REG;
-	case 51: return &LC1REG;
-	case 52: return &LT1REG;
-	case 53: return &LB1REG;
+	case 32: return &AXREG (0);
+	case 33: return &AWREG (0);
+	case 34: return &AXREG (1);
+	case 35: return &AWREG (1);
+	case 39: return &RETSREG;
+	case 48: return &LCREG (0);
+	case 49: return &LTREG (0);
+	case 50: return &LBREG (0);
+	case 51: return &LCREG (1);
+	case 52: return &LTREG (1);
+	case 53: return &LBREG (1);
 	}
-      return 0;
     }
+  abort ();
 }
 
 static int
 decode_ProgCtrl_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* ProgCtrl
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........|
@@ -754,7 +729,7 @@ decode_ProgCtrl_0 (TIword iw0, disassemble_info *outf)
 
   if (prgfunc == 0 && poprnd == 0)
     OUTS (outf, "NOP");
-  else if (parallel)
+  else if (priv->parallel)
     return 0;
   else if (prgfunc == 1 && poprnd == 0)
     OUTS (outf, "RTS");
@@ -832,6 +807,7 @@ decode_ProgCtrl_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_CaCTRL_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* CaCTRL
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
@@ -840,7 +816,7 @@ decode_CaCTRL_0 (TIword iw0, disassemble_info *outf)
   int op  = ((iw0 >> CaCTRL_op_bits) & CaCTRL_op_mask);
   int reg = ((iw0 >> CaCTRL_reg_bits) & CaCTRL_reg_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (a == 0 && op == 0)
@@ -899,6 +875,7 @@ decode_CaCTRL_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_PushPopReg_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* PushPopReg
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......|
@@ -907,7 +884,7 @@ decode_PushPopReg_0 (TIword iw0, disassemble_info *outf)
   int grp = ((iw0 >> PushPopReg_grp_bits) & PushPopReg_grp_mask);
   int reg = ((iw0 >> PushPopReg_reg_bits) & PushPopReg_reg_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (W == 0 && mostreg (reg, grp))
@@ -928,6 +905,7 @@ decode_PushPopReg_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* PushPopMultiple
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........|
@@ -938,7 +916,7 @@ decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf)
   int dr = ((iw0 >> PushPopMultiple_dr_bits) & PushPopMultiple_dr_mask);
   int pr = ((iw0 >> PushPopMultiple_pr_bits) & PushPopMultiple_pr_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (pr > 5)
@@ -992,6 +970,7 @@ decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_ccMV_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* ccMV
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......|
@@ -1002,7 +981,7 @@ decode_ccMV_0 (TIword iw0, disassemble_info *outf)
   int src = ((iw0 >> CCmv_src_bits) & CCmv_src_mask);
   int dst = ((iw0 >> CCmv_dst_bits) & CCmv_dst_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (T == 1)
@@ -1027,6 +1006,7 @@ decode_ccMV_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_CCflag_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* CCflag
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
@@ -1037,7 +1017,7 @@ decode_CCflag_0 (TIword iw0, disassemble_info *outf)
   int G = ((iw0 >> CCflag_G_bits) & CCflag_G_mask);
   int opc = ((iw0 >> CCflag_opc_bits) & CCflag_opc_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (opc == 0 && I == 0 && G == 0)
@@ -1205,6 +1185,7 @@ decode_CCflag_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_CC2dreg_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* CC2dreg
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......|
@@ -1212,7 +1193,7 @@ decode_CC2dreg_0 (TIword iw0, disassemble_info *outf)
   int op  = ((iw0 >> CC2dreg_op_bits) & CC2dreg_op_mask);
   int reg = ((iw0 >> CC2dreg_reg_bits) & CC2dreg_reg_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (op == 0)
@@ -1236,6 +1217,7 @@ decode_CC2dreg_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_CC2stat_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* CC2stat
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............|
@@ -1245,8 +1227,9 @@ decode_CC2stat_0 (TIword iw0, disassemble_info *outf)
   int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask);
 
   const char *bitname = statbits (cbit);
+  const char * const op_names[] = { "", "|", "&", "^" } ;
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (decode_statbits[cbit] == REG_LASTREG)
@@ -1262,48 +1245,10 @@ decode_CC2stat_0 (TIword iw0, disassemble_info *outf)
       bitname = bitnames;
     }
 
-  if (op == 0 && D == 0)
-    {
-      OUTS (outf, "CC = ");
-      OUTS (outf, bitname);
-    }
-  else if (op == 1 && D == 0)
-    {
-      OUTS (outf, "CC |= ");
-      OUTS (outf, bitname);
-    }
-  else if (op == 2 && D == 0)
-    {
-      OUTS (outf, "CC &= ");
-      OUTS (outf, bitname);
-    }
-  else if (op == 3 && D == 0)
-    {
-      OUTS (outf, "CC ^= ");
-      OUTS (outf, bitname);
-    }
-  else if (op == 0 && D == 1)
-    {
-      OUTS (outf, bitname);
-      OUTS (outf, " = CC");
-    }
-  else if (op == 1 && D == 1)
-    {
-      OUTS (outf, bitname);
-      OUTS (outf, " |= CC");
-    }
-  else if (op == 2 && D == 1)
-    {
-      OUTS (outf, bitname);
-      OUTS (outf, " &= CC");
-    }
-  else if (op == 3 && D == 1)
-    {
-      OUTS (outf, bitname);
-      OUTS (outf, " ^= CC");
-    }
+  if (D == 0)
+    OUT (outf, "CC %s= %s", op_names[op], bitname);
   else
-    return 0;
+    OUT (outf, "%s %s= CC", bitname, op_names[op]);
 
   return 2;
 }
@@ -1311,6 +1256,7 @@ decode_CC2stat_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_BRCC_0 (TIword iw0, bfd_vma pc, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* BRCC
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................|
@@ -1319,7 +1265,7 @@ decode_BRCC_0 (TIword iw0, bfd_vma pc, disassemble_info *outf)
   int T = ((iw0 >> BRCC_T_bits) & BRCC_T_mask);
   int offset = ((iw0 >> BRCC_offset_bits) & BRCC_offset_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (T == 1 && B == 1)
@@ -1353,13 +1299,14 @@ decode_BRCC_0 (TIword iw0, bfd_vma pc, disassemble_info *outf)
 static int
 decode_UJUMP_0 (TIword iw0, bfd_vma pc, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* UJUMP
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 0 | 1 | 0 |.offset........................................|
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+  */
   int offset = ((iw0 >> UJump_offset_bits) & UJump_offset_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   OUTS (outf, "JUMP.S 0x");
@@ -1379,7 +1326,7 @@ decode_REGMV_0 (TIword iw0, disassemble_info *outf)
   int src = ((iw0 >> RegMv_src_bits) & RegMv_src_mask);
   int dst = ((iw0 >> RegMv_dst_bits) & RegMv_dst_mask);
 
- /* Reserved slots cannot be a src/dst.  */
+  /* Reserved slots cannot be a src/dst.  */
   if (IS_RESERVEDREG (gs, src) || IS_RESERVEDREG (gd, dst))
     goto invalid_move;
 
@@ -1603,6 +1550,7 @@ decode_PTR2op_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_LOGI2op_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* LOGI2op
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......|
@@ -1611,7 +1559,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf)
   int opc = ((iw0 >> LOGI2op_opc_bits) & LOGI2op_opc_mask);
   int dst = ((iw0 >> LOGI2op_dst_bits) & LOGI2op_dst_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (opc == 0)
@@ -1623,7 +1571,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf)
       OUTS (outf, ");\t\t/* bit");
       OUTS (outf, imm7d (src));
       OUTS (outf, " */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else if (opc == 1)
     {
@@ -1634,7 +1582,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf)
       OUTS (outf, ");\t\t/* bit");
       OUTS (outf, imm7d (src));
       OUTS (outf, " */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else if (opc == 2)
     {
@@ -1645,7 +1593,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf)
       OUTS (outf, ");\t\t/* bit");
       OUTS (outf, imm7d (src));
       OUTS (outf, " */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else if (opc == 3)
     {
@@ -1656,7 +1604,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf)
       OUTS (outf, ");\t\t/* bit");
       OUTS (outf, imm7d (src));
       OUTS (outf, " */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else if (opc == 4)
     {
@@ -1667,7 +1615,7 @@ decode_LOGI2op_0 (TIword iw0, disassemble_info *outf)
       OUTS (outf, ");\t\t/* bit");
       OUTS (outf, imm7d (src));
       OUTS (outf, " */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else if (opc == 5)
     {
@@ -1787,6 +1735,7 @@ decode_COMP3op_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* COMPI2opD
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 1 | 1 | 0 | 0 |.op|..src......................|.dst.......|
@@ -1797,7 +1746,7 @@ decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf)
 
   bu32 *pval = get_allreg (0, dst);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   /* Since we don't have 32-bit immediate loads, we allow the disassembler
@@ -1824,7 +1773,7 @@ decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf)
       OUTS (outf, "(");
       OUTS (outf, imm32 (*pval));
       OUTS (outf, ") */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else if (op == 1)
     {
@@ -1834,7 +1783,7 @@ decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf)
       OUTS (outf, ";\t\t/* (");
       OUTS (outf, imm7d (src));
       OUTS (outf, ") */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else
     return 0;
@@ -1845,6 +1794,7 @@ decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* COMPI2opP
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......|
@@ -1855,7 +1805,7 @@ decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf)
 
   bu32 *pval = get_allreg (1, dst);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (op == 0)
@@ -1879,7 +1829,7 @@ decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf)
       OUTS (outf, "(");
       OUTS (outf, imm32 (*pval));
       OUTS (outf, ") */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else if (op == 1)
     {
@@ -1889,7 +1839,7 @@ decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf)
       OUTS (outf, ";\t\t/* (");
       OUTS (outf, imm7d (src));
       OUTS (outf, ") */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else
     return 0;
@@ -2056,6 +2006,7 @@ decode_dagMODim_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_dagMODik_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* dagMODik
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....|
@@ -2086,16 +2037,16 @@ decode_dagMODik_0 (TIword iw0, disassemble_info *outf)
   else
     return 0;
 
- if (! parallel )
-   {
-     OUTS (outf, ";\t\t/* (  ");
-     if (op == 0 || op == 1)
-       OUTS (outf, "2");
-     else if (op == 2 || op == 3)
+  if (!priv->parallel)
+    {
+      OUTS (outf, ";\t\t/* (  ");
+      if (op == 0 || op == 1)
+	OUTS (outf, "2");
+      else if (op == 2 || op == 3)
 	OUTS (outf, "4");
-     OUTS (outf, ") */");
-    comment = 1;
-  }
+      OUTS (outf, ") */");
+      priv->comment = TRUE;
+    }
 
   return 2;
 }
@@ -2609,6 +2560,7 @@ decode_LDSTii_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* LoopSetup
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......|
@@ -2620,7 +2572,10 @@ decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf)
   int soffset = ((iw0 >> (LoopSetup_soffset_bits - 16)) & LoopSetup_soffset_mask);
   int eoffset = ((iw1 >> LoopSetup_eoffset_bits) & LoopSetup_eoffset_mask);
 
-  if (parallel)
+  if (priv->parallel)
+    return 0;
+
+  if (reg > 7)
     return 0;
 
   if (rop == 0)
@@ -2667,6 +2622,7 @@ decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf)
 static int
 decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* LDIMMhalf
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......|
@@ -2681,7 +2637,7 @@ decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 
   bu32 *pval = get_allreg (grp, reg);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   /* Since we don't have 32-bit immediate loads, we allow the disassembler
@@ -2736,7 +2692,7 @@ decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf)
       OUTS (outf, " (X)");
     }
   else if (H == 0 && S == 1 && Z == 0)
-   {
+    {
       OUTS (outf, regs (reg, grp));
       OUTS (outf, " = ");
       OUTS (outf, imm16 (hword));
@@ -2789,18 +2745,18 @@ decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 	}
 
       OUTS (outf, " */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   if (S == 1 || Z == 1)
     {
-       OUTS (outf, ";\t\t/*\t\t");
-       OUTS (outf, regs (reg, grp));
-       OUTS (outf, "=0x");
-       OUTS (outf, huimm32e (*pval));
-       OUTS (outf, "(");
-       OUTS (outf, imm32 (*pval));
-       OUTS (outf, ") */");
-       comment = 1;
+      OUTS (outf, ";\t\t/*\t\t");
+      OUTS (outf, regs (reg, grp));
+      OUTS (outf, "=0x");
+      OUTS (outf, huimm32e (*pval));
+      OUTS (outf, "(");
+      OUTS (outf, imm32 (*pval));
+      OUTS (outf, ") */");
+      priv->comment = TRUE;
     }
   return 4;
 }
@@ -2808,6 +2764,7 @@ decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 static int
 decode_CALLa_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* CALLa
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................|
@@ -2817,7 +2774,7 @@ decode_CALLa_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf)
   int lsw = ((iw1 >> 0) & 0xffff);
   int msw = ((iw0 >> 0) & 0xff);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (S == 1)
@@ -2945,6 +2902,7 @@ decode_LDSTidxI_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 static int
 decode_linkage_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* linkage
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.|
@@ -2953,7 +2911,7 @@ decode_linkage_0 (TIword iw0, TIword iw1, disassemble_info *outf)
   int R = ((iw0 >> (Linkage_R_bits - 16)) & Linkage_R_mask);
   int framesize = ((iw1 >> Linkage_framesize_bits) & Linkage_framesize_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (R == 0)
@@ -2963,7 +2921,7 @@ decode_linkage_0 (TIword iw0, TIword iw1, disassemble_info *outf)
       OUTS (outf, ";\t\t/* (");
       OUTS (outf, uimm16s4d (framesize));
       OUTS (outf, ") */");
-      comment = 1;
+      priv->comment = TRUE;
     }
   else if (R == 1)
     OUTS (outf, "UNLINK");
@@ -3028,13 +2986,16 @@ decode_dsp32mac_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 	{
 	  if (MM)
 	    OUTS (outf, " (M)");
-	  MM = 0;
 	  OUTS (outf, ", ");
 	}
     }
 
   if (w0 == 1 || op0 != 3)
     {
+      /* Clear MM option since it only matters for MAC1, and if we made
+         it this far, we've already shown it or we want to ignore it.  */
+      MM = 0;
+
       if (w0)
 	OUTS (outf, P ? dregs (dst) : dregs_lo (dst));
 
@@ -4361,7 +4322,6 @@ decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf)
   int sopcde   = ((iw0 >> (DSP32ShiftImm_sopcde_bits - 16)) & DSP32ShiftImm_sopcde_mask);
   int HLs      = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask);
 
-
   if (sop == 0 && sopcde == 0)
     {
       OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0));
@@ -4539,6 +4499,7 @@ decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 static int
 decode_pseudoDEBUG_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* pseudoDEBUG
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......|
@@ -4547,7 +4508,7 @@ decode_pseudoDEBUG_0 (TIword iw0, disassemble_info *outf)
   int grp = ((iw0 >> PseudoDbg_grp_bits) & PseudoDbg_grp_mask);
   int reg = ((iw0 >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (reg == 0 && fn == 3)
@@ -4598,13 +4559,14 @@ decode_pseudoDEBUG_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_pseudoOChar_0 (TIword iw0, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* psedoOChar
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |.ch............................|
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+  */
   int ch = ((iw0 >> PseudoChr_ch_bits) & PseudoChr_ch_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   OUTS (outf, "OUTC ");
@@ -4616,6 +4578,7 @@ decode_pseudoOChar_0 (TIword iw0, disassemble_info *outf)
 static int
 decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf)
 {
+  struct private *priv = outf->private_data;
   /* pseudodbg_assert
      +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
      | 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...|
@@ -4626,7 +4589,7 @@ decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf)
   int grp      = ((iw0 >> (PseudoDbg_Assert_grp_bits - 16)) & PseudoDbg_Assert_grp_mask);
   int regtest  = ((iw0 >> (PseudoDbg_Assert_regtest_bits - 16)) & PseudoDbg_Assert_regtest_mask);
 
-  if (parallel)
+  if (priv->parallel)
     return 0;
 
   if (dbgop == 0)
@@ -4666,31 +4629,59 @@ decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf)
   return 4;
 }
 
+static int
+ifetch (bfd_vma pc, disassemble_info *outf, TIword *iw)
+{
+  bfd_byte buf[2];
+  int status;
+
+  status = (*outf->read_memory_func) (pc, buf, 2, outf);
+  if (status != 0)
+    {
+      (*outf->memory_error_func) (status, pc, outf);
+      return -1;
+    }
+
+  *iw = bfd_getl16 (buf);
+  return 0;
+}
+
 static int
 _print_insn_bfin (bfd_vma pc, disassemble_info *outf)
 {
-  bfd_byte buf[4];
+  struct private *priv = outf->private_data;
   TIword iw0;
   TIword iw1;
-  int status;
   int rv = 0;
 
-  status = (*outf->read_memory_func) (pc & ~0x1, buf, 2, outf);
-  /* FIXME */
-  (void) status;
-  status = (*outf->read_memory_func) ((pc + 2) & ~0x1, buf + 2, 2, outf);
-  /* FIXME */
-  (void) status;
+  /* The PC must be 16-bit aligned.  */
+  if (pc & 1)
+    {
+      OUTS (outf, "ILLEGAL (UNALIGNED)");
+      /* For people dumping data, just re-align the return value.  */
+      return 1;
+    }
+
+  if (ifetch (pc, outf, &iw0))
+    return -1;
+  priv->iw0 = iw0;
 
-  iw0 = bfd_getl16 (buf);
-  iw1 = bfd_getl16 (buf + 2);
+  if (((iw0 & 0xc000) == 0xc000) && ((iw0 & 0xff00) != 0xf800))
+    {
+      /* 32-bit insn.  */
+      if (ifetch (pc + 2, outf, &iw1))
+	return -1;
+    }
+  else
+    /* 16-bit insn.  */
+    iw1 = 0;
 
   if ((iw0 & 0xf7ff) == 0xc003 && iw1 == 0x1800)
     {
-      if (parallel)
+      if (priv->parallel)
 	{
-	   OUTS (outf, "ILLEGAL");
-	   return 0;
+	  OUTS (outf, "ILLEGAL");
+	  return 0;
 	}
       OUTS (outf, "MNOP");
       return 4;
@@ -4776,58 +4767,57 @@ _print_insn_bfin (bfd_vma pc, disassemble_info *outf)
   return rv;
 }
 
-
 int
 print_insn_bfin (bfd_vma pc, disassemble_info *outf)
 {
-  bfd_byte buf[2];
-  unsigned short iw0;
-  int status;
-  int count = 0;
+  struct private priv;
+  int count;
 
-  status = (*outf->read_memory_func) (pc & ~0x01, buf, 2, outf);
-  /* FIXME */
-  (void) status;
-  iw0 = bfd_getl16 (buf);
+  priv.parallel = FALSE;
+  priv.comment = FALSE;
+  outf->private_data = &priv;
 
-  count += _print_insn_bfin (pc, outf);
+  count = _print_insn_bfin (pc, outf);
+  if (count == -1)
+    return -1;
 
   /* Proper display of multiple issue instructions.  */
 
-  if (count == 4 && (iw0 & 0xc000) == 0xc000 && (iw0 & BIT_MULTI_INS)
-      && ((iw0 & 0xe800) != 0xe800 /* Not Linkage.  */ ))
+  if (count == 4 && (priv.iw0 & 0xc000) == 0xc000 && (priv.iw0 & BIT_MULTI_INS)
+      && ((priv.iw0 & 0xe800) != 0xe800 /* Not Linkage.  */ ))
     {
-      int legal = 1;
+      bfd_boolean legal = TRUE;
       int len;
 
-      parallel = 1;
-      outf->fprintf_func (outf->stream, " || ");
+      priv.parallel = TRUE;
+      OUTS (outf, " || ");
       len = _print_insn_bfin (pc + 4, outf);
-      outf->fprintf_func (outf->stream, " || ");
+      if (len == -1)
+	return -1;
+      OUTS (outf, " || ");
       if (len != 2)
-	  legal = 0;
+	legal = FALSE;
       len = _print_insn_bfin (pc + 6, outf);
+      if (len == -1)
+	return -1;
       if (len != 2)
-	legal = 0;
+	legal = FALSE;
 
       if (legal)
 	count = 8;
       else
 	{
-	  outf->fprintf_func (outf->stream, ";\t\t/* ILLEGAL PARALLEL INSTRUCTION */");
-	  comment = 1;
+	  OUTS (outf, ";\t\t/* ILLEGAL PARALLEL INSTRUCTION */");
+	  priv.comment = TRUE;
 	  count = 0;
 	}
-      parallel = 0;
     }
 
-  if (!comment)
-    outf->fprintf_func (outf->stream, ";");
+  if (!priv.comment)
+    OUTS (outf, ";");
 
   if (count == 0)
     return 2;
 
-  comment = 0;
-
   return count;
 }