X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fcrx-dis.c;h=f909897444dddc027580ce168f24fb2afb4a5ab4;hb=7362f76f52be200ae5fa21950f69e12304703fae;hp=8f14e8ba92b2f77b3fd927929034357d8e65db57;hpb=0fd3a4776c8f607cc778cde80f9215089d36387e;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/crx-dis.c b/opcodes/crx-dis.c
index 8f14e8ba92..f909897444 100644
--- a/opcodes/crx-dis.c
+++ b/opcodes/crx-dis.c
@@ -1,23 +1,24 @@
 /* Disassembler code for CRX.
-   Copyright 2004, 2005 Free Software Foundation, Inc.
+   Copyright 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
    Contributed by Tomer Levi, NSC, Israel.
    Written by Tomer Levi.
 
-   This file is part of the GNU binutils and GDB, the GNU debugger.
+   This file is part of the GNU opcodes library.
 
-   This program is free software; you can redistribute it and/or modify it under
-   the terms of the GNU General Public License as published by the Free
-   Software Foundation; either version 2, or (at your option)
+   This library is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
    any later version.
 
-   This program is distributed in the hope that it will be useful, but WITHOUT
-   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-   more details.
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
 
 #include "dis-asm.h"
 #include "sysdep.h"
@@ -30,7 +31,7 @@
 
 /* Extract 'n_bits' from 'a' starting from offset 'offs'.  */
 #define EXTRACT(a, offs, n_bits)	    \
-  (n_bits == 32 ? (((a) >> (offs)) & ~0L)   \
+  (n_bits == 32 ? (((a) >> (offs)) & 0xffffffffL)   \
   : (((a) >> (offs)) & ((1 << (n_bits)) -1)))
 
 /* Set Bit Mask - a mask to set all bits starting from offset 'offs'.  */
@@ -154,12 +155,12 @@ getargtype (operand_type op)
    This routine is used when disassembling the 'excp' instruction.  */
 
 static char *
-gettrapstring (unsigned int index)
+gettrapstring (unsigned int trap_index)
 {
   const trap_entry *trap;
 
   for (trap = crx_traps; trap < crx_traps + NUMTRAPS; trap++)
-    if (trap->entry == index)
+    if (trap->entry == trap_index)
       return trap->name;
 
   return ILLEGAL;
@@ -185,12 +186,12 @@ getcinvstring (unsigned int num)
 char *
 getregname (reg r)
 {
-  const reg_entry *reg = &crx_regtab[r];
+  const reg_entry * regentry = &crx_regtab[r];
 
-  if (reg->type != CRX_R_REGTYPE)
+  if (regentry->type != CRX_R_REGTYPE)
     return ILLEGAL;
   else
-    return reg->name;
+    return regentry->name;
 }
 
 /* Given a coprocessor register enum value, retrieve its name.  */
@@ -198,28 +199,28 @@ getregname (reg r)
 char *
 getcopregname (copreg r, reg_type type)
 {
-  const reg_entry *reg;
+  const reg_entry * regentry;
 
   if (type == CRX_C_REGTYPE)
-    reg = &crx_copregtab[r];
+    regentry = &crx_copregtab[r];
   else if (type == CRX_CS_REGTYPE)
-    reg = &crx_copregtab[r+(cs0-c0)];
+    regentry = &crx_copregtab[r+(cs0-c0)];
   else
     return ILLEGAL;
 
-  return reg->name;
+  return regentry->name;
 }
 
 
 /* Getting a processor register name.  */
 
 static char *
-getprocregname (int index)
+getprocregname (int reg_index)
 {
   const reg_entry *r;
 
   for (r = crx_regtab; r < crx_regtab + NUMREGS; r++)
-    if (r->image == index)
+    if (r->image == reg_index)
       return r->name;
 
   return "ILLEGAL REGISTER";
@@ -354,7 +355,7 @@ match_opcode (void)
   unsigned long mask;
 
   /* The instruction 'constant' opcode doewsn't exceed 32 bits.  */
-  unsigned long doubleWord = words[1] + (words[0] << 16);
+  unsigned long doubleWord = (words[1] + (words[0] << 16)) & 0xffffffff;
 
   /* Start searching from end of instruction table.  */
   instruction = &crx_instruction[NUMOPCODES - 2];
@@ -633,17 +634,17 @@ print_arg (argument *a, bfd_vma memaddr, struct disassemble_info *info)
 /* Print all the arguments of CURRINSN instruction.  */
 
 static void
-print_arguments (ins *currInsn, bfd_vma memaddr, struct disassemble_info *info)
+print_arguments (ins *currentInsn, bfd_vma memaddr, struct disassemble_info *info)
 {
   int i;
 
-  for (i = 0; i < currInsn->nargs; i++)
+  for (i = 0; i < currentInsn->nargs; i++)
     {
       processing_argument_number = i;
 
-      print_arg (&currInsn->arg[i], memaddr, info);
+      print_arg (&currentInsn->arg[i], memaddr, info);
 
-      if (i != currInsn->nargs - 1)
+      if (i != currentInsn->nargs - 1)
 	info->fprintf_func (info->stream, ", ");
     }
 }