X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fdisassemble.c;h=3ea45830334e720b0046379fd2a7629993a8e4e2;hb=24718e3ba575439155f233fc593a9ebd6d33f3c5;hp=93f3f005a4526b32a9afc20e2cbd4e460befae0d;hpb=d28847ce8eb6da33e8bc2905fe0b08631360a764;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 93f3f005a4..3ea4583033 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -1,33 +1,37 @@ /* Select disassembly routine for specified architecture. - Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 - Free Software Foundation, Inc. + Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004, 2005 Free Software Foundation, Inc. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ #include "sysdep.h" #include "dis-asm.h" #ifdef ARCH_all -#define ARCH_a29k #define ARCH_alpha #define ARCH_arc #define ARCH_arm #define ARCH_avr +#define ARCH_bfin #define ARCH_cris +#define ARCH_crx #define ARCH_d10v #define ARCH_d30v +#define ARCH_dlx +#define ARCH_fr30 +#define ARCH_frv #define ARCH_h8300 #define ARCH_h8500 #define ARCH_hppa @@ -36,17 +40,22 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ARCH_i860 #define ARCH_i960 #define ARCH_ia64 -#define ARCH_fr30 +#define ARCH_ip2k +#define ARCH_iq2000 +#define ARCH_m32c #define ARCH_m32r -#define ARCH_m68k #define ARCH_m68hc11 #define ARCH_m68hc12 +#define ARCH_m68k #define ARCH_m88k +#define ARCH_maxq #define ARCH_mcore #define ARCH_mips #define ARCH_mmix #define ARCH_mn10200 #define ARCH_mn10300 +#define ARCH_mt +#define ARCH_msp430 #define ARCH_ns32k #define ARCH_openrisc #define ARCH_or32 @@ -58,16 +67,23 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ARCH_sh #define ARCH_sparc #define ARCH_tic30 +#define ARCH_tic4x #define ARCH_tic54x #define ARCH_tic80 #define ARCH_v850 #define ARCH_vax #define ARCH_w65 #define ARCH_xstormy16 +#define ARCH_xc16x +#define ARCH_xtensa +#define ARCH_z80 #define ARCH_z8k #define INCLUDE_SHMEDIA #endif +#ifdef ARCH_m32c +#include "m32c-desc.h" +#endif disassembler_ftype disassembler (abfd) @@ -80,12 +96,6 @@ disassembler (abfd) { /* If you add a case to this table, also add it to the ARCH_all definition right above this function. */ -#ifdef ARCH_a29k - case bfd_arch_a29k: - /* As far as I know we only handle big-endian 29k objects. */ - disassemble = print_insn_big_a29k; - break; -#endif #ifdef ARCH_alpha case bfd_arch_alpha: disassemble = print_insn_alpha; @@ -111,11 +121,21 @@ disassembler (abfd) disassemble = print_insn_avr; break; #endif +#ifdef ARCH_bfin + case bfd_arch_bfin: + disassemble = print_insn_bfin; + break; +#endif #ifdef ARCH_cris case bfd_arch_cris: disassemble = cris_get_disassembler (abfd); break; #endif +#ifdef ARCH_crx + case bfd_arch_crx: + disassemble = print_insn_crx; + break; +#endif #ifdef ARCH_d10v case bfd_arch_d10v: disassemble = print_insn_d10v; @@ -126,11 +146,21 @@ disassembler (abfd) disassemble = print_insn_d30v; break; #endif +#ifdef ARCH_dlx + case bfd_arch_dlx: + /* As far as I know we only handle big-endian DLX objects. */ + disassemble = print_insn_dlx; + break; +#endif #ifdef ARCH_h8300 case bfd_arch_h8300: - if (bfd_get_mach(abfd) == bfd_mach_h8300h) + if (bfd_get_mach (abfd) == bfd_mach_h8300h + || bfd_get_mach (abfd) == bfd_mach_h8300hn) disassemble = print_insn_h8300h; - else if (bfd_get_mach(abfd) == bfd_mach_h8300s) + else if (bfd_get_mach (abfd) == bfd_mach_h8300s + || bfd_get_mach (abfd) == bfd_mach_h8300sn + || bfd_get_mach (abfd) == bfd_mach_h8300sx + || bfd_get_mach (abfd) == bfd_mach_h8300sxn) disassemble = print_insn_h8300s; else disassemble = print_insn_h8300; @@ -171,6 +201,11 @@ disassembler (abfd) disassemble = print_insn_ia64; break; #endif +#ifdef ARCH_ip2k + case bfd_arch_ip2k: + disassemble = print_insn_ip2k; + break; +#endif #ifdef ARCH_fr30 case bfd_arch_fr30: disassemble = print_insn_fr30; @@ -199,6 +234,21 @@ disassembler (abfd) disassemble = print_insn_m88k; break; #endif +#ifdef ARCH_maxq + case bfd_arch_maxq: + disassemble = print_insn_maxq_little; + break; +#endif +#ifdef ARCH_mt + case bfd_arch_mt: + disassemble = print_insn_mt; + break; +#endif +#ifdef ARCH_msp430 + case bfd_arch_msp430: + disassemble = print_insn_msp430; + break; +#endif #ifdef ARCH_ns32k case bfd_arch_ns32k: disassemble = print_insn_ns32k; @@ -278,20 +328,7 @@ disassembler (abfd) #endif #ifdef ARCH_sh case bfd_arch_sh: -#ifdef INCLUDE_SHMEDIA - if (bfd_get_mach (abfd) == bfd_mach_sh5) - { - if (bfd_big_endian (abfd)) - disassemble = print_insn_sh64; - else - disassemble = print_insn_sh64l; - break; - } -#endif - if (bfd_big_endian (abfd)) - disassemble = print_insn_sh; - else - disassemble = print_insn_shl; + disassemble = print_insn_sh; break; #endif #ifdef ARCH_sparc @@ -304,6 +341,11 @@ disassembler (abfd) disassemble = print_insn_tic30; break; #endif +#ifdef ARCH_tic4x + case bfd_arch_tic4x: + disassemble = print_insn_tic4x; + break; +#endif #ifdef ARCH_tic54x case bfd_arch_tic54x: disassemble = print_insn_tic54x; @@ -329,6 +371,21 @@ disassembler (abfd) disassemble = print_insn_xstormy16; break; #endif +#ifdef ARCH_xc16x + case bfd_arch_xc16x: + disassemble = print_insn_xc16x; + break; +#endif +#ifdef ARCH_xtensa + case bfd_arch_xtensa: + disassemble = print_insn_xtensa; + break; +#endif +#ifdef ARCH_z80 + case bfd_arch_z80: + disassemble = print_insn_z80; + break; +#endif #ifdef ARCH_z8k case bfd_arch_z8k: if (bfd_get_mach(abfd) == bfd_mach_z8001) @@ -341,6 +398,21 @@ disassembler (abfd) case bfd_arch_vax: disassemble = print_insn_vax; break; +#endif +#ifdef ARCH_frv + case bfd_arch_frv: + disassemble = print_insn_frv; + break; +#endif +#ifdef ARCH_iq2000 + case bfd_arch_iq2000: + disassemble = print_insn_iq2000; + break; +#endif +#ifdef ARCH_m32c + case bfd_arch_m32c: + disassemble = print_insn_m32c; + break; #endif default: return 0; @@ -355,6 +427,54 @@ disassembler_usage (stream) #ifdef ARCH_arm print_arm_disassembler_options (stream); #endif +#ifdef ARCH_mips + print_mips_disassembler_options (stream); +#endif +#ifdef ARCH_powerpc + print_ppc_disassembler_options (stream); +#endif return; } + +void +disassemble_init_for_target (struct disassemble_info * info) +{ + if (info == NULL) + return; + + switch (info->arch) + { +#ifdef ARCH_arm + case bfd_arch_arm: + info->symbol_is_valid = arm_symbol_is_valid; + info->disassembler_needs_relocs = TRUE; + break; +#endif +#ifdef ARCH_ia64 + case bfd_arch_ia64: + info->skip_zeroes = 16; + break; +#endif +#ifdef ARCH_tic4x + case bfd_arch_tic4x: + info->skip_zeroes = 32; + break; +#endif +#ifdef ARCH_m32c + case bfd_arch_m32c: + info->endian = BFD_ENDIAN_BIG; + if (! info->insn_sets) + { + info->insn_sets = cgen_bitset_create (ISA_MAX); + if (info->mach == bfd_mach_m16c) + cgen_bitset_set (info->insn_sets, ISA_M16C); + else + cgen_bitset_set (info->insn_sets, ISA_M32C); + } + break; +#endif + default: + break; + } +}