X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Ffr30-asm.c;h=f1c18a16bd5f10d4662fbdc24032fee7bac80f39;hb=7f266840a2d8b06c27f445ef67f0693c0d1b2496;hp=6038dbba91753cb99bca53385b8131ada17f4a98;hpb=d0352a18a504a4e7b761f6b3264cf11347d8d056;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c index 6038dbba91..f1c18a16bd 100644 --- a/opcodes/fr30-asm.c +++ b/opcodes/fr30-asm.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-asm.in isn't -Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. +Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -26,7 +26,6 @@ along with this program; if not, write to the Free Software Foundation, Inc., Keep that in mind. */ #include "sysdep.h" -#include #include #include "ansidecl.h" #include "bfd.h" @@ -34,19 +33,35 @@ along with this program; if not, write to the Free Software Foundation, Inc., #include "fr30-desc.h" #include "fr30-opc.h" #include "opintl.h" +#include "xregex.h" +#include "libiberty.h" +#include "safe-ctype.h" -#undef min +#undef min #define min(a,b) ((a) < (b) ? (a) : (b)) -#undef max +#undef max #define max(a,b) ((a) > (b) ? (a) : (b)) static const char * parse_insn_normal - PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); + (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); -/* -- assembler routines inserted here */ +/* -- assembler routines inserted here. */ /* -- asm.c */ -/* Handle register lists for LDMx and STMx */ +/* Handle register lists for LDMx and STMx. */ + +static int parse_register_number + PARAMS ((const char **)); +static const char * parse_register_list + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *, int, int)); +static const char * parse_low_register_list_ld + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); +static const char * parse_hi_register_list_ld + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); +static const char * parse_low_register_list_st + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); +static const char * parse_hi_register_list_st + PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); static int parse_register_number (strp) @@ -54,7 +69,7 @@ parse_register_number (strp) { int regno; if (**strp < '0' || **strp > '9') - return -1; /* error */ + return -1; /* error. */ regno = **strp - '0'; ++*strp; @@ -69,14 +84,15 @@ parse_register_number (strp) static const char * parse_register_list (cd, strp, opindex, valuep, high_low, load_store) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; const char **strp; - int opindex; + int opindex ATTRIBUTE_UNUSED; unsigned long *valuep; int high_low; /* 0 == high, 1 == low */ int load_store; /* 0 == load, 1 == store */ { int regno; + *valuep = 0; while (**strp && **strp != ')') { @@ -95,7 +111,7 @@ parse_register_list (cd, strp, opindex, valuep, high_low, load_store) if (high_low) regno -= 8; - if (load_store) /* mask is reversed for store */ + if (load_store) /* Mask is reversed for store. */ *valuep |= 0x80 >> regno; else *valuep |= 1 << regno; @@ -156,6 +172,9 @@ parse_hi_register_list_st (cd, strp, opindex, valuep) /* -- */ +const char * fr30_cgen_parse_operand + PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *)); + /* Main entry point for operand parsing. This function is basically just a big switch statement. Earlier versions @@ -167,8 +186,7 @@ parse_hi_register_list_st (cd, strp, opindex, valuep) This function could be moved into `parse_insn_normal', but keeping it separate makes clear the interface between `parse_insn_normal' and each of - the handlers. -*/ + the handlers. */ const char * fr30_cgen_parse_operand (cd, opindex, strp, fields) @@ -179,7 +197,7 @@ fr30_cgen_parse_operand (cd, opindex, strp, fields) { const char * errmsg = NULL; /* Used by scalar operands that still need to be parsed. */ - long junk; + long junk ATTRIBUTE_UNUSED; switch (opindex) { @@ -324,6 +342,128 @@ fr30_cgen_init_asm (cd) cd->parse_operand = fr30_cgen_parse_operand; } + + +/* Regex construction routine. + + This translates an opcode syntax string into a regex string, + by replacing any non-character syntax element (such as an + opcode) with the pattern '.*' + + It then compiles the regex and stores it in the opcode, for + later use by fr30_cgen_assemble_insn + + Returns NULL for success, an error message for failure. */ + +char * +fr30_cgen_build_insn_regex (CGEN_INSN *insn) +{ + CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); + const char *mnem = CGEN_INSN_MNEMONIC (insn); + char rxbuf[CGEN_MAX_RX_ELEMENTS]; + char *rx = rxbuf; + const CGEN_SYNTAX_CHAR_TYPE *syn; + int reg_err; + + syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); + + /* Mnemonics come first in the syntax string. */ + if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) + return _("missing mnemonic in syntax string"); + ++syn; + + /* Generate a case sensitive regular expression that emulates case + insensitive matching in the "C" locale. We cannot generate a case + insensitive regular expression because in Turkish locales, 'i' and 'I' + are not equal modulo case conversion. */ + + /* Copy the literal mnemonic out of the insn. */ + for (; *mnem; mnem++) + { + char c = *mnem; + + if (ISALPHA (c)) + { + *rx++ = '['; + *rx++ = TOLOWER (c); + *rx++ = TOUPPER (c); + *rx++ = ']'; + } + else + *rx++ = c; + } + + /* Copy any remaining literals from the syntax string into the rx. */ + for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) + { + if (CGEN_SYNTAX_CHAR_P (* syn)) + { + char c = CGEN_SYNTAX_CHAR (* syn); + + switch (c) + { + /* Escape any regex metacharacters in the syntax. */ + case '.': case '[': case '\\': + case '*': case '^': case '$': + +#ifdef CGEN_ESCAPE_EXTENDED_REGEX + case '?': case '{': case '}': + case '(': case ')': case '*': + case '|': case '+': case ']': +#endif + *rx++ = '\\'; + *rx++ = c; + break; + + default: + if (ISALPHA (c)) + { + *rx++ = '['; + *rx++ = TOLOWER (c); + *rx++ = TOUPPER (c); + *rx++ = ']'; + } + else + *rx++ = c; + break; + } + } + else + { + /* Replace non-syntax fields with globs. */ + *rx++ = '.'; + *rx++ = '*'; + } + } + + /* Trailing whitespace ok. */ + * rx++ = '['; + * rx++ = ' '; + * rx++ = '\t'; + * rx++ = ']'; + * rx++ = '*'; + + /* But anchor it after that. */ + * rx++ = '$'; + * rx = '\0'; + + CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); + reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); + + if (reg_err == 0) + return NULL; + else + { + static char msg[80]; + + regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); + regfree ((regex_t *) CGEN_INSN_RX (insn)); + free (CGEN_INSN_RX (insn)); + (CGEN_INSN_RX (insn)) = NULL; + return msg; + } +} + /* Default insn parser. @@ -336,22 +476,20 @@ fr30_cgen_init_asm (cd) but that can be handled there. Not handling backtracking here may get expensive in the case of the m68k. Deal with later. - Returns NULL for success, an error message for failure. -*/ + Returns NULL for success, an error message for failure. */ static const char * -parse_insn_normal (cd, insn, strp, fields) - CGEN_CPU_DESC cd; - const CGEN_INSN *insn; - const char **strp; - CGEN_FIELDS *fields; +parse_insn_normal (CGEN_CPU_DESC cd, + const CGEN_INSN *insn, + const char **strp, + CGEN_FIELDS *fields) { /* ??? Runtime added insns not handled yet. */ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); const char *str = *strp; const char *errmsg; const char *p; - const unsigned char * syn; + const CGEN_SYNTAX_CHAR_TYPE * syn; #ifdef CGEN_MNEMONIC_OPERANDS /* FIXME: wip */ int past_opcode_p; @@ -362,14 +500,14 @@ parse_insn_normal (cd, insn, strp, fields) GAS's input scrubber will ensure mnemonics are lowercase, but we may not be called from GAS. */ p = CGEN_INSN_MNEMONIC (insn); - while (*p && tolower (*p) == tolower (*str)) + while (*p && TOLOWER (*p) == TOLOWER (*str)) ++p, ++str; if (* p) return _("unrecognized instruction"); #ifndef CGEN_MNEMONIC_OPERANDS - if (* str && !isspace (* str)) + if (* str && ! ISSPACE (* str)) return _("unrecognized instruction"); #endif @@ -398,27 +536,40 @@ parse_insn_normal (cd, insn, strp, fields) first char after the mnemonic part is a space. */ /* FIXME: We also take inappropriate advantage of the fact that GAS's input scrubber will remove extraneous blanks. */ - if (*str == CGEN_SYNTAX_CHAR (* syn)) + if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) { #ifdef CGEN_MNEMONIC_OPERANDS - if (* syn == ' ') + if (CGEN_SYNTAX_CHAR(* syn) == ' ') past_opcode_p = 1; #endif ++ syn; ++ str; } - else + else if (*str) { /* Syntax char didn't match. Can't be this insn. */ - /* FIXME: would like to return something like - "expected char `c'" */ - return _("syntax error"); + static char msg [80]; + + /* xgettext:c-format */ + sprintf (msg, _("syntax error (expected char `%c', found `%c')"), + CGEN_SYNTAX_CHAR(*syn), *str); + return msg; + } + else + { + /* Ran out of input. */ + static char msg [80]; + + /* xgettext:c-format */ + sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), + CGEN_SYNTAX_CHAR(*syn)); + return msg; } continue; } /* We have an operand of some sort. */ - errmsg = fr30_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), + errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); if (errmsg) return errmsg; @@ -428,13 +579,13 @@ parse_insn_normal (cd, insn, strp, fields) } /* If we're at the end of the syntax string, we're done. */ - if (* syn == '\0') + if (* syn == 0) { /* FIXME: For the moment we assume a valid `str' can only contain blanks now. IE: We needn't try again with a longer version of the insn and it is assumed that longer versions of insns appear before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ - while (isspace (* str)) + while (ISSPACE (* str)) ++ str; if (* str != '\0') @@ -469,18 +620,20 @@ parse_insn_normal (cd, insn, strp, fields) mind helps keep the design clean. */ const CGEN_INSN * -fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg) - CGEN_CPU_DESC cd; - const char *str; - CGEN_FIELDS *fields; - CGEN_INSN_BYTES_PTR buf; - char **errmsg; +fr30_cgen_assemble_insn (CGEN_CPU_DESC cd, + const char *str, + CGEN_FIELDS *fields, + CGEN_INSN_BYTES_PTR buf, + char **errmsg) { const char *start; CGEN_INSN_LIST *ilist; + const char *parse_errmsg = NULL; + const char *insert_errmsg = NULL; + int recognized_mnemonic = 0; /* Skip leading white space. */ - while (isspace (* str)) + while (ISSPACE (* str)) ++ str; /* The instructions are stored in hashed lists. @@ -488,53 +641,77 @@ fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg) ilist = CGEN_ASM_LOOKUP_INSN (cd, str); /* Keep looking until we find a match. */ - start = str; for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) { const CGEN_INSN *insn = ilist->insn; + recognized_mnemonic = 1; -#if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */ +#ifdef CGEN_VALIDATE_INSN_SUPPORTED + /* Not usually needed as unsupported opcodes + shouldn't be in the hash lists. */ /* Is this insn supported by the selected cpu? */ if (! fr30_cgen_insn_supported (cd, insn)) continue; #endif - - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; + /* Skip this insn if str doesn't look right lexically. */ + if (CGEN_INSN_RX (insn) != NULL && + regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) + continue; + /* Allow parse/insert handlers to obtain length of insn. */ CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); - if (! CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields)) - { - /* ??? 0 is passed for `pc' */ - if (CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, (bfd_vma) 0) - != NULL) - continue; - /* It is up to the caller to actually output the insn and any - queued relocs. */ - return insn; - } + parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); + if (parse_errmsg != NULL) + continue; - /* Try the next entry. */ + /* ??? 0 is passed for `pc'. */ + insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, + (bfd_vma) 0); + if (insert_errmsg != NULL) + continue; + + /* It is up to the caller to actually output the insn and any + queued relocs. */ + return insn; } - /* FIXME: We can return a better error message than this. - Need to track why it failed and pick the right one. */ { - static char errbuf[100]; + static char errbuf[150]; +#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS + const char *tmp_errmsg; + + /* If requesting verbose error messages, use insert_errmsg. + Failing that, use parse_errmsg. */ + tmp_errmsg = (insert_errmsg ? insert_errmsg : + parse_errmsg ? parse_errmsg : + recognized_mnemonic ? + _("unrecognized form of instruction") : + _("unrecognized instruction")); + + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); + else + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); +#else if (strlen (start) > 50) /* xgettext:c-format */ sprintf (errbuf, _("bad instruction `%.50s...'"), start); else /* xgettext:c-format */ sprintf (errbuf, _("bad instruction `%.50s'"), start); +#endif *errmsg = errbuf; return NULL; @@ -551,9 +728,7 @@ fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg) FIXME: Not currently used. */ void -fr30_cgen_asm_hash_keywords (cd, opvals) - CGEN_CPU_DESC cd; - CGEN_KEYWORD *opvals; +fr30_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals) { CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); const CGEN_KEYWORD_ENTRY * ke;