X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Ffr30-dis.c;h=7f04125b131daf4f9bf26204fc7bed5d70ca4adb;hb=6aaea2917f3735df72ca43b48277833b183fd43e;hp=f389dcc1edbbae1916622b9a9554ea140dfe9c1a;hpb=27fca2d871b27e82e9e461bbad4fefdb45910e05;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c
index f389dcc1ed..7f04125b13 100644
--- a/opcodes/fr30-dis.c
+++ b/opcodes/fr30-dis.c
@@ -47,14 +47,29 @@ static void print_keyword
 static void print_insn_normal
      PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
 	      bfd_vma, int));
-static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma,
-			       disassemble_info *, char *, int));
+static int print_insn
+     PARAMS ((CGEN_CPU_DESC, bfd_vma,  disassemble_info *, char *, unsigned));
 static int default_print_insn
      PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
+static int read_insn
+     PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int,
+	      CGEN_EXTRACT_INFO *, unsigned long *));
 
 /* -- disassembler routines inserted here */
 
 /* -- dis.c */
+static void print_register_list
+  PARAMS ((PTR, long, long, int));
+static void print_hi_register_list_ld
+  PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
+static void print_low_register_list_ld
+  PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
+static void print_hi_register_list_st
+  PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
+static void print_low_register_list_st
+  PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
+static void print_m4
+  PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
 
 static void
 print_register_list (dis_info, value, offset, load_store)
@@ -156,6 +171,10 @@ print_m4 (cd, dis_info, value, attrs, pc, length)
 }
 /* -- */
 
+void fr30_cgen_print_operand
+  PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
+           void const *, bfd_vma, int));
+
 /* Main entry point for printing operands.
    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
    of dis-asm.h on cgen.h.
@@ -178,7 +197,7 @@ fr30_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
      int opindex;
      PTR xinfo;
      CGEN_FIELDS *fields;
-     void const *attrs;
+     void const *attrs ATTRIBUTE_UNUSED;
      bfd_vma pc;
      int length;
 {
@@ -324,21 +343,12 @@ fr30_cgen_init_dis (cd)
 
 static void
 print_normal (cd, dis_info, value, attrs, pc, length)
-#ifdef CGEN_PRINT_NORMAL
-     CGEN_CPU_DESC cd;
-#else
      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
-#endif
      PTR dis_info;
      long value;
      unsigned int attrs;
-#ifdef CGEN_PRINT_NORMAL
-     bfd_vma pc;
-     int length;
-#else
      bfd_vma pc ATTRIBUTE_UNUSED;
      int length ATTRIBUTE_UNUSED;
-#endif
 {
   disassemble_info *info = (disassemble_info *) dis_info;
 
@@ -359,21 +369,12 @@ print_normal (cd, dis_info, value, attrs, pc, length)
 
 static void
 print_address (cd, dis_info, value, attrs, pc, length)
-#ifdef CGEN_PRINT_NORMAL
-     CGEN_CPU_DESC cd;
-#else
      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
-#endif
      PTR dis_info;
      bfd_vma value;
      unsigned int attrs;
-#ifdef CGEN_PRINT_NORMAL
-     bfd_vma pc;
-     int length;
-#else
      bfd_vma pc ATTRIBUTE_UNUSED;
      int length ATTRIBUTE_UNUSED;
-#endif
 {
   disassemble_info *info = (disassemble_info *) dis_info;
 
@@ -456,9 +457,10 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length)
 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
    the extract info.
    Returns 0 if all is well, non-zero otherwise.  */
+
 static int
 read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
-     CGEN_CPU_DESC cd;
+     CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
      bfd_vma pc;
      disassemble_info *info;
      char *buf;
@@ -493,15 +495,25 @@ print_insn (cd, pc, info, buf, buflen)
      bfd_vma pc;
      disassemble_info *info;
      char *buf;
-     int buflen;
+     unsigned int buflen;
 {
-  unsigned long insn_value;
+  CGEN_INSN_INT insn_value;
   const CGEN_INSN_LIST *insn_list;
   CGEN_EXTRACT_INFO ex_info;
+  int basesize;
+
+  /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
+  basesize = cd->base_insn_bitsize < buflen * 8 ?
+                                     cd->base_insn_bitsize : buflen * 8;
+  insn_value = cgen_get_insn_value (cd, buf, basesize);
 
-  int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value);
-  if (rc != 0)
-    return rc;
+
+  /* Fill in ex_info fields like read_insn would.  Don't actually call
+     read_insn, since the incoming buffer is already read (and possibly
+     modified a la m32r).  */
+  ex_info.valid = (1 << buflen) - 1;
+  ex_info.dis_info = info;
+  ex_info.insn_bytes = buf;
 
   /* The instructions are stored in hash lists.
      Pick the first one and keep trying until we find the right one.  */
@@ -512,9 +524,10 @@ print_insn (cd, pc, info, buf, buflen)
       const CGEN_INSN *insn = insn_list->insn;
       CGEN_FIELDS fields;
       int length;
+      unsigned long insn_value_cropped;
 
 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 
-      /* not needed as insn shouldn't be in hash lists if not supported */
+      /* Not needed as insn shouldn't be in hash lists if not supported.  */
       /* Supported by this cpu?  */
       if (! fr30_cgen_insn_supported (cd, insn))
         {
@@ -526,7 +539,17 @@ print_insn (cd, pc, info, buf, buflen)
       /* Basic bit mask must be correct.  */
       /* ??? May wish to allow target to defer this check until the extract
 	 handler.  */
-      if ((insn_value & CGEN_INSN_BASE_MASK (insn))
+
+      /* Base size may exceed this instruction's size.  Extract the
+         relevant part from the buffer. */
+      if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
+	  (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+	insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 
+					   info->endian == BFD_ENDIAN_BIG);
+      else
+	insn_value_cropped = insn_value;
+
+      if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
 	  == CGEN_INSN_BASE_VALUE (insn))
 	{
 	  /* Printing is handled in two passes.  The first pass parses the
@@ -535,8 +558,8 @@ print_insn (cd, pc, info, buf, buflen)
 
 	  /* Make sure the entire insn is loaded into insn_value, if it
 	     can fit.  */
-	  if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize &&
-	      (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+	  if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
+	      (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 	    {
 	      unsigned long full_insn_value;
 	      int rc = read_insn (cd, pc, info, buf,
@@ -549,7 +572,7 @@ print_insn (cd, pc, info, buf, buflen)
 	    }
 	  else
 	    length = CGEN_EXTRACT_FN (cd, insn)
-	      (cd, insn, &ex_info, insn_value, &fields, pc);
+	      (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
 
 	  /* length < 0 -> error */
 	  if (length < 0)
@@ -583,18 +606,27 @@ default_print_insn (cd, pc, info)
      disassemble_info *info;
 {
   char buf[CGEN_MAX_INSN_SIZE];
+  int buflen;
   int status;
 
-  /* Read the base part of the insn.  */
+  /* Attempt to read the base part of the insn.  */
+  buflen = cd->base_insn_bitsize / 8;
+  status = (*info->read_memory_func) (pc, buf, buflen, info);
+
+  /* Try again with the minimum part, if min < base.  */
+  if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
+    {
+      buflen = cd->min_insn_bitsize / 8;
+      status = (*info->read_memory_func) (pc, buf, buflen, info);
+    }
 
-  status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info);
   if (status != 0)
     {
       (*info->memory_error_func) (status, pc, info);
       return -1;
     }
 
-  return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8);
+  return print_insn (cd, pc, info, buf, buflen);
 }
 
 /* Main entry point.