X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fi386-dis.c;h=2a0e765c55a88827d4dce0c626e1df3a705d18ec;hb=260bcd09bfb98ebc5d8f0eb564edca21872e9f7f;hp=89b824c85cabf50ea4f122a5ce665643b006f82d;hpb=d5f787c2bc90793c1d781b7291758e77067daad5;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 89b824c85c..2a0e765c55 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1,5 +1,5 @@ /* Print i386 instructions for GDB, the GNU debugger. - Copyright (C) 1988-2018 Free Software Foundation, Inc. + Copyright (C) 1988-2019 Free Software Foundation, Inc. This file is part of the GNU opcodes library. @@ -101,7 +101,6 @@ static void VPCOM_Fixup (int, int); static void OP_0f07 (int, int); static void OP_Monitor (int, int); static void OP_Mwait (int, int); -static void OP_Mwaitx (int, int); static void NOP_Fixup1 (int, int); static void NOP_Fixup2 (int, int); static void OP_3DNowSuffix (int, int); @@ -259,7 +258,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Edb { OP_E, db_mode } #define Edw { OP_E, dw_mode } #define Edqd { OP_E, dqd_mode } -#define Edqa { OP_E, dqa_mode } #define Eq { OP_E, q_mode } #define indirEv { OP_indirE, indir_v_mode } #define indirEp { OP_indirE, f_mode } @@ -292,8 +290,8 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define sIbT { OP_sI, b_T_mode } /* sign extened byte like 'T' */ #define Iv { OP_I, v_mode } #define sIv { OP_sI, v_mode } -#define Iq { OP_I, q_mode } #define Iv64 { OP_I64, v_mode } +#define Id { OP_I, d_mode } #define Iw { OP_I, w_mode } #define I1 { OP_I, const_1_mode } #define Jb { OP_J, b_mode } @@ -386,7 +384,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EXd { OP_EX, d_mode } #define EXdScalar { OP_EX, d_scalar_mode } #define EXdS { OP_EX, d_swap_mode } -#define EXdScalarS { OP_EX, d_scalar_swap_mode } #define EXq { OP_EX, q_mode } #define EXqScalar { OP_EX, q_scalar_mode } #define EXqScalarS { OP_EX, q_scalar_swap_mode } @@ -426,17 +423,12 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Vex128 { OP_VEX, vex128_mode } #define Vex256 { OP_VEX, vex256_mode } #define VexGdq { OP_VEX, dq_mode } -#define EXdVex { OP_EX_Vex, d_mode } -#define EXdVexS { OP_EX_Vex, d_swap_mode } #define EXdVexScalarS { OP_EX_Vex, d_scalar_swap_mode } -#define EXqVex { OP_EX_Vex, q_mode } -#define EXqVexS { OP_EX_Vex, q_swap_mode } #define EXqVexScalarS { OP_EX_Vex, q_scalar_swap_mode } #define EXVexW { OP_EX_VexW, x_mode } #define EXdVexW { OP_EX_VexW, d_mode } #define EXqVexW { OP_EX_VexW, q_mode } #define EXVexImmW { OP_EX_VexImmW, x_mode } -#define XMVex { OP_XMM_Vex, 0 } #define XMVexScalar { OP_XMM_Vex, scalar_mode } #define XMVexW { OP_XMM_VexW, 0 } #define XMVexI4 { OP_REG_VexI4, x_mode } @@ -591,8 +583,6 @@ enum dw_mode, /* registers like dq_mode, memory like d_mode. */ dqd_mode, - /* operand size depends on the W bit as well as address mode. */ - dqa_mode, /* normal vex mode */ vex_mode, /* 128bit vex mode */ @@ -703,7 +693,8 @@ enum USE_VEX_C5_TABLE, USE_VEX_LEN_TABLE, USE_VEX_W_TABLE, - USE_EVEX_TABLE + USE_EVEX_TABLE, + USE_EVEX_LEN_TABLE }; #define FLOAT NULL, { { NULL, FLOATCODE } }, 0 @@ -723,6 +714,7 @@ enum #define VEX_LEN_TABLE(I) DIS386 (USE_VEX_LEN_TABLE, (I)) #define VEX_W_TABLE(I) DIS386 (USE_VEX_W_TABLE, (I)) #define EVEX_TABLE(I) DIS386 (USE_EVEX_TABLE, (I)) +#define EVEX_LEN_TABLE(I) DIS386 (USE_EVEX_LEN_TABLE, (I)) enum { @@ -746,8 +738,8 @@ enum REG_0F01, REG_0F0D, REG_0F18, - REG_0F1C_MOD_0, - REG_0F1E_MOD_3, + REG_0F1C_P_0_MOD_0, + REG_0F1E_P_1_MOD_3, REG_0F71, REG_0F72, REG_0F73, @@ -843,7 +835,9 @@ enum MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2, MOD_0F38F6_PREFIX_0, + MOD_0F38F8_PREFIX_1, MOD_0F38F8_PREFIX_2, + MOD_0F38F8_PREFIX_3, MOD_0F38F9_PREFIX_0, MOD_62_32BIT, MOD_C4_32BIT, @@ -901,12 +895,10 @@ enum MOD_VEX_W_1_0F91_P_2_LEN_0, MOD_VEX_W_0_0F92_P_0_LEN_0, MOD_VEX_W_0_0F92_P_2_LEN_0, - MOD_VEX_W_0_0F92_P_3_LEN_0, - MOD_VEX_W_1_0F92_P_3_LEN_0, + MOD_VEX_0F92_P_3_LEN_0, MOD_VEX_W_0_0F93_P_0_LEN_0, MOD_VEX_W_0_0F93_P_2_LEN_0, - MOD_VEX_W_0_0F93_P_3_LEN_0, - MOD_VEX_W_1_0F93_P_3_LEN_0, + MOD_VEX_0F93_P_3_LEN_0, MOD_VEX_W_0_0F98_P_0_LEN_0, MOD_VEX_W_1_0F98_P_0_LEN_0, MOD_VEX_W_0_0F98_P_2_LEN_0, @@ -938,10 +930,6 @@ enum MOD_VEX_W_0_0F3A33_P_2_LEN_0, MOD_VEX_W_1_0F3A33_P_2_LEN_0, - MOD_EVEX_0F10_PREFIX_1, - MOD_EVEX_0F10_PREFIX_3, - MOD_EVEX_0F11_PREFIX_1, - MOD_EVEX_0F11_PREFIX_3, MOD_EVEX_0F12_PREFIX_0, MOD_EVEX_0F16_PREFIX_0, MOD_EVEX_0F38C6_REG_1, @@ -962,19 +950,21 @@ enum RM_0F01_REG_1, RM_0F01_REG_2, RM_0F01_REG_3, - RM_0F01_REG_5, - RM_0F01_REG_7, - RM_0F1E_MOD_3_REG_7, - RM_0FAE_REG_6, - RM_0FAE_REG_7 + RM_0F01_REG_5_MOD_3, + RM_0F01_REG_7_MOD_3, + RM_0F1E_P_1_MOD_3_REG_7, + RM_0FAE_REG_6_MOD_3_P_0, + RM_0FAE_REG_7_MOD_3, }; enum { PREFIX_90 = 0, - PREFIX_MOD_0_0F01_REG_5, - PREFIX_MOD_3_0F01_REG_5_RM_0, - PREFIX_MOD_3_0F01_REG_5_RM_2, + PREFIX_0F01_REG_5_MOD_0, + PREFIX_0F01_REG_5_MOD_3_RM_0, + PREFIX_0F01_REG_5_MOD_3_RM_2, + PREFIX_0F01_REG_7_MOD_3_RM_2, + PREFIX_0F01_REG_7_MOD_3_RM_3, PREFIX_0F09, PREFIX_0F10, PREFIX_0F11, @@ -1016,25 +1006,25 @@ enum PREFIX_0F7D, PREFIX_0F7E, PREFIX_0F7F, - PREFIX_0FAE_REG_0, - PREFIX_0FAE_REG_1, - PREFIX_0FAE_REG_2, - PREFIX_0FAE_REG_3, - PREFIX_MOD_0_0FAE_REG_4, - PREFIX_MOD_3_0FAE_REG_4, - PREFIX_MOD_0_0FAE_REG_5, - PREFIX_MOD_3_0FAE_REG_5, - PREFIX_MOD_0_0FAE_REG_6, - PREFIX_MOD_1_0FAE_REG_6, - PREFIX_0FAE_REG_7, + PREFIX_0FAE_REG_0_MOD_3, + PREFIX_0FAE_REG_1_MOD_3, + PREFIX_0FAE_REG_2_MOD_3, + PREFIX_0FAE_REG_3_MOD_3, + PREFIX_0FAE_REG_4_MOD_0, + PREFIX_0FAE_REG_4_MOD_3, + PREFIX_0FAE_REG_5_MOD_0, + PREFIX_0FAE_REG_5_MOD_3, + PREFIX_0FAE_REG_6_MOD_0, + PREFIX_0FAE_REG_6_MOD_3, + PREFIX_0FAE_REG_7_MOD_0, PREFIX_0FB8, PREFIX_0FBC, PREFIX_0FBD, PREFIX_0FC2, - PREFIX_MOD_0_0FC3, - PREFIX_MOD_0_0FC7_REG_6, - PREFIX_MOD_3_0FC7_REG_6, - PREFIX_MOD_3_0FC7_REG_7, + PREFIX_0FC3_MOD_0, + PREFIX_0FC7_REG_6_MOD_0, + PREFIX_0FC7_REG_6_MOD_3, + PREFIX_0FC7_REG_7_MOD_3, PREFIX_0FD0, PREFIX_0FD6, PREFIX_0FE6, @@ -1611,6 +1601,7 @@ enum PREFIX_EVEX_0F3864, PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, + PREFIX_EVEX_0F3868, PREFIX_EVEX_0F3870, PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3872, @@ -1818,12 +1809,6 @@ enum VEX_LEN_0F16_P_0_M_1, VEX_LEN_0F16_P_2, VEX_LEN_0F17_M_0, - VEX_LEN_0F2A_P_1, - VEX_LEN_0F2A_P_3, - VEX_LEN_0F2C_P_1, - VEX_LEN_0F2C_P_3, - VEX_LEN_0F2D_P_1, - VEX_LEN_0F2D_P_3, VEX_LEN_0F41_P_0, VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_0, @@ -1929,6 +1914,56 @@ enum VEX_LEN_0FXOP_09_81 }; +enum +{ + EVEX_LEN_0F6E_P_2 = 0, + EVEX_LEN_0F7E_P_1, + EVEX_LEN_0F7E_P_2, + EVEX_LEN_0FD6_P_2, + EVEX_LEN_0F3819_P_2_W_0, + EVEX_LEN_0F3819_P_2_W_1, + EVEX_LEN_0F381A_P_2_W_0, + EVEX_LEN_0F381A_P_2_W_1, + EVEX_LEN_0F381B_P_2_W_0, + EVEX_LEN_0F381B_P_2_W_1, + EVEX_LEN_0F385A_P_2_W_0, + EVEX_LEN_0F385A_P_2_W_1, + EVEX_LEN_0F385B_P_2_W_0, + EVEX_LEN_0F385B_P_2_W_1, + EVEX_LEN_0F38C6_REG_1_PREFIX_2, + EVEX_LEN_0F38C6_REG_2_PREFIX_2, + EVEX_LEN_0F38C6_REG_5_PREFIX_2, + EVEX_LEN_0F38C6_REG_6_PREFIX_2, + EVEX_LEN_0F38C7_R_1_P_2_W_0, + EVEX_LEN_0F38C7_R_1_P_2_W_1, + EVEX_LEN_0F38C7_R_2_P_2_W_0, + EVEX_LEN_0F38C7_R_2_P_2_W_1, + EVEX_LEN_0F38C7_R_5_P_2_W_0, + EVEX_LEN_0F38C7_R_5_P_2_W_1, + EVEX_LEN_0F38C7_R_6_P_2_W_0, + EVEX_LEN_0F38C7_R_6_P_2_W_1, + EVEX_LEN_0F3A18_P_2_W_0, + EVEX_LEN_0F3A18_P_2_W_1, + EVEX_LEN_0F3A19_P_2_W_0, + EVEX_LEN_0F3A19_P_2_W_1, + EVEX_LEN_0F3A1A_P_2_W_0, + EVEX_LEN_0F3A1A_P_2_W_1, + EVEX_LEN_0F3A1B_P_2_W_0, + EVEX_LEN_0F3A1B_P_2_W_1, + EVEX_LEN_0F3A23_P_2_W_0, + EVEX_LEN_0F3A23_P_2_W_1, + EVEX_LEN_0F3A38_P_2_W_0, + EVEX_LEN_0F3A38_P_2_W_1, + EVEX_LEN_0F3A39_P_2_W_0, + EVEX_LEN_0F3A39_P_2_W_1, + EVEX_LEN_0F3A3A_P_2_W_0, + EVEX_LEN_0F3A3A_P_2_W_1, + EVEX_LEN_0F3A3B_P_2_W_0, + EVEX_LEN_0F3A3B_P_2_W_1, + EVEX_LEN_0F3A43_P_2_W_0, + EVEX_LEN_0F3A43_P_2_W_1 +}; + enum { VEX_W_0F41_P_0_LEN_1 = 0, @@ -1953,16 +1988,12 @@ enum VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_0_LEN_0, VEX_W_0F92_P_2_LEN_0, - VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_0_LEN_0, VEX_W_0F93_P_2_LEN_0, - VEX_W_0F93_P_3_LEN_0, VEX_W_0F98_P_0_LEN_0, VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0, - VEX_W_0FC4_P_2, - VEX_W_0FC5_P_2, VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2, @@ -1989,11 +2020,8 @@ enum VEX_W_0F3A04_P_2, VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2, - VEX_W_0F3A14_P_2, - VEX_W_0F3A15_P_2, VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, - VEX_W_0F3A20_P_2, VEX_W_0F3A30_P_2_LEN_0, VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0, @@ -2010,17 +2038,13 @@ enum VEX_W_0F3ACF_P_2, EVEX_W_0F10_P_0, - EVEX_W_0F10_P_1_M_0, - EVEX_W_0F10_P_1_M_1, + EVEX_W_0F10_P_1, EVEX_W_0F10_P_2, - EVEX_W_0F10_P_3_M_0, - EVEX_W_0F10_P_3_M_1, + EVEX_W_0F10_P_3, EVEX_W_0F11_P_0, - EVEX_W_0F11_P_1_M_0, - EVEX_W_0F11_P_1_M_1, + EVEX_W_0F11_P_1, EVEX_W_0F11_P_2, - EVEX_W_0F11_P_3_M_0, - EVEX_W_0F11_P_3_M_1, + EVEX_W_0F11_P_3, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_0_M_1, EVEX_W_0F12_P_1, @@ -2042,7 +2066,6 @@ enum EVEX_W_0F28_P_2, EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, - EVEX_W_0F2A_P_1, EVEX_W_0F2A_P_3, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2, @@ -2099,7 +2122,6 @@ enum EVEX_W_0F6B_P_2, EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, - EVEX_W_0F6E_P_2, EVEX_W_0F6F_P_1, EVEX_W_0F6F_P_2, EVEX_W_0F6F_P_3, @@ -2116,11 +2138,9 @@ enum EVEX_W_0F7A_P_1, EVEX_W_0F7A_P_2, EVEX_W_0F7A_P_3, - EVEX_W_0F7B_P_1, EVEX_W_0F7B_P_2, EVEX_W_0F7B_P_3, EVEX_W_0F7E_P_1, - EVEX_W_0F7E_P_2, EVEX_W_0F7F_P_1, EVEX_W_0F7F_P_2, EVEX_W_0F7F_P_3, @@ -2190,6 +2210,7 @@ enum EVEX_W_0F3839_P_1, EVEX_W_0F383A_P_1, EVEX_W_0F3840_P_2, + EVEX_W_0F3852_P_1, EVEX_W_0F3854_P_2, EVEX_W_0F3855_P_2, EVEX_W_0F3858_P_2, @@ -2199,9 +2220,12 @@ enum EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2, EVEX_W_0F3866_P_2, + EVEX_W_0F3868_P_3, EVEX_W_0F3870_P_2, EVEX_W_0F3871_P_2, + EVEX_W_0F3872_P_1, EVEX_W_0F3872_P_2, + EVEX_W_0F3872_P_3, EVEX_W_0F3873_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, @@ -2228,14 +2252,12 @@ enum EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2, EVEX_W_0F3A0B_P_2, - EVEX_W_0F3A16_P_2, EVEX_W_0F3A18_P_2, EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2, EVEX_W_0F3A1B_P_2, EVEX_W_0F3A1D_P_2, EVEX_W_0F3A21_P_2, - EVEX_W_0F3A22_P_2, EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2, EVEX_W_0F3A39_P_2, @@ -3414,7 +3436,7 @@ static const struct dis386 reg_table[][8] = { { MOD_TABLE (MOD_0F18_REG_6) }, { MOD_TABLE (MOD_0F18_REG_7) }, }, - /* REG_0F1C_MOD_0 */ + /* REG_0F1C_P_0_MOD_0 */ { { "cldemote", { Mb }, 0 }, { "nopQ", { Ev }, 0 }, @@ -3425,7 +3447,7 @@ static const struct dis386 reg_table[][8] = { { "nopQ", { Ev }, 0 }, { "nopQ", { Ev }, 0 }, }, - /* REG_0F1E_MOD_3 */ + /* REG_0F1E_P_1_MOD_3 */ { { "nopQ", { Ev }, 0 }, { "rdsspK", { Rdq }, PREFIX_OPCODE }, @@ -3434,7 +3456,7 @@ static const struct dis386 reg_table[][8] = { { "nopQ", { Ev }, 0 }, { "nopQ", { Ev }, 0 }, { "nopQ", { Ev }, 0 }, - { RM_TABLE (RM_0F1E_MOD_3_REG_7) }, + { RM_TABLE (RM_0F1E_P_1_MOD_3_REG_7) }, }, /* REG_0F71 */ { @@ -3567,33 +3589,32 @@ static const struct dis386 reg_table[][8] = { }, /* REG_XOP_LWP */ { - { "lwpins", { { OP_LWP_E, 0 }, Ed, Iq }, 0 }, - { "lwpval", { { OP_LWP_E, 0 }, Ed, Iq }, 0 }, + { "lwpins", { { OP_LWP_E, 0 }, Ed, Id }, 0 }, + { "lwpval", { { OP_LWP_E, 0 }, Ed, Id }, 0 }, }, /* REG_XOP_TBM_01 */ { { Bad_Opcode }, - { "blcfill", { { OP_LWP_E, 0 }, Ev }, 0 }, - { "blsfill", { { OP_LWP_E, 0 }, Ev }, 0 }, - { "blcs", { { OP_LWP_E, 0 }, Ev }, 0 }, - { "tzmsk", { { OP_LWP_E, 0 }, Ev }, 0 }, - { "blcic", { { OP_LWP_E, 0 }, Ev }, 0 }, - { "blsic", { { OP_LWP_E, 0 }, Ev }, 0 }, - { "t1mskc", { { OP_LWP_E, 0 }, Ev }, 0 }, + { "blcfill", { { OP_LWP_E, 0 }, Edq }, 0 }, + { "blsfill", { { OP_LWP_E, 0 }, Edq }, 0 }, + { "blcs", { { OP_LWP_E, 0 }, Edq }, 0 }, + { "tzmsk", { { OP_LWP_E, 0 }, Edq }, 0 }, + { "blcic", { { OP_LWP_E, 0 }, Edq }, 0 }, + { "blsic", { { OP_LWP_E, 0 }, Edq }, 0 }, + { "t1mskc", { { OP_LWP_E, 0 }, Edq }, 0 }, }, /* REG_XOP_TBM_02 */ { { Bad_Opcode }, - { "blcmsk", { { OP_LWP_E, 0 }, Ev }, 0 }, + { "blcmsk", { { OP_LWP_E, 0 }, Edq }, 0 }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { "blci", { { OP_LWP_E, 0 }, Ev }, 0 }, + { "blci", { { OP_LWP_E, 0 }, Edq }, 0 }, }, -#define NEED_REG_TABLE -#include "i386-dis-evex.h" -#undef NEED_REG_TABLE + +#include "i386-dis-evex-reg.h" }; static const struct dis386 prefix_table[][4] = { @@ -3605,24 +3626,35 @@ static const struct dis386 prefix_table[][4] = { { NULL, { { NULL, 0 } }, PREFIX_IGNORED } }, - /* PREFIX_MOD_0_0F01_REG_5 */ + /* PREFIX_0F01_REG_5_MOD_0 */ { { Bad_Opcode }, { "rstorssp", { Mq }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_3_0F01_REG_5_RM_0 */ + /* PREFIX_0F01_REG_5_MOD_3_RM_0 */ { { Bad_Opcode }, { "setssbsy", { Skip_MODRM }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_3_0F01_REG_5_RM_2 */ + /* PREFIX_0F01_REG_5_MOD_3_RM_2 */ { { Bad_Opcode }, { "saveprevssp", { Skip_MODRM }, PREFIX_OPCODE }, }, + /* PREFIX_0F01_REG_7_MOD_3_RM_2 */ + { + { "monitorx", { { OP_Monitor, 0 } }, 0 }, + { "mcommit", { Skip_MODRM }, 0 }, + }, + + /* PREFIX_0F01_REG_7_MOD_3_RM_3 */ + { + { "mwaitx", { { OP_Mwait, eBX_reg } }, 0 }, + }, + /* PREFIX_0F09 */ { { "wbinvd", { XX }, 0 }, @@ -3695,9 +3727,9 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_0F2A */ { { "cvtpi2ps", { XM, EMCq }, PREFIX_OPCODE }, - { "cvtsi2ss%LQ", { XM, Ev }, PREFIX_OPCODE }, + { "cvtsi2ss%LQ", { XM, Edq }, PREFIX_OPCODE }, { "cvtpi2pd", { XM, EMCq }, PREFIX_OPCODE }, - { "cvtsi2sd%LQ", { XM, Ev }, 0 }, + { "cvtsi2sd%LQ", { XM, Edq }, 0 }, }, /* PREFIX_0F2B */ @@ -3711,17 +3743,17 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_0F2C */ { { "cvttps2pi", { MXC, EXq }, PREFIX_OPCODE }, - { "cvttss2si", { Gv, EXd }, PREFIX_OPCODE }, + { "cvttss2si", { Gdq, EXd }, PREFIX_OPCODE }, { "cvttpd2pi", { MXC, EXx }, PREFIX_OPCODE }, - { "cvttsd2si", { Gv, EXq }, PREFIX_OPCODE }, + { "cvttsd2si", { Gdq, EXq }, PREFIX_OPCODE }, }, /* PREFIX_0F2D */ { { "cvtps2pi", { MXC, EXq }, PREFIX_OPCODE }, - { "cvtss2si", { Gv, EXd }, PREFIX_OPCODE }, + { "cvtss2si", { Gdq, EXd }, PREFIX_OPCODE }, { "cvtpd2pi", { MXC, EXx }, PREFIX_OPCODE }, - { "cvtsd2si", { Gv, EXq }, PREFIX_OPCODE }, + { "cvtsd2si", { Gdq, EXq }, PREFIX_OPCODE }, }, /* PREFIX_0F2E */ @@ -3931,69 +3963,69 @@ static const struct dis386 prefix_table[][4] = { { "movdqa", { EXxS, XM }, PREFIX_OPCODE }, }, - /* PREFIX_0FAE_REG_0 */ + /* PREFIX_0FAE_REG_0_MOD_3 */ { { Bad_Opcode }, { "rdfsbase", { Ev }, 0 }, }, - /* PREFIX_0FAE_REG_1 */ + /* PREFIX_0FAE_REG_1_MOD_3 */ { { Bad_Opcode }, { "rdgsbase", { Ev }, 0 }, }, - /* PREFIX_0FAE_REG_2 */ + /* PREFIX_0FAE_REG_2_MOD_3 */ { { Bad_Opcode }, { "wrfsbase", { Ev }, 0 }, }, - /* PREFIX_0FAE_REG_3 */ + /* PREFIX_0FAE_REG_3_MOD_3 */ { { Bad_Opcode }, { "wrgsbase", { Ev }, 0 }, }, - /* PREFIX_MOD_0_0FAE_REG_4 */ + /* PREFIX_0FAE_REG_4_MOD_0 */ { { "xsave", { FXSAVE }, 0 }, { "ptwrite%LQ", { Edq }, 0 }, }, - /* PREFIX_MOD_3_0FAE_REG_4 */ + /* PREFIX_0FAE_REG_4_MOD_3 */ { { Bad_Opcode }, { "ptwrite%LQ", { Edq }, 0 }, }, - /* PREFIX_MOD_0_0FAE_REG_5 */ + /* PREFIX_0FAE_REG_5_MOD_0 */ { { "xrstor", { FXSAVE }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_3_0FAE_REG_5 */ + /* PREFIX_0FAE_REG_5_MOD_3 */ { { "lfence", { Skip_MODRM }, 0 }, { "incsspK", { Rdq }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_0_0FAE_REG_6 */ + /* PREFIX_0FAE_REG_6_MOD_0 */ { { "xsaveopt", { FXSAVE }, PREFIX_OPCODE }, { "clrssbsy", { Mq }, PREFIX_OPCODE }, { "clwb", { Mb }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_1_0FAE_REG_6 */ + /* PREFIX_0FAE_REG_6_MOD_3 */ { - { RM_TABLE (RM_0FAE_REG_6) }, + { RM_TABLE (RM_0FAE_REG_6_MOD_3_P_0) }, { "umonitor", { Eva }, PREFIX_OPCODE }, { "tpause", { Edq }, PREFIX_OPCODE }, { "umwait", { Edq }, PREFIX_OPCODE }, }, - /* PREFIX_0FAE_REG_7 */ + /* PREFIX_0FAE_REG_7_MOD_0 */ { { "clflush", { Mb }, 0 }, { Bad_Opcode }, @@ -4028,26 +4060,26 @@ static const struct dis386 prefix_table[][4] = { { "cmpsd", { XM, EXq, CMP }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_0_0FC3 */ + /* PREFIX_0FC3_MOD_0 */ { - { "movntiS", { Ev, Gv }, PREFIX_OPCODE }, + { "movntiS", { Edq, Gdq }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_0_0FC7_REG_6 */ + /* PREFIX_0FC7_REG_6_MOD_0 */ { { "vmptrld",{ Mq }, 0 }, { "vmxon", { Mq }, 0 }, { "vmclear",{ Mq }, 0 }, }, - /* PREFIX_MOD_3_0FC7_REG_6 */ + /* PREFIX_0FC7_REG_6_MOD_3 */ { { "rdrand", { Ev }, 0 }, { Bad_Opcode }, { "rdrand", { Ev }, 0 } }, - /* PREFIX_MOD_3_0FC7_REG_7 */ + /* PREFIX_0FC7_REG_7_MOD_3 */ { { "rdseed", { Ev }, 0 }, { "rdpid", { Em }, 0 }, @@ -4444,8 +4476,9 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_0F38F8 */ { { Bad_Opcode }, - { Bad_Opcode }, + { MOD_TABLE (MOD_0F38F8_PREFIX_1) }, { MOD_TABLE (MOD_0F38F8_PREFIX_2) }, + { MOD_TABLE (MOD_0F38F8_PREFIX_3) }, }, /* PREFIX_0F38F9 */ @@ -4667,25 +4700,25 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_VEX_0F2A */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2A_P_1) }, + { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2A_P_3) }, + { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 }, }, /* PREFIX_VEX_0F2C */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2C_P_1) }, + { "vcvttss2si", { Gdq, EXdScalar }, 0 }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2C_P_3) }, + { "vcvttsd2si", { Gdq, EXqScalar }, 0 }, }, /* PREFIX_VEX_0F2D */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2D_P_1) }, + { "vcvtss2si", { Gdq, EXdScalar }, 0 }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2D_P_3) }, + { "vcvtsd2si", { Gdq, EXqScalar }, 0 }, }, /* PREFIX_VEX_0F2E */ @@ -6758,9 +6791,7 @@ static const struct dis386 prefix_table[][4] = { { VEX_LEN_TABLE (VEX_LEN_0F3AF0_P_3) }, }, -#define NEED_PREFIX_TABLE -#include "i386-dis-evex.h" -#undef NEED_PREFIX_TABLE +#include "i386-dis-evex-prefix.h" }; static const struct dis386 x86_64_table[][2] = { @@ -8123,7 +8154,7 @@ static const struct dis386 xop_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 10 */ - { "bextr", { Gv, Ev, Iq }, 0 }, + { "bextrS", { Gdq, Edq, Id }, 0 }, { Bad_Opcode }, { REG_TABLE (REG_XOP_LWP) }, { Bad_Opcode }, @@ -9271,9 +9302,8 @@ static const struct dis386 vex_table[][256] = { }, }; -#define NEED_OPCODE_TABLE #include "i386-dis-evex.h" -#undef NEED_OPCODE_TABLE + static const struct dis386 vex_len_table[][2] = { /* VEX_LEN_0F12_P_0_M_0 */ { @@ -9315,42 +9345,6 @@ static const struct dis386 vex_len_table[][2] = { { "vmovhpX", { EXq, XM }, 0 }, }, - /* VEX_LEN_0F2A_P_1 */ - { - { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Ev }, 0 }, - { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Ev }, 0 }, - }, - - /* VEX_LEN_0F2A_P_3 */ - { - { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Ev }, 0 }, - { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Ev }, 0 }, - }, - - /* VEX_LEN_0F2C_P_1 */ - { - { "vcvttss2si", { Gv, EXdScalar }, 0 }, - { "vcvttss2si", { Gv, EXdScalar }, 0 }, - }, - - /* VEX_LEN_0F2C_P_3 */ - { - { "vcvttsd2si", { Gv, EXqScalar }, 0 }, - { "vcvttsd2si", { Gv, EXqScalar }, 0 }, - }, - - /* VEX_LEN_0F2D_P_1 */ - { - { "vcvtss2si", { Gv, EXdScalar }, 0 }, - { "vcvtss2si", { Gv, EXdScalar }, 0 }, - }, - - /* VEX_LEN_0F2D_P_3 */ - { - { "vcvtsd2si", { Gv, EXqScalar }, 0 }, - { "vcvtsd2si", { Gv, EXqScalar }, 0 }, - }, - /* VEX_LEN_0F41_P_0 */ { { Bad_Opcode }, @@ -9483,7 +9477,7 @@ static const struct dis386 vex_len_table[][2] = { /* VEX_LEN_0F92_P_3 */ { - { VEX_W_TABLE (VEX_W_0F92_P_3_LEN_0) }, + { MOD_TABLE (MOD_VEX_0F92_P_3_LEN_0) }, }, /* VEX_LEN_0F93_P_0 */ @@ -9498,7 +9492,7 @@ static const struct dis386 vex_len_table[][2] = { /* VEX_LEN_0F93_P_3 */ { - { VEX_W_TABLE (VEX_W_0F93_P_3_LEN_0) }, + { MOD_TABLE (MOD_VEX_0F93_P_3_LEN_0) }, }, /* VEX_LEN_0F98_P_0 */ @@ -9533,12 +9527,12 @@ static const struct dis386 vex_len_table[][2] = { /* VEX_LEN_0FC4_P_2 */ { - { VEX_W_TABLE (VEX_W_0FC4_P_2) }, + { "vpinsrw", { XM, Vex128, Edqw, Ib }, 0 }, }, /* VEX_LEN_0FC5_P_2 */ { - { VEX_W_TABLE (VEX_W_0FC5_P_2) }, + { "vpextrw", { Gdq, XS, Ib }, 0 }, }, /* VEX_LEN_0FD6_P_2 */ @@ -9671,12 +9665,12 @@ static const struct dis386 vex_len_table[][2] = { /* VEX_LEN_0F3A14_P_2 */ { - { VEX_W_TABLE (VEX_W_0F3A14_P_2) }, + { "vpextrb", { Edqb, XM, Ib }, 0 }, }, /* VEX_LEN_0F3A15_P_2 */ { - { VEX_W_TABLE (VEX_W_0F3A15_P_2) }, + { "vpextrw", { Edqw, XM, Ib }, 0 }, }, /* VEX_LEN_0F3A16_P_2 */ @@ -9703,7 +9697,7 @@ static const struct dis386 vex_len_table[][2] = { /* VEX_LEN_0F3A20_P_2 */ { - { VEX_W_TABLE (VEX_W_0F3A20_P_2) }, + { "vpinsrb", { XM, Vex128, Edqb, Ib }, 0 }, }, /* VEX_LEN_0F3A21_P_2 */ @@ -9882,6 +9876,8 @@ static const struct dis386 vex_len_table[][2] = { }, }; +#include "i386-dis-evex-len.h" + static const struct dis386 vex_w_table[][2] = { { /* VEX_W_0F41_P_0_LEN_1 */ @@ -9990,11 +9986,6 @@ static const struct dis386 vex_w_table[][2] = { /* VEX_W_0F92_P_2_LEN_0 */ { MOD_TABLE (MOD_VEX_W_0_0F92_P_2_LEN_0) }, }, - { - /* VEX_W_0F92_P_3_LEN_0 */ - { MOD_TABLE (MOD_VEX_W_0_0F92_P_3_LEN_0) }, - { MOD_TABLE (MOD_VEX_W_1_0F92_P_3_LEN_0) }, - }, { /* VEX_W_0F93_P_0_LEN_0 */ { MOD_TABLE (MOD_VEX_W_0_0F93_P_0_LEN_0) }, @@ -10003,11 +9994,6 @@ static const struct dis386 vex_w_table[][2] = { /* VEX_W_0F93_P_2_LEN_0 */ { MOD_TABLE (MOD_VEX_W_0_0F93_P_2_LEN_0) }, }, - { - /* VEX_W_0F93_P_3_LEN_0 */ - { MOD_TABLE (MOD_VEX_W_0_0F93_P_3_LEN_0) }, - { MOD_TABLE (MOD_VEX_W_1_0F93_P_3_LEN_0) }, - }, { /* VEX_W_0F98_P_0_LEN_0 */ { MOD_TABLE (MOD_VEX_W_0_0F98_P_0_LEN_0) }, @@ -10028,14 +10014,6 @@ static const struct dis386 vex_w_table[][2] = { { MOD_TABLE (MOD_VEX_W_0_0F99_P_2_LEN_0) }, { MOD_TABLE (MOD_VEX_W_1_0F99_P_2_LEN_0) }, }, - { - /* VEX_W_0FC4_P_2 */ - { "vpinsrw", { XM, Vex128, Edqw, Ib }, 0 }, - }, - { - /* VEX_W_0FC5_P_2 */ - { "vpextrw", { Gdq, XS, Ib }, 0 }, - }, { /* VEX_W_0F380C_P_2 */ { "vpermilps", { XM, Vex, EXx }, 0 }, @@ -10142,14 +10120,6 @@ static const struct dis386 vex_w_table[][2] = { /* VEX_W_0F3A06_P_2 */ { "vperm2f128", { XM, Vex256, EXx, Ib }, 0 }, }, - { - /* VEX_W_0F3A14_P_2 */ - { "vpextrb", { Edqb, XM, Ib }, 0 }, - }, - { - /* VEX_W_0F3A15_P_2 */ - { "vpextrw", { Edqw, XM, Ib }, 0 }, - }, { /* VEX_W_0F3A18_P_2 */ { "vinsertf128", { XM, Vex256, EXxmm, Ib }, 0 }, @@ -10158,10 +10128,6 @@ static const struct dis386 vex_w_table[][2] = { /* VEX_W_0F3A19_P_2 */ { "vextractf128", { EXxmm, XM, Ib }, 0 }, }, - { - /* VEX_W_0F3A20_P_2 */ - { "vpinsrb", { XM, Vex128, Edqb, Ib }, 0 }, - }, { /* VEX_W_0F3A30_P_2_LEN_0 */ { MOD_TABLE (MOD_VEX_W_0_0F3A30_P_2_LEN_0) }, @@ -10226,9 +10192,8 @@ static const struct dis386 vex_w_table[][2] = { { Bad_Opcode }, { "vgf2p8affineinvqb", { XM, Vex, EXx, Ib }, 0 }, }, -#define NEED_VEX_W_TABLE -#include "i386-dis-evex.h" -#undef NEED_VEX_W_TABLE + +#include "i386-dis-evex-w.h" }; static const struct dis386 mod_table[][2] = { @@ -10276,13 +10241,13 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0F01_REG_5 */ - { PREFIX_TABLE (PREFIX_MOD_0_0F01_REG_5) }, - { RM_TABLE (RM_0F01_REG_5) }, + { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_0) }, + { RM_TABLE (RM_0F01_REG_5_MOD_3) }, }, { /* MOD_0F01_REG_7 */ { "invlpg", { Mb }, 0 }, - { RM_TABLE (RM_0F01_REG_7) }, + { RM_TABLE (RM_0F01_REG_7_MOD_3) }, }, { /* MOD_0F12_PREFIX_0 */ @@ -10351,13 +10316,13 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0F1C_PREFIX_0 */ - { REG_TABLE (REG_0F1C_MOD_0) }, + { REG_TABLE (REG_0F1C_P_0_MOD_0) }, { "nopQ", { Ev }, 0 }, }, { /* MOD_0F1E_PREFIX_1 */ { "nopQ", { Ev }, 0 }, - { REG_TABLE (REG_0F1E_MOD_3) }, + { REG_TABLE (REG_0F1E_P_1_MOD_3) }, }, { /* MOD_0F24 */ @@ -10443,42 +10408,42 @@ static const struct dis386 mod_table[][2] = { { /* MOD_0FAE_REG_0 */ { "fxsave", { FXSAVE }, 0 }, - { PREFIX_TABLE (PREFIX_0FAE_REG_0) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_0_MOD_3) }, }, { /* MOD_0FAE_REG_1 */ { "fxrstor", { FXSAVE }, 0 }, - { PREFIX_TABLE (PREFIX_0FAE_REG_1) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_1_MOD_3) }, }, { /* MOD_0FAE_REG_2 */ { "ldmxcsr", { Md }, 0 }, - { PREFIX_TABLE (PREFIX_0FAE_REG_2) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_2_MOD_3) }, }, { /* MOD_0FAE_REG_3 */ { "stmxcsr", { Md }, 0 }, - { PREFIX_TABLE (PREFIX_0FAE_REG_3) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_3_MOD_3) }, }, { /* MOD_0FAE_REG_4 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FAE_REG_4) }, - { PREFIX_TABLE (PREFIX_MOD_3_0FAE_REG_4) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_4_MOD_0) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_4_MOD_3) }, }, { /* MOD_0FAE_REG_5 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FAE_REG_5) }, - { PREFIX_TABLE (PREFIX_MOD_3_0FAE_REG_5) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_0) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_3) }, }, { /* MOD_0FAE_REG_6 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FAE_REG_6) }, - { PREFIX_TABLE (PREFIX_MOD_1_0FAE_REG_6) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_6_MOD_0) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_6_MOD_3) }, }, { /* MOD_0FAE_REG_7 */ - { PREFIX_TABLE (PREFIX_0FAE_REG_7) }, - { RM_TABLE (RM_0FAE_REG_7) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_7_MOD_0) }, + { RM_TABLE (RM_0FAE_REG_7_MOD_3) }, }, { /* MOD_0FB2 */ @@ -10494,7 +10459,7 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0FC3 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FC3) }, + { PREFIX_TABLE (PREFIX_0FC3_MOD_0) }, }, { /* MOD_0FC7_REG_3 */ @@ -10510,13 +10475,13 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0FC7_REG_6 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FC7_REG_6) }, - { PREFIX_TABLE (PREFIX_MOD_3_0FC7_REG_6) } + { PREFIX_TABLE (PREFIX_0FC7_REG_6_MOD_0) }, + { PREFIX_TABLE (PREFIX_0FC7_REG_6_MOD_3) } }, { /* MOD_0FC7_REG_7 */ { "vmptrst", { Mq }, 0 }, - { PREFIX_TABLE (PREFIX_MOD_3_0FC7_REG_7) } + { PREFIX_TABLE (PREFIX_0FC7_REG_7_MOD_3) } }, { /* MOD_0FD7 */ @@ -10543,13 +10508,21 @@ static const struct dis386 mod_table[][2] = { /* MOD_0F38F6_PREFIX_0 */ { "wrssK", { M, Gdq }, PREFIX_OPCODE }, }, + { + /* MOD_0F38F8_PREFIX_1 */ + { "enqcmds", { Gva, M }, PREFIX_OPCODE }, + }, { /* MOD_0F38F8_PREFIX_2 */ { "movdir64b", { Gva, M }, PREFIX_OPCODE }, }, + { + /* MOD_0F38F8_PREFIX_3 */ + { "enqcmd", { Gva, M }, PREFIX_OPCODE }, + }, { /* MOD_0F38F9_PREFIX_0 */ - { "movdiri", { Em, Gv }, PREFIX_OPCODE }, + { "movdiri", { Ev, Gv }, PREFIX_OPCODE }, }, { /* MOD_62_32BIT */ @@ -10829,14 +10802,9 @@ static const struct dis386 mod_table[][2] = { { "kmovb", { MaskG, Rdq }, 0 }, }, { - /* MOD_VEX_W_0_0F92_P_3_LEN_0 */ - { Bad_Opcode }, - { "kmovd", { MaskG, Rdq }, 0 }, - }, - { - /* MOD_VEX_W_1_0F92_P_3_LEN_0 */ + /* MOD_VEX_0F92_P_3_LEN_0 */ { Bad_Opcode }, - { "kmovq", { MaskG, Rdq }, 0 }, + { "kmovK", { MaskG, Rdq }, 0 }, }, { /* MOD_VEX_W_0_0F93_P_0_LEN_0 */ @@ -10849,14 +10817,9 @@ static const struct dis386 mod_table[][2] = { { "kmovb", { Gdq, MaskR }, 0 }, }, { - /* MOD_VEX_W_0_0F93_P_3_LEN_0 */ + /* MOD_VEX_0F93_P_3_LEN_0 */ { Bad_Opcode }, - { "kmovd", { Gdq, MaskR }, 0 }, - }, - { - /* MOD_VEX_W_1_0F93_P_3_LEN_0 */ - { Bad_Opcode }, - { "kmovq", { Gdq, MaskR }, 0 }, + { "kmovK", { Gdq, MaskR }, 0 }, }, { /* MOD_VEX_W_0_0F98_P_0_LEN_0 */ @@ -10995,9 +10958,8 @@ static const struct dis386 mod_table[][2] = { { Bad_Opcode }, { "kshiftlq", { MaskG, MaskR, Ib }, 0 }, }, -#define NEED_MOD_TABLE -#include "i386-dis-evex.h" -#undef NEED_MOD_TABLE + +#include "i386-dis-evex-mod.h" }; static const struct dis386 rm_table[][8] = { @@ -11011,7 +10973,7 @@ static const struct dis386 rm_table[][8] = { }, { /* RM_0F01_REG_0 */ - { Bad_Opcode }, + { "enclv", { Skip_MODRM }, 0 }, { "vmcall", { Skip_MODRM }, 0 }, { "vmlaunch", { Skip_MODRM }, 0 }, { "vmresume", { Skip_MODRM }, 0 }, @@ -11052,10 +11014,10 @@ static const struct dis386 rm_table[][8] = { { "invlpga", { Skip_MODRM }, 0 }, }, { - /* RM_0F01_REG_5 */ - { PREFIX_TABLE (PREFIX_MOD_3_0F01_REG_5_RM_0) }, + /* RM_0F01_REG_5_MOD_3 */ + { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_0) }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_MOD_3_0F01_REG_5_RM_2) }, + { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_2) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -11063,15 +11025,16 @@ static const struct dis386 rm_table[][8] = { { "wrpkru", { Skip_MODRM }, 0 }, }, { - /* RM_0F01_REG_7 */ + /* RM_0F01_REG_7_MOD_3 */ { "swapgs", { Skip_MODRM }, 0 }, { "rdtscp", { Skip_MODRM }, 0 }, - { "monitorx", { { OP_Monitor, 0 } }, 0 }, - { "mwaitx", { { OP_Mwaitx, 0 } }, 0 }, + { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_2) }, + { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_3) }, { "clzero", { Skip_MODRM }, 0 }, + { "rdpru", { Skip_MODRM }, 0 }, }, { - /* RM_0F1E_MOD_3_REG_7 */ + /* RM_0F1E_P_1_MOD_3_REG_7 */ { "nopQ", { Ev }, 0 }, { "nopQ", { Ev }, 0 }, { "endbr64", { Skip_MODRM }, PREFIX_OPCODE }, @@ -11082,11 +11045,11 @@ static const struct dis386 rm_table[][8] = { { "nopQ", { Ev }, 0 }, }, { - /* RM_0FAE_REG_6 */ + /* RM_0FAE_REG_6_MOD_3 */ { "mfence", { Skip_MODRM }, 0 }, }, { - /* RM_0FAE_REG_7 */ + /* RM_0FAE_REG_7_MOD_3 */ { "sfence", { Skip_MODRM }, 0 }, }, @@ -11542,6 +11505,29 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info) dp = &vex_len_table[dp->op[1].bytemode][vindex]; break; + case USE_EVEX_LEN_TABLE: + if (!vex.evex) + abort (); + + switch (vex.length) + { + case 128: + vindex = 0; + break; + case 256: + vindex = 1; + break; + case 512: + vindex = 2; + break; + default: + abort (); + break; + } + + dp = &evex_len_table[dp->op[1].bytemode][vindex]; + break; + case USE_XOP_8F_TABLE: FETCH_DATA (info, codep + 3); /* All bits in the REX prefix are ignored. */ @@ -12153,6 +12139,14 @@ print_insn (bfd_vma pc, disassemble_info *info) } } + /* If VEX.vvvv and EVEX.vvvv are unused, they must be all 1s, which + are all 0s in inverted form. */ + if (need_vex && vex.register_specifier != 0) + { + (*info->fprintf_func) (info->stream, "(bad)"); + return end_codep - priv.the_buffer; + } + /* Check if the REX prefix is used. */ if (rex_ignored == 0 && (rex ^ rex_used) == 0 && last_rex_prefix >= 0) all_prefixes[last_rex_prefix] = 0; @@ -13492,7 +13486,6 @@ intel_operand_size (int bytemode, int sizeflag) case q_swap_mode: oappend ("QWORD PTR "); break; - case dqa_mode: case m_mode: if (address_mode == mode_64bit) oappend ("QWORD PTR "); @@ -13851,7 +13844,6 @@ OP_E_register (int bytemode, int sizeflag) case dqb_mode: case dqd_mode: case dqw_mode: - case dqa_mode: USED_REX (REX_W); if (rex & REX_W) names = names64; @@ -13928,6 +13920,13 @@ OP_E_memory (int bytemode, int sizeflag) case db_mode: shift = 0; break; + case dq_mode: + if (address_mode != mode_64bit) + { + shift = 2; + break; + } + /* fall through */ case vex_vsib_d_w_dq_mode: case vex_vsib_d_w_d_mode: case vex_vsib_q_w_dq_mode: @@ -13994,9 +13993,6 @@ OP_E_memory (int bytemode, int sizeflag) case xmm_mb_mode: shift = 0; break; - case dqa_mode: - shift = address_mode == mode_64bit ? 3 : 2; - break; default: abort (); } @@ -14176,7 +14172,7 @@ OP_E_memory (int bytemode, int sizeflag) } } - if ((havebase || haveindex || needaddr32 || riprel) + if ((havebase || haveindex || needindex || needaddr32 || riprel) && (bytemode != v_bnd_mode) && (bytemode != v_bndmk_mode) && (bytemode != bnd_mode) @@ -14702,13 +14698,6 @@ OP_I (int bytemode, int sizeflag) op = *codep++; mask = 0xff; break; - case q_mode: - if (address_mode == mode_64bit) - { - op = get32s (); - break; - } - /* Fall through. */ case v_mode: USED_REX (REX_W); if (rex & REX_W) @@ -14728,6 +14717,10 @@ OP_I (int bytemode, int sizeflag) used_prefixes |= (prefixes & PREFIX_DATA); } break; + case d_mode: + mask = 0xffffffff; + op = get32 (); + break; case w_mode: mask = 0xfffff; op = get16 (); @@ -14751,53 +14744,16 @@ OP_I (int bytemode, int sizeflag) static void OP_I64 (int bytemode, int sizeflag) { - bfd_signed_vma op; - bfd_signed_vma mask = -1; - - if (address_mode != mode_64bit) + if (bytemode != v_mode || address_mode != mode_64bit || !(rex & REX_W)) { OP_I (bytemode, sizeflag); return; } - switch (bytemode) - { - case b_mode: - FETCH_DATA (the_info, codep + 1); - op = *codep++; - mask = 0xff; - break; - case v_mode: - USED_REX (REX_W); - if (rex & REX_W) - op = get64 (); - else - { - if (sizeflag & DFLAG) - { - op = get32 (); - mask = 0xffffffff; - } - else - { - op = get16 (); - mask = 0xfffff; - } - used_prefixes |= (prefixes & PREFIX_DATA); - } - break; - case w_mode: - mask = 0xfffff; - op = get16 (); - break; - default: - oappend (INTERNAL_DISASSEMBLER_ERROR); - return; - } + USED_REX (REX_W); - op &= mask; scratchbuf[0] = '$'; - print_operand_value (scratchbuf + 1, 1, op); + print_operand_value (scratchbuf + 1, 1, get64 ()); oappend_maybe_intel (scratchbuf); scratchbuf[0] = '\0'; } @@ -15561,35 +15517,15 @@ CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) } static void -OP_Mwaitx (int bytemode ATTRIBUTE_UNUSED, - int sizeflag ATTRIBUTE_UNUSED) +OP_Mwait (int bytemode, int sizeflag ATTRIBUTE_UNUSED) { - /* mwaitx %eax,%ecx,%ebx */ + /* mwait %eax,%ecx / mwaitx %eax,%ecx,%ebx */ if (!intel_syntax) { - const char **names = (address_mode == mode_64bit - ? names64 : names32); - strcpy (op_out[0], names[0]); - strcpy (op_out[1], names[1]); - strcpy (op_out[2], names[3]); - two_source_ops = 1; - } - /* Skip mod/rm byte. */ - MODRM_CHECK; - codep++; -} - -static void -OP_Mwait (int bytemode ATTRIBUTE_UNUSED, - int sizeflag ATTRIBUTE_UNUSED) -{ - /* mwait %eax,%ecx */ - if (!intel_syntax) - { - const char **names = (address_mode == mode_64bit - ? names64 : names32); - strcpy (op_out[0], names[0]); - strcpy (op_out[1], names[1]); + strcpy (op_out[0], names32[0]); + strcpy (op_out[1], names32[1]); + if (bytemode == eBX_reg) + strcpy (op_out[2], names32[3]); two_source_ops = 1; } /* Skip mod/rm byte. */ @@ -15601,27 +15537,25 @@ static void OP_Monitor (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { - /* monitor %eax,%ecx,%edx" */ + /* monitor %{e,r,}ax,%ecx,%edx" */ if (!intel_syntax) { - const char **op1_names; const char **names = (address_mode == mode_64bit ? names64 : names32); - if (!(prefixes & PREFIX_ADDR)) - op1_names = (address_mode == mode_16bit - ? names16 : names); - else + if (prefixes & PREFIX_ADDR) { /* Remove "addr16/addr32". */ all_prefixes[last_addr_prefix] = 0; - op1_names = (address_mode != mode_32bit - ? names32 : names16); + names = (address_mode != mode_32bit + ? names32 : names16); used_prefixes |= PREFIX_ADDR; } - strcpy (op_out[0], op1_names[0]); - strcpy (op_out[1], names[1]); - strcpy (op_out[2], names[2]); + else if (address_mode == mode_16bit) + names = names16; + strcpy (op_out[0], names[0]); + strcpy (op_out[1], names32[1]); + strcpy (op_out[2], names32[2]); two_source_ops = 1; } /* Skip mod/rm byte. */ @@ -15912,6 +15846,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED) return; reg = vex.register_specifier; + vex.register_specifier = 0; if (address_mode != mode_64bit) reg &= 7; else if (vex.evex && !vex.v) @@ -16195,6 +16130,7 @@ OP_Vex_2src_1 (int bytemode, int sizeflag) if (vex.w) { unsigned int reg = vex.register_specifier; + vex.register_specifier = 0; if (address_mode != mode_64bit) reg &= 7; @@ -16212,6 +16148,7 @@ OP_Vex_2src_2 (int bytemode, int sizeflag) else { unsigned int reg = vex.register_specifier; + vex.register_specifier = 0; if (address_mode != mode_64bit) reg &= 7; @@ -16289,11 +16226,7 @@ static void OP_EX_Vex (int bytemode, int sizeflag) { if (modrm.mod != 3) - { - if (vex.register_specifier != 0) - BadOp (); - need_vex_reg = 0; - } + need_vex_reg = 0; OP_EX (bytemode, sizeflag); } @@ -16301,11 +16234,7 @@ static void OP_XMM_Vex (int bytemode, int sizeflag) { if (modrm.mod != 3) - { - if (vex.register_specifier != 0) - BadOp (); - need_vex_reg = 0; - } + need_vex_reg = 0; OP_XMM (bytemode, sizeflag); } @@ -16585,6 +16514,7 @@ OP_LWP_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { const char **names; unsigned int reg = vex.register_specifier; + vex.register_specifier = 0; if (rex & REX_W) names = names64;