X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fi386-dis.c;h=ce27e0e0b89249edda9841364834b8090a8185da;hb=3318ac0e53a673f9989f5e9bbaa9d1c5d536f4e5;hp=281d02c7c25e6a5f077e69bd72826df56be080c9;hpb=2b7bcc8740dda3f314284169aaf1759a9f56025f;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 281d02c7c2..ce27e0e0b8 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1,5 +1,5 @@ /* Print i386 instructions for GDB, the GNU debugger. - Copyright (C) 1988-2019 Free Software Foundation, Inc. + Copyright (C) 1988-2020 Free Software Foundation, Inc. This file is part of the GNU opcodes library. @@ -101,7 +101,6 @@ static void VPCOM_Fixup (int, int); static void OP_0f07 (int, int); static void OP_Monitor (int, int); static void OP_Mwait (int, int); -static void OP_Mwaitx (int, int); static void NOP_Fixup1 (int, int); static void NOP_Fixup2 (int, int); static void OP_3DNowSuffix (int, int); @@ -297,6 +296,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define I1 { OP_I, const_1_mode } #define Jb { OP_J, b_mode } #define Jv { OP_J, v_mode } +#define Jdqw { OP_J, dqw_mode } #define Cm { OP_C, m_mode } #define Dm { OP_D, m_mode } #define Td { OP_T, d_mode } @@ -385,7 +385,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define EXd { OP_EX, d_mode } #define EXdScalar { OP_EX, d_scalar_mode } #define EXdS { OP_EX, d_swap_mode } -#define EXdScalarS { OP_EX, d_scalar_swap_mode } #define EXq { OP_EX, q_mode } #define EXqScalar { OP_EX, q_scalar_mode } #define EXqScalarS { OP_EX, q_scalar_swap_mode } @@ -425,17 +424,12 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Vex128 { OP_VEX, vex128_mode } #define Vex256 { OP_VEX, vex256_mode } #define VexGdq { OP_VEX, dq_mode } -#define EXdVex { OP_EX_Vex, d_mode } -#define EXdVexS { OP_EX_Vex, d_swap_mode } #define EXdVexScalarS { OP_EX_Vex, d_scalar_swap_mode } -#define EXqVex { OP_EX_Vex, q_mode } -#define EXqVexS { OP_EX_Vex, q_swap_mode } #define EXqVexScalarS { OP_EX_Vex, q_scalar_swap_mode } #define EXVexW { OP_EX_VexW, x_mode } #define EXdVexW { OP_EX_VexW, d_mode } #define EXqVexW { OP_EX_VexW, q_mode } #define EXVexImmW { OP_EX_VexImmW, x_mode } -#define XMVex { OP_XMM_Vex, 0 } #define XMVexScalar { OP_XMM_Vex, scalar_mode } #define XMVexW { OP_XMM_VexW, 0 } #define XMVexI4 { OP_REG_VexI4, x_mode } @@ -565,7 +559,8 @@ enum v_bndmk_mode, /* operand size depends on REX prefixes. */ dq_mode, - /* registers like dq_mode, memory like w_mode. */ + /* registers like dq_mode, memory like w_mode, displacements like + v_mode without considering Intel64 ISA. */ dqw_mode, /* bounds operand */ bnd_mode, @@ -745,8 +740,8 @@ enum REG_0F01, REG_0F0D, REG_0F18, - REG_0F1C_MOD_0, - REG_0F1E_MOD_3, + REG_0F1C_P_0_MOD_0, + REG_0F1E_P_1_MOD_3, REG_0F71, REG_0F72, REG_0F73, @@ -937,10 +932,6 @@ enum MOD_VEX_W_0_0F3A33_P_2_LEN_0, MOD_VEX_W_1_0F3A33_P_2_LEN_0, - MOD_EVEX_0F10_PREFIX_1, - MOD_EVEX_0F10_PREFIX_3, - MOD_EVEX_0F11_PREFIX_1, - MOD_EVEX_0F11_PREFIX_3, MOD_EVEX_0F12_PREFIX_0, MOD_EVEX_0F16_PREFIX_0, MOD_EVEX_0F38C6_REG_1, @@ -961,19 +952,21 @@ enum RM_0F01_REG_1, RM_0F01_REG_2, RM_0F01_REG_3, - RM_0F01_REG_5, - RM_0F01_REG_7, - RM_0F1E_MOD_3_REG_7, - RM_0FAE_REG_6, - RM_0FAE_REG_7 + RM_0F01_REG_5_MOD_3, + RM_0F01_REG_7_MOD_3, + RM_0F1E_P_1_MOD_3_REG_7, + RM_0FAE_REG_6_MOD_3_P_0, + RM_0FAE_REG_7_MOD_3, }; enum { PREFIX_90 = 0, - PREFIX_MOD_0_0F01_REG_5, - PREFIX_MOD_3_0F01_REG_5_RM_0, - PREFIX_MOD_3_0F01_REG_5_RM_2, + PREFIX_0F01_REG_5_MOD_0, + PREFIX_0F01_REG_5_MOD_3_RM_0, + PREFIX_0F01_REG_5_MOD_3_RM_2, + PREFIX_0F01_REG_7_MOD_3_RM_2, + PREFIX_0F01_REG_7_MOD_3_RM_3, PREFIX_0F09, PREFIX_0F10, PREFIX_0F11, @@ -1015,25 +1008,25 @@ enum PREFIX_0F7D, PREFIX_0F7E, PREFIX_0F7F, - PREFIX_0FAE_REG_0, - PREFIX_0FAE_REG_1, - PREFIX_0FAE_REG_2, - PREFIX_0FAE_REG_3, - PREFIX_MOD_0_0FAE_REG_4, - PREFIX_MOD_3_0FAE_REG_4, - PREFIX_MOD_0_0FAE_REG_5, - PREFIX_MOD_3_0FAE_REG_5, - PREFIX_MOD_0_0FAE_REG_6, - PREFIX_MOD_1_0FAE_REG_6, - PREFIX_0FAE_REG_7, + PREFIX_0FAE_REG_0_MOD_3, + PREFIX_0FAE_REG_1_MOD_3, + PREFIX_0FAE_REG_2_MOD_3, + PREFIX_0FAE_REG_3_MOD_3, + PREFIX_0FAE_REG_4_MOD_0, + PREFIX_0FAE_REG_4_MOD_3, + PREFIX_0FAE_REG_5_MOD_0, + PREFIX_0FAE_REG_5_MOD_3, + PREFIX_0FAE_REG_6_MOD_0, + PREFIX_0FAE_REG_6_MOD_3, + PREFIX_0FAE_REG_7_MOD_0, PREFIX_0FB8, PREFIX_0FBC, PREFIX_0FBD, PREFIX_0FC2, - PREFIX_MOD_0_0FC3, - PREFIX_MOD_0_0FC7_REG_6, - PREFIX_MOD_3_0FC7_REG_6, - PREFIX_MOD_3_0FC7_REG_7, + PREFIX_0FC3_MOD_0, + PREFIX_0FC7_REG_6_MOD_0, + PREFIX_0FC7_REG_6_MOD_3, + PREFIX_0FC7_REG_7_MOD_3, PREFIX_0FD0, PREFIX_0FD6, PREFIX_0FE6, @@ -1939,6 +1932,18 @@ enum EVEX_LEN_0F385A_P_2_W_1, EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1, + EVEX_LEN_0F38C6_REG_1_PREFIX_2, + EVEX_LEN_0F38C6_REG_2_PREFIX_2, + EVEX_LEN_0F38C6_REG_5_PREFIX_2, + EVEX_LEN_0F38C6_REG_6_PREFIX_2, + EVEX_LEN_0F38C7_R_1_P_2_W_0, + EVEX_LEN_0F38C7_R_1_P_2_W_1, + EVEX_LEN_0F38C7_R_2_P_2_W_0, + EVEX_LEN_0F38C7_R_2_P_2_W_1, + EVEX_LEN_0F38C7_R_5_P_2_W_0, + EVEX_LEN_0F38C7_R_5_P_2_W_1, + EVEX_LEN_0F38C7_R_6_P_2_W_0, + EVEX_LEN_0F38C7_R_6_P_2_W_1, EVEX_LEN_0F3A18_P_2_W_0, EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0, @@ -2035,17 +2040,13 @@ enum VEX_W_0F3ACF_P_2, EVEX_W_0F10_P_0, - EVEX_W_0F10_P_1_M_0, - EVEX_W_0F10_P_1_M_1, + EVEX_W_0F10_P_1, EVEX_W_0F10_P_2, - EVEX_W_0F10_P_3_M_0, - EVEX_W_0F10_P_3_M_1, + EVEX_W_0F10_P_3, EVEX_W_0F11_P_0, - EVEX_W_0F11_P_1_M_0, - EVEX_W_0F11_P_1_M_1, + EVEX_W_0F11_P_1, EVEX_W_0F11_P_2, - EVEX_W_0F11_P_3_M_0, - EVEX_W_0F11_P_3_M_1, + EVEX_W_0F11_P_3, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_0_M_1, EVEX_W_0F12_P_1, @@ -3437,7 +3438,7 @@ static const struct dis386 reg_table[][8] = { { MOD_TABLE (MOD_0F18_REG_6) }, { MOD_TABLE (MOD_0F18_REG_7) }, }, - /* REG_0F1C_MOD_0 */ + /* REG_0F1C_P_0_MOD_0 */ { { "cldemote", { Mb }, 0 }, { "nopQ", { Ev }, 0 }, @@ -3448,7 +3449,7 @@ static const struct dis386 reg_table[][8] = { { "nopQ", { Ev }, 0 }, { "nopQ", { Ev }, 0 }, }, - /* REG_0F1E_MOD_3 */ + /* REG_0F1E_P_1_MOD_3 */ { { "nopQ", { Ev }, 0 }, { "rdsspK", { Rdq }, PREFIX_OPCODE }, @@ -3457,7 +3458,7 @@ static const struct dis386 reg_table[][8] = { { "nopQ", { Ev }, 0 }, { "nopQ", { Ev }, 0 }, { "nopQ", { Ev }, 0 }, - { RM_TABLE (RM_0F1E_MOD_3_REG_7) }, + { RM_TABLE (RM_0F1E_P_1_MOD_3_REG_7) }, }, /* REG_0F71 */ { @@ -3627,24 +3628,35 @@ static const struct dis386 prefix_table[][4] = { { NULL, { { NULL, 0 } }, PREFIX_IGNORED } }, - /* PREFIX_MOD_0_0F01_REG_5 */ + /* PREFIX_0F01_REG_5_MOD_0 */ { { Bad_Opcode }, { "rstorssp", { Mq }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_3_0F01_REG_5_RM_0 */ + /* PREFIX_0F01_REG_5_MOD_3_RM_0 */ { { Bad_Opcode }, { "setssbsy", { Skip_MODRM }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_3_0F01_REG_5_RM_2 */ + /* PREFIX_0F01_REG_5_MOD_3_RM_2 */ { { Bad_Opcode }, { "saveprevssp", { Skip_MODRM }, PREFIX_OPCODE }, }, + /* PREFIX_0F01_REG_7_MOD_3_RM_2 */ + { + { "monitorx", { { OP_Monitor, 0 } }, 0 }, + { "mcommit", { Skip_MODRM }, 0 }, + }, + + /* PREFIX_0F01_REG_7_MOD_3_RM_3 */ + { + { "mwaitx", { { OP_Mwait, eBX_reg } }, 0 }, + }, + /* PREFIX_0F09 */ { { "wbinvd", { XX }, 0 }, @@ -3953,69 +3965,69 @@ static const struct dis386 prefix_table[][4] = { { "movdqa", { EXxS, XM }, PREFIX_OPCODE }, }, - /* PREFIX_0FAE_REG_0 */ + /* PREFIX_0FAE_REG_0_MOD_3 */ { { Bad_Opcode }, { "rdfsbase", { Ev }, 0 }, }, - /* PREFIX_0FAE_REG_1 */ + /* PREFIX_0FAE_REG_1_MOD_3 */ { { Bad_Opcode }, { "rdgsbase", { Ev }, 0 }, }, - /* PREFIX_0FAE_REG_2 */ + /* PREFIX_0FAE_REG_2_MOD_3 */ { { Bad_Opcode }, { "wrfsbase", { Ev }, 0 }, }, - /* PREFIX_0FAE_REG_3 */ + /* PREFIX_0FAE_REG_3_MOD_3 */ { { Bad_Opcode }, { "wrgsbase", { Ev }, 0 }, }, - /* PREFIX_MOD_0_0FAE_REG_4 */ + /* PREFIX_0FAE_REG_4_MOD_0 */ { { "xsave", { FXSAVE }, 0 }, { "ptwrite%LQ", { Edq }, 0 }, }, - /* PREFIX_MOD_3_0FAE_REG_4 */ + /* PREFIX_0FAE_REG_4_MOD_3 */ { { Bad_Opcode }, { "ptwrite%LQ", { Edq }, 0 }, }, - /* PREFIX_MOD_0_0FAE_REG_5 */ + /* PREFIX_0FAE_REG_5_MOD_0 */ { { "xrstor", { FXSAVE }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_3_0FAE_REG_5 */ + /* PREFIX_0FAE_REG_5_MOD_3 */ { { "lfence", { Skip_MODRM }, 0 }, { "incsspK", { Rdq }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_0_0FAE_REG_6 */ + /* PREFIX_0FAE_REG_6_MOD_0 */ { { "xsaveopt", { FXSAVE }, PREFIX_OPCODE }, { "clrssbsy", { Mq }, PREFIX_OPCODE }, { "clwb", { Mb }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_1_0FAE_REG_6 */ + /* PREFIX_0FAE_REG_6_MOD_3 */ { - { RM_TABLE (RM_0FAE_REG_6) }, + { RM_TABLE (RM_0FAE_REG_6_MOD_3_P_0) }, { "umonitor", { Eva }, PREFIX_OPCODE }, { "tpause", { Edq }, PREFIX_OPCODE }, { "umwait", { Edq }, PREFIX_OPCODE }, }, - /* PREFIX_0FAE_REG_7 */ + /* PREFIX_0FAE_REG_7_MOD_0 */ { { "clflush", { Mb }, 0 }, { Bad_Opcode }, @@ -4050,26 +4062,26 @@ static const struct dis386 prefix_table[][4] = { { "cmpsd", { XM, EXq, CMP }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_0_0FC3 */ + /* PREFIX_0FC3_MOD_0 */ { { "movntiS", { Edq, Gdq }, PREFIX_OPCODE }, }, - /* PREFIX_MOD_0_0FC7_REG_6 */ + /* PREFIX_0FC7_REG_6_MOD_0 */ { { "vmptrld",{ Mq }, 0 }, { "vmxon", { Mq }, 0 }, { "vmclear",{ Mq }, 0 }, }, - /* PREFIX_MOD_3_0FC7_REG_6 */ + /* PREFIX_0FC7_REG_6_MOD_3 */ { { "rdrand", { Ev }, 0 }, { Bad_Opcode }, { "rdrand", { Ev }, 0 } }, - /* PREFIX_MOD_3_0FC7_REG_7 */ + /* PREFIX_0FC7_REG_7_MOD_3 */ { { "rdseed", { Ev }, 0 }, { "rdpid", { Em }, 0 }, @@ -10231,13 +10243,13 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0F01_REG_5 */ - { PREFIX_TABLE (PREFIX_MOD_0_0F01_REG_5) }, - { RM_TABLE (RM_0F01_REG_5) }, + { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_0) }, + { RM_TABLE (RM_0F01_REG_5_MOD_3) }, }, { /* MOD_0F01_REG_7 */ { "invlpg", { Mb }, 0 }, - { RM_TABLE (RM_0F01_REG_7) }, + { RM_TABLE (RM_0F01_REG_7_MOD_3) }, }, { /* MOD_0F12_PREFIX_0 */ @@ -10306,13 +10318,13 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0F1C_PREFIX_0 */ - { REG_TABLE (REG_0F1C_MOD_0) }, + { REG_TABLE (REG_0F1C_P_0_MOD_0) }, { "nopQ", { Ev }, 0 }, }, { /* MOD_0F1E_PREFIX_1 */ { "nopQ", { Ev }, 0 }, - { REG_TABLE (REG_0F1E_MOD_3) }, + { REG_TABLE (REG_0F1E_P_1_MOD_3) }, }, { /* MOD_0F24 */ @@ -10398,42 +10410,42 @@ static const struct dis386 mod_table[][2] = { { /* MOD_0FAE_REG_0 */ { "fxsave", { FXSAVE }, 0 }, - { PREFIX_TABLE (PREFIX_0FAE_REG_0) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_0_MOD_3) }, }, { /* MOD_0FAE_REG_1 */ { "fxrstor", { FXSAVE }, 0 }, - { PREFIX_TABLE (PREFIX_0FAE_REG_1) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_1_MOD_3) }, }, { /* MOD_0FAE_REG_2 */ { "ldmxcsr", { Md }, 0 }, - { PREFIX_TABLE (PREFIX_0FAE_REG_2) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_2_MOD_3) }, }, { /* MOD_0FAE_REG_3 */ { "stmxcsr", { Md }, 0 }, - { PREFIX_TABLE (PREFIX_0FAE_REG_3) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_3_MOD_3) }, }, { /* MOD_0FAE_REG_4 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FAE_REG_4) }, - { PREFIX_TABLE (PREFIX_MOD_3_0FAE_REG_4) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_4_MOD_0) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_4_MOD_3) }, }, { /* MOD_0FAE_REG_5 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FAE_REG_5) }, - { PREFIX_TABLE (PREFIX_MOD_3_0FAE_REG_5) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_0) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_5_MOD_3) }, }, { /* MOD_0FAE_REG_6 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FAE_REG_6) }, - { PREFIX_TABLE (PREFIX_MOD_1_0FAE_REG_6) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_6_MOD_0) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_6_MOD_3) }, }, { /* MOD_0FAE_REG_7 */ - { PREFIX_TABLE (PREFIX_0FAE_REG_7) }, - { RM_TABLE (RM_0FAE_REG_7) }, + { PREFIX_TABLE (PREFIX_0FAE_REG_7_MOD_0) }, + { RM_TABLE (RM_0FAE_REG_7_MOD_3) }, }, { /* MOD_0FB2 */ @@ -10449,7 +10461,7 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0FC3 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FC3) }, + { PREFIX_TABLE (PREFIX_0FC3_MOD_0) }, }, { /* MOD_0FC7_REG_3 */ @@ -10465,13 +10477,13 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0FC7_REG_6 */ - { PREFIX_TABLE (PREFIX_MOD_0_0FC7_REG_6) }, - { PREFIX_TABLE (PREFIX_MOD_3_0FC7_REG_6) } + { PREFIX_TABLE (PREFIX_0FC7_REG_6_MOD_0) }, + { PREFIX_TABLE (PREFIX_0FC7_REG_6_MOD_3) } }, { /* MOD_0FC7_REG_7 */ { "vmptrst", { Mq }, 0 }, - { PREFIX_TABLE (PREFIX_MOD_3_0FC7_REG_7) } + { PREFIX_TABLE (PREFIX_0FC7_REG_7_MOD_3) } }, { /* MOD_0FD7 */ @@ -10512,7 +10524,7 @@ static const struct dis386 mod_table[][2] = { }, { /* MOD_0F38F9_PREFIX_0 */ - { "movdiri", { Em, Gv }, PREFIX_OPCODE }, + { "movdiri", { Ev, Gv }, PREFIX_OPCODE }, }, { /* MOD_62_32BIT */ @@ -10959,7 +10971,7 @@ static const struct dis386 rm_table[][8] = { }, { /* RM_C7_REG_7 */ - { "xbeginT", { Skip_MODRM, Jv }, 0 }, + { "xbeginT", { Skip_MODRM, Jdqw }, 0 }, }, { /* RM_0F01_REG_0 */ @@ -11004,10 +11016,10 @@ static const struct dis386 rm_table[][8] = { { "invlpga", { Skip_MODRM }, 0 }, }, { - /* RM_0F01_REG_5 */ - { PREFIX_TABLE (PREFIX_MOD_3_0F01_REG_5_RM_0) }, + /* RM_0F01_REG_5_MOD_3 */ + { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_0) }, { Bad_Opcode }, - { PREFIX_TABLE (PREFIX_MOD_3_0F01_REG_5_RM_2) }, + { PREFIX_TABLE (PREFIX_0F01_REG_5_MOD_3_RM_2) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -11015,15 +11027,16 @@ static const struct dis386 rm_table[][8] = { { "wrpkru", { Skip_MODRM }, 0 }, }, { - /* RM_0F01_REG_7 */ + /* RM_0F01_REG_7_MOD_3 */ { "swapgs", { Skip_MODRM }, 0 }, { "rdtscp", { Skip_MODRM }, 0 }, - { "monitorx", { { OP_Monitor, 0 } }, 0 }, - { "mwaitx", { { OP_Mwaitx, 0 } }, 0 }, + { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_2) }, + { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_3) }, { "clzero", { Skip_MODRM }, 0 }, + { "rdpru", { Skip_MODRM }, 0 }, }, { - /* RM_0F1E_MOD_3_REG_7 */ + /* RM_0F1E_P_1_MOD_3_REG_7 */ { "nopQ", { Ev }, 0 }, { "nopQ", { Ev }, 0 }, { "endbr64", { Skip_MODRM }, PREFIX_OPCODE }, @@ -11034,11 +11047,11 @@ static const struct dis386 rm_table[][8] = { { "nopQ", { Ev }, 0 }, }, { - /* RM_0FAE_REG_6 */ + /* RM_0FAE_REG_6_MOD_3 */ { "mfence", { Skip_MODRM }, 0 }, }, { - /* RM_0FAE_REG_7 */ + /* RM_0FAE_REG_7_MOD_3 */ { "sfence", { Skip_MODRM }, 0 }, }, @@ -14817,10 +14830,12 @@ OP_J (int bytemode, int sizeflag) break; case v_mode: if (isa64 == amd64) + case dqw_mode: USED_REX (REX_W); if ((sizeflag & DFLAG) || (address_mode == mode_64bit - && (isa64 != amd64 || (rex & REX_W)))) + && ((isa64 != amd64 && bytemode != dqw_mode) + || (rex & REX_W)))) disp = get32s (); else { @@ -15506,35 +15521,15 @@ CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) } static void -OP_Mwaitx (int bytemode ATTRIBUTE_UNUSED, - int sizeflag ATTRIBUTE_UNUSED) -{ - /* mwaitx %eax,%ecx,%ebx */ - if (!intel_syntax) - { - const char **names = (address_mode == mode_64bit - ? names64 : names32); - strcpy (op_out[0], names[0]); - strcpy (op_out[1], names[1]); - strcpy (op_out[2], names[3]); - two_source_ops = 1; - } - /* Skip mod/rm byte. */ - MODRM_CHECK; - codep++; -} - -static void -OP_Mwait (int bytemode ATTRIBUTE_UNUSED, - int sizeflag ATTRIBUTE_UNUSED) +OP_Mwait (int bytemode, int sizeflag ATTRIBUTE_UNUSED) { - /* mwait %eax,%ecx */ + /* mwait %eax,%ecx / mwaitx %eax,%ecx,%ebx */ if (!intel_syntax) { - const char **names = (address_mode == mode_64bit - ? names64 : names32); - strcpy (op_out[0], names[0]); - strcpy (op_out[1], names[1]); + strcpy (op_out[0], names32[0]); + strcpy (op_out[1], names32[1]); + if (bytemode == eBX_reg) + strcpy (op_out[2], names32[3]); two_source_ops = 1; } /* Skip mod/rm byte. */ @@ -15546,27 +15541,25 @@ static void OP_Monitor (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { - /* monitor %eax,%ecx,%edx" */ + /* monitor %{e,r,}ax,%ecx,%edx" */ if (!intel_syntax) { - const char **op1_names; const char **names = (address_mode == mode_64bit ? names64 : names32); - if (!(prefixes & PREFIX_ADDR)) - op1_names = (address_mode == mode_16bit - ? names16 : names); - else + if (prefixes & PREFIX_ADDR) { /* Remove "addr16/addr32". */ all_prefixes[last_addr_prefix] = 0; - op1_names = (address_mode != mode_32bit - ? names32 : names16); + names = (address_mode != mode_32bit + ? names32 : names16); used_prefixes |= PREFIX_ADDR; } - strcpy (op_out[0], op1_names[0]); - strcpy (op_out[1], names[1]); - strcpy (op_out[2], names[2]); + else if (address_mode == mode_16bit) + names = names16; + strcpy (op_out[0], names[0]); + strcpy (op_out[1], names32[1]); + strcpy (op_out[2], names32[2]); two_source_ops = 1; } /* Skip mod/rm byte. */