X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fi386-gen.c;h=09fc5f8b827a0ed041e15c37e945453bc64f62f1;hb=48bcea9f48cce70005307befbc604de3618bbaf7;hp=d6a62bd56925e4e5f427b034c6247604b103a928;hpb=b28d1bda54728d10ae189a323c343b6d76f94b8e;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index d6a62bd569..09fc5f8b82 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -1,4 +1,4 @@ -/* Copyright (C) 2007-2014 Free Software Foundation, Inc. +/* Copyright (C) 2007-2019 Free Software Foundation, Inc. This file is part of the GNU opcodes library. @@ -30,6 +30,10 @@ #include #define _(String) gettext (String) +/* Build-time checks are preferrable over runtime ones. Use this construct + in preference where possible. */ +#define static_assert(e) ((void)sizeof (struct { int _:1 - 2 * !(e); })) + static const char *program_name = NULL; static int debug = 0; @@ -46,67 +50,75 @@ static initializer cpu_flag_init[] = { "CPU_GENERIC32_FLAGS", "Cpu186|Cpu286|Cpu386" }, { "CPU_GENERIC64_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuLM" }, + "CPU_PENTIUMPRO_FLAGS|CpuClflush|CpuSYSCALL|CPU_MMX_FLAGS|CPU_SSE2_FLAGS|CpuLM" }, { "CPU_NONE_FLAGS", "0" }, { "CPU_I186_FLAGS", "Cpu186" }, { "CPU_I286_FLAGS", - "Cpu186|Cpu286" }, + "CPU_I186_FLAGS|Cpu286" }, { "CPU_I386_FLAGS", - "Cpu186|Cpu286|Cpu386" }, + "CPU_I286_FLAGS|Cpu386" }, { "CPU_I486_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486" }, + "CPU_I386_FLAGS|Cpu486" }, { "CPU_I586_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu387" }, + "CPU_I486_FLAGS|Cpu387|Cpu586" }, { "CPU_I686_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687" }, + "CPU_I586_FLAGS|Cpu686|Cpu687|CpuCMOV|CpuFXSR" }, { "CPU_PENTIUMPRO_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop" }, + "CPU_I686_FLAGS|CpuNop" }, { "CPU_P2_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop|CpuMMX" }, + "CPU_PENTIUMPRO_FLAGS|CPU_MMX_FLAGS" }, { "CPU_P3_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE" }, + "CPU_P2_FLAGS|CPU_SSE_FLAGS" }, { "CPU_P4_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2" }, + "CPU_P3_FLAGS|CpuClflush|CPU_SSE2_FLAGS" }, { "CPU_NOCONA_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM|CpuCX16" }, + "CPU_GENERIC64_FLAGS|CpuFISTTP|CPU_SSE3_FLAGS|CpuCX16" }, { "CPU_CORE_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuCX16" }, + "CPU_P4_FLAGS|CpuFISTTP|CPU_SSE3_FLAGS|CpuCX16" }, { "CPU_CORE2_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM|CpuCX16" }, + "CPU_NOCONA_FLAGS|CPU_SSSE3_FLAGS" }, { "CPU_COREI7_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuRdtscp|CpuLM|CpuCX16" }, + "CPU_CORE2_FLAGS|CPU_SSE4_2_FLAGS|CpuRdtscp" }, { "CPU_K6_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CPU_MMX_FLAGS" }, { "CPU_K6_2_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX|Cpu3dnow" }, + "CPU_K6_FLAGS|Cpu3dnow" }, { "CPU_ATHLON_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA" }, + "CPU_K6_2_FLAGS|Cpu686|Cpu687|CpuNop|Cpu3dnowA" }, { "CPU_K8_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" }, + "CPU_ATHLON_FLAGS|CpuRdtscp|CPU_SSE2_FLAGS|CpuLM" }, { "CPU_AMDFAM10_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" }, + "CPU_K8_FLAGS|CpuFISTTP|CPU_SSE4A_FLAGS|CpuABM" }, { "CPU_BDVER1_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" }, + "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_XOP_FLAGS|CpuABM|CpuLWP|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" }, { "CPU_BDVER2_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" }, + "CPU_BDVER1_FLAGS|CpuFMA|CpuBMI|CpuTBM|CpuF16C" }, { "CPU_BDVER3_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" }, + "CPU_BDVER2_FLAGS|CpuXsaveopt|CpuFSGSBase" }, { "CPU_BDVER4_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd" }, + "CPU_BDVER3_FLAGS|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" }, + { "CPU_ZNVER1_FLAGS", + "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_AVX2_FLAGS|CpuSSE4A|CpuABM|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" }, + { "CPU_ZNVER2_FLAGS", + "CPU_ZNVER1_FLAGS|CpuCLWB|CpuRDPID|CpuRDPRU|CpuMCOMMIT|CpuWBNOINVD" }, { "CPU_BTVER1_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, + "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuABM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuSSE4_1|CpuSSE4_2|CpuABM|CpuLM|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, + "CPU_BTVER1_FLAGS|CPU_AVX_FLAGS|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuMovbe|CpuXsaveopt|CpuPRFCHW" }, { "CPU_8087_FLAGS", "Cpu8087" }, { "CPU_287_FLAGS", "Cpu287" }, { "CPU_387_FLAGS", "Cpu387" }, - { "CPU_ANY87_FLAGS", - "Cpu8087|Cpu287|Cpu387|Cpu687|CpuFISTTP" }, + { "CPU_687_FLAGS", + "CPU_387_FLAGS|Cpu687" }, + { "CPU_CMOV_FLAGS", + "CpuCMOV" }, + { "CPU_FXSR_FLAGS", + "CpuFXSR" }, { "CPU_CLFLUSH_FLAGS", "CpuClflush" }, { "CPU_NOP_FLAGS", @@ -116,19 +128,17 @@ static initializer cpu_flag_init[] = { "CPU_MMX_FLAGS", "CpuMMX" }, { "CPU_SSE_FLAGS", - "CpuMMX|CpuSSE" }, + "CpuSSE" }, { "CPU_SSE2_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2" }, + "CPU_SSE_FLAGS|CpuSSE2" }, { "CPU_SSE3_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" }, + "CPU_SSE2_FLAGS|CpuSSE3" }, { "CPU_SSSE3_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3" }, + "CPU_SSE3_FLAGS|CpuSSSE3" }, { "CPU_SSE4_1_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1" }, + "CPU_SSSE3_FLAGS|CpuSSE4_1" }, { "CPU_SSE4_2_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2" }, - { "CPU_ANY_SSE_FLAGS", - "CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF" }, + "CPU_SSE4_1_FLAGS|CpuSSE4_2" }, { "CPU_VMX_FLAGS", "CpuVMX" }, { "CPU_SMX_FLAGS", @@ -136,19 +146,19 @@ static initializer cpu_flag_init[] = { "CPU_XSAVE_FLAGS", "CpuXsave" }, { "CPU_XSAVEOPT_FLAGS", - "CpuXsaveopt" }, + "CPU_XSAVE_FLAGS|CpuXsaveopt" }, { "CPU_AES_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAES" }, + "CPU_SSE2_FLAGS|CpuAES" }, { "CPU_PCLMUL_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuPCLMUL" }, + "CPU_SSE2_FLAGS|CpuPCLMUL" }, { "CPU_FMA_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA" }, + "CPU_AVX_FLAGS|CpuFMA" }, { "CPU_FMA4_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA4" }, + "CPU_AVX_FLAGS|CpuFMA4" }, { "CPU_XOP_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuABM|CpuAVX|CpuFMA4|CpuXOP" }, + "CPU_SSE4A_FLAGS|CPU_FMA4_FLAGS|CpuXOP" }, { "CPU_LWP_FLAGS", - "CpuLWP" }, + "CPU_XSAVE_FLAGS|CpuLWP" }, { "CPU_BMI_FLAGS", "CpuBMI" }, { "CPU_TBM_FLAGS", @@ -166,7 +176,7 @@ static initializer cpu_flag_init[] = { "CPU_RDRND_FLAGS", "CpuRdRnd" }, { "CPU_F16C_FLAGS", - "CpuF16C" }, + "CPU_AVX_FLAGS|CpuF16C" }, { "CPU_BMI2_FLAGS", "CpuBMI2" }, { "CPU_LZCNT_FLAGS", @@ -180,35 +190,59 @@ static initializer cpu_flag_init[] = { "CPU_VMFUNC_FLAGS", "CpuVMFUNC" }, { "CPU_3DNOW_FLAGS", - "CpuMMX|Cpu3dnow" }, + "CPU_MMX_FLAGS|Cpu3dnow" }, { "CPU_3DNOWA_FLAGS", - "CpuMMX|Cpu3dnow|Cpu3dnowA" }, + "CPU_3DNOW_FLAGS|Cpu3dnowA" }, { "CPU_PADLOCK_FLAGS", "CpuPadLock" }, { "CPU_SVME_FLAGS", "CpuSVME" }, { "CPU_SSE4A_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a" }, + "CPU_SSE3_FLAGS|CpuSSE4a" }, { "CPU_ABM_FLAGS", "CpuABM" }, { "CPU_AVX_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX" }, + "CPU_SSE4_2_FLAGS|CPU_XSAVE_FLAGS|CpuAVX" }, { "CPU_AVX2_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2" }, + "CPU_AVX_FLAGS|CpuAVX2" }, { "CPU_AVX512F_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F" }, + "CPU_AVX2_FLAGS|CpuAVX512F" }, { "CPU_AVX512CD_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD" }, + "CPU_AVX512F_FLAGS|CpuAVX512CD" }, { "CPU_AVX512ER_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512ER" }, + "CPU_AVX512F_FLAGS|CpuAVX512ER" }, { "CPU_AVX512PF_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512PF" }, - { "CPU_ANY_AVX_FLAGS", - "CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF" }, + "CPU_AVX512F_FLAGS|CpuAVX512PF" }, + { "CPU_AVX512DQ_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512DQ" }, + { "CPU_AVX512BW_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512BW" }, + { "CPU_AVX512VL_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512VL" }, + { "CPU_AVX512IFMA_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512IFMA" }, + { "CPU_AVX512VBMI_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512VBMI" }, + { "CPU_AVX512_4FMAPS_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512_4FMAPS" }, + { "CPU_AVX512_4VNNIW_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512_4VNNIW" }, + { "CPU_AVX512_VPOPCNTDQ_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512_VPOPCNTDQ" }, + { "CPU_AVX512_VBMI2_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512_VBMI2" }, + { "CPU_AVX512_VNNI_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512_VNNI" }, + { "CPU_AVX512_BITALG_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512_BITALG" }, + { "CPU_AVX512_BF16_FLAGS", + "CPU_AVX512F_FLAGS|CpuAVX512_BF16" }, { "CPU_L1OM_FLAGS", "unknown" }, { "CPU_K1OM_FLAGS", "unknown" }, + { "CPU_IAMCU_FLAGS", + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586" }, { "CPU_ADX_FLAGS", "CpuADX" }, { "CPU_RDSEED_FLAGS", @@ -218,21 +252,135 @@ static initializer cpu_flag_init[] = { "CPU_SMAP_FLAGS", "CpuSMAP" }, { "CPU_MPX_FLAGS", - "CpuMPX" }, + "CPU_XSAVE_FLAGS|CpuMPX" }, { "CPU_SHA_FLAGS", - "CpuSHA" }, + "CPU_SSE2_FLAGS|CpuSHA" }, { "CPU_CLFLUSHOPT_FLAGS", "CpuClflushOpt" }, { "CPU_XSAVES_FLAGS", - "CpuXSAVES" }, + "CPU_XSAVE_FLAGS|CpuXSAVES" }, { "CPU_XSAVEC_FLAGS", - "CpuXSAVEC" }, + "CPU_XSAVE_FLAGS|CpuXSAVEC" }, { "CPU_PREFETCHWT1_FLAGS", "CpuPREFETCHWT1" }, { "CPU_SE1_FLAGS", "CpuSE1" }, - { "CPU_AVX512VL_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VL" }, + { "CPU_CLWB_FLAGS", + "CpuCLWB" }, + { "CPU_CLZERO_FLAGS", + "CpuCLZERO" }, + { "CPU_MWAITX_FLAGS", + "CpuMWAITX" }, + { "CPU_OSPKE_FLAGS", + "CPU_XSAVE_FLAGS|CpuOSPKE" }, + { "CPU_RDPID_FLAGS", + "CpuRDPID" }, + { "CPU_PTWRITE_FLAGS", + "CpuPTWRITE" }, + { "CPU_IBT_FLAGS", + "CpuIBT" }, + { "CPU_SHSTK_FLAGS", + "CpuSHSTK" }, + { "CPU_GFNI_FLAGS", + "CpuGFNI" }, + { "CPU_VAES_FLAGS", + "CpuVAES" }, + { "CPU_VPCLMULQDQ_FLAGS", + "CpuVPCLMULQDQ" }, + { "CPU_WBNOINVD_FLAGS", + "CpuWBNOINVD" }, + { "CPU_PCONFIG_FLAGS", + "CpuPCONFIG" }, + { "CPU_WAITPKG_FLAGS", + "CpuWAITPKG" }, + { "CPU_CLDEMOTE_FLAGS", + "CpuCLDEMOTE" }, + { "CPU_MOVDIRI_FLAGS", + "CpuMOVDIRI" }, + { "CPU_MOVDIR64B_FLAGS", + "CpuMOVDIR64B" }, + { "CPU_ENQCMD_FLAGS", + "CpuENQCMD" }, + { "CPU_AVX512_VP2INTERSECT_FLAGS", + "CpuAVX512_VP2INTERSECT" }, + { "CPU_RDPRU_FLAGS", + "CpuRDPRU" }, + { "CPU_MCOMMIT_FLAGS", + "CpuMCOMMIT" }, + { "CPU_ANY_X87_FLAGS", + "CPU_ANY_287_FLAGS|Cpu8087" }, + { "CPU_ANY_287_FLAGS", + "CPU_ANY_387_FLAGS|Cpu287" }, + { "CPU_ANY_387_FLAGS", + "CPU_ANY_687_FLAGS|Cpu387" }, + { "CPU_ANY_687_FLAGS", + "Cpu687|CpuFISTTP" }, + { "CPU_ANY_CMOV_FLAGS", + "CpuCMOV" }, + { "CPU_ANY_FXSR_FLAGS", + "CpuFXSR" }, + { "CPU_ANY_MMX_FLAGS", + "CPU_3DNOWA_FLAGS" }, + { "CPU_ANY_SSE_FLAGS", + "CPU_ANY_SSE2_FLAGS|CpuSSE|CpuSSE4a" }, + { "CPU_ANY_SSE2_FLAGS", + "CPU_ANY_SSE3_FLAGS|CpuSSE2" }, + { "CPU_ANY_SSE3_FLAGS", + "CPU_ANY_SSSE3_FLAGS|CpuSSE3" }, + { "CPU_ANY_SSSE3_FLAGS", + "CPU_ANY_SSE4_1_FLAGS|CpuSSSE3" }, + { "CPU_ANY_SSE4_1_FLAGS", + "CPU_ANY_SSE4_2_FLAGS|CpuSSE4_1" }, + { "CPU_ANY_SSE4_2_FLAGS", + "CpuSSE4_2" }, + { "CPU_ANY_AVX_FLAGS", + "CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" }, + { "CPU_ANY_AVX2_FLAGS", + "CPU_ANY_AVX512F_FLAGS|CpuAVX2" }, + { "CPU_ANY_AVX512F_FLAGS", + "CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF|CpuAVX512DQ|CpuAVX512BW|CpuAVX512VL|CpuAVX512IFMA|CpuAVX512VBMI|CpuAVX512_4FMAPS|CpuAVX512_4VNNIW|CpuAVX512_VPOPCNTDQ|CpuAVX512_VBMI2|CpuAVX512_VNNI|CpuAVX512_BITALG|CpuAVX512_BF16|CpuAVX512_VP2INTERSECT" }, + { "CPU_ANY_AVX512CD_FLAGS", + "CpuAVX512CD" }, + { "CPU_ANY_AVX512ER_FLAGS", + "CpuAVX512ER" }, + { "CPU_ANY_AVX512PF_FLAGS", + "CpuAVX512PF" }, + { "CPU_ANY_AVX512DQ_FLAGS", + "CpuAVX512DQ" }, + { "CPU_ANY_AVX512BW_FLAGS", + "CpuAVX512BW" }, + { "CPU_ANY_AVX512VL_FLAGS", + "CpuAVX512VL" }, + { "CPU_ANY_AVX512IFMA_FLAGS", + "CpuAVX512IFMA" }, + { "CPU_ANY_AVX512VBMI_FLAGS", + "CpuAVX512VBMI" }, + { "CPU_ANY_AVX512_4FMAPS_FLAGS", + "CpuAVX512_4FMAPS" }, + { "CPU_ANY_AVX512_4VNNIW_FLAGS", + "CpuAVX512_4VNNIW" }, + { "CPU_ANY_AVX512_VPOPCNTDQ_FLAGS", + "CpuAVX512_VPOPCNTDQ" }, + { "CPU_ANY_IBT_FLAGS", + "CpuIBT" }, + { "CPU_ANY_SHSTK_FLAGS", + "CpuSHSTK" }, + { "CPU_ANY_AVX512_VBMI2_FLAGS", + "CpuAVX512_VBMI2" }, + { "CPU_ANY_AVX512_VNNI_FLAGS", + "CpuAVX512_VNNI" }, + { "CPU_ANY_AVX512_BITALG_FLAGS", + "CpuAVX512_BITALG" }, + { "CPU_ANY_AVX512_BF16_FLAGS", + "CpuAVX512_BF16" }, + { "CPU_ANY_MOVDIRI_FLAGS", + "CpuMOVDIRI" }, + { "CPU_ANY_MOVDIR64B_FLAGS", + "CpuMOVDIR64B" }, + { "CPU_ANY_ENQCMD_FLAGS", + "CpuENQCMD" }, + { "CPU_ANY_AVX512_VP2INTERSECT_FLAGS", + "CpuAVX512_VP2INTERSECT" }, }; static initializer operand_type_init[] = @@ -240,13 +388,13 @@ static initializer operand_type_init[] = { "OPERAND_TYPE_NONE", "0" }, { "OPERAND_TYPE_REG8", - "Reg8" }, + "Class=Reg|Byte" }, { "OPERAND_TYPE_REG16", - "Reg16" }, + "Class=Reg|Word" }, { "OPERAND_TYPE_REG32", - "Reg32" }, + "Class=Reg|Dword" }, { "OPERAND_TYPE_REG64", - "Reg64" }, + "Class=Reg|Qword" }, { "OPERAND_TYPE_IMM1", "Imm1" }, { "OPERAND_TYPE_IMM8", @@ -274,47 +422,41 @@ static initializer operand_type_init[] = { "OPERAND_TYPE_DISP64", "Disp64" }, { "OPERAND_TYPE_INOUTPORTREG", - "InOutPortReg" }, + "Instance=RegD|Word" }, { "OPERAND_TYPE_SHIFTCOUNT", - "ShiftCount" }, + "Instance=RegC|Byte" }, { "OPERAND_TYPE_CONTROL", - "Control" }, + "Class=RegCR" }, { "OPERAND_TYPE_TEST", - "Test" }, + "Class=RegTR" }, { "OPERAND_TYPE_DEBUG", - "FloatReg" }, + "Class=RegDR" }, { "OPERAND_TYPE_FLOATREG", - "FloatReg" }, + "Class=Reg|Tbyte" }, { "OPERAND_TYPE_FLOATACC", - "FloatAcc" }, - { "OPERAND_TYPE_SREG2", - "SReg2" }, - { "OPERAND_TYPE_SREG3", - "SReg3" }, - { "OPERAND_TYPE_ACC", - "Acc" }, - { "OPERAND_TYPE_JUMPABSOLUTE", - "JumpAbsolute" }, + "Instance=Accum|Tbyte" }, + { "OPERAND_TYPE_SREG", + "Class=SReg" }, { "OPERAND_TYPE_REGMMX", - "RegMMX" }, + "Class=RegMMX" }, { "OPERAND_TYPE_REGXMM", - "RegXMM" }, + "Class=RegSIMD|Xmmword" }, { "OPERAND_TYPE_REGYMM", - "RegYMM" }, + "Class=RegSIMD|Ymmword" }, { "OPERAND_TYPE_REGZMM", - "RegZMM" }, + "Class=RegSIMD|Zmmword" }, { "OPERAND_TYPE_REGMASK", - "RegMask" }, - { "OPERAND_TYPE_ESSEG", - "EsSeg" }, + "Class=RegMask" }, + { "OPERAND_TYPE_REGBND", + "Class=RegBND" }, + { "OPERAND_TYPE_ACC8", + "Instance=Accum|Byte" }, + { "OPERAND_TYPE_ACC16", + "Instance=Accum|Word" }, { "OPERAND_TYPE_ACC32", - "Reg32|Acc|Dword" }, + "Instance=Accum|Dword" }, { "OPERAND_TYPE_ACC64", - "Reg64|Acc|Qword" }, - { "OPERAND_TYPE_INOUTPORTREG", - "InOutPortReg" }, - { "OPERAND_TYPE_REG16_INOUTPORTREG", - "Reg16|InOutPortReg" }, + "Instance=Accum|Qword" }, { "OPERAND_TYPE_DISP16_32", "Disp16|Disp32" }, { "OPERAND_TYPE_ANYDISP", @@ -335,12 +477,8 @@ static initializer operand_type_init[] = "Imm32|Imm32S|Imm64|Disp32" }, { "OPERAND_TYPE_IMM32_32S_64_DISP32_64", "Imm32|Imm32S|Imm64|Disp32|Disp64" }, - { "OPERAND_TYPE_VEC_IMM4", - "Vec_Imm4" }, - { "OPERAND_TYPE_REGBND", - "RegBND" }, - { "OPERAND_TYPE_VEC_DISP8", - "Vec_Disp8" }, + { "OPERAND_TYPE_ANYIMM", + "Imm1|Imm8|Imm8S|Imm16|Imm32|Imm32S|Imm64" }, }; typedef struct bitfield @@ -360,6 +498,8 @@ static bitfield cpu_flags[] = BITFIELD (Cpu486), BITFIELD (Cpu586), BITFIELD (Cpu686), + BITFIELD (CpuCMOV), + BITFIELD (CpuFXSR), BITFIELD (CpuClflush), BITFIELD (CpuNop), BITFIELD (CpuSYSCALL), @@ -382,8 +522,11 @@ static bitfield cpu_flags[] = BITFIELD (CpuAVX512ER), BITFIELD (CpuAVX512PF), BITFIELD (CpuAVX512VL), + BITFIELD (CpuAVX512DQ), + BITFIELD (CpuAVX512BW), BITFIELD (CpuL1OM), BITFIELD (CpuK1OM), + BITFIELD (CpuIAMCU), BITFIELD (CpuSSE4a), BITFIELD (Cpu3dnow), BITFIELD (Cpu3dnowA), @@ -421,15 +564,44 @@ static bitfield cpu_flags[] = BITFIELD (CpuPRFCHW), BITFIELD (CpuSMAP), BITFIELD (CpuSHA), - BITFIELD (CpuVREX), BITFIELD (CpuClflushOpt), BITFIELD (CpuXSAVES), BITFIELD (CpuXSAVEC), BITFIELD (CpuPREFETCHWT1), BITFIELD (CpuSE1), + BITFIELD (CpuCLWB), BITFIELD (Cpu64), BITFIELD (CpuNo64), BITFIELD (CpuMPX), + BITFIELD (CpuAVX512IFMA), + BITFIELD (CpuAVX512VBMI), + BITFIELD (CpuAVX512_4FMAPS), + BITFIELD (CpuAVX512_4VNNIW), + BITFIELD (CpuAVX512_VPOPCNTDQ), + BITFIELD (CpuAVX512_VBMI2), + BITFIELD (CpuAVX512_VNNI), + BITFIELD (CpuAVX512_BITALG), + BITFIELD (CpuAVX512_BF16), + BITFIELD (CpuAVX512_VP2INTERSECT), + BITFIELD (CpuMWAITX), + BITFIELD (CpuCLZERO), + BITFIELD (CpuOSPKE), + BITFIELD (CpuRDPID), + BITFIELD (CpuPTWRITE), + BITFIELD (CpuIBT), + BITFIELD (CpuSHSTK), + BITFIELD (CpuGFNI), + BITFIELD (CpuVAES), + BITFIELD (CpuVPCLMULQDQ), + BITFIELD (CpuWBNOINVD), + BITFIELD (CpuPCONFIG), + BITFIELD (CpuWAITPKG), + BITFIELD (CpuCLDEMOTE), + BITFIELD (CpuMOVDIRI), + BITFIELD (CpuMOVDIR64B), + BITFIELD (CpuENQCMD), + BITFIELD (CpuRDPRU), + BITFIELD (CpuMCOMMIT), #ifdef CpuUnused BITFIELD (CpuUnused), #endif @@ -439,22 +611,17 @@ static bitfield opcode_modifiers[] = { BITFIELD (D), BITFIELD (W), - BITFIELD (S), + BITFIELD (Load), BITFIELD (Modrm), BITFIELD (ShortForm), BITFIELD (Jump), - BITFIELD (JumpDword), - BITFIELD (JumpByte), - BITFIELD (JumpInterSegment), BITFIELD (FloatMF), BITFIELD (FloatR), - BITFIELD (FloatD), - BITFIELD (Size16), - BITFIELD (Size32), - BITFIELD (Size64), + BITFIELD (Size), BITFIELD (CheckRegSize), BITFIELD (IgnoreSize), BITFIELD (DefaultSize), + BITFIELD (Anysize), BITFIELD (No_bSuf), BITFIELD (No_wSuf), BITFIELD (No_lSuf), @@ -463,16 +630,17 @@ static bitfield opcode_modifiers[] = BITFIELD (No_ldSuf), BITFIELD (FWait), BITFIELD (IsString), + BITFIELD (RegMem), BITFIELD (BNDPrefixOk), + BITFIELD (NoTrackPrefixOk), BITFIELD (IsLockable), BITFIELD (RegKludge), - BITFIELD (FirstXmm0), BITFIELD (Implicit1stXmm0), BITFIELD (RepPrefixOk), BITFIELD (HLEPrefixOk), BITFIELD (ToDword), BITFIELD (ToQword), - BITFIELD (AddrPrefixOp0), + BITFIELD (AddrPrefixOpReg), BITFIELD (IsPrefix), BITFIELD (ImmExt), BITFIELD (NoRex64), @@ -483,36 +651,60 @@ static bitfield opcode_modifiers[] = BITFIELD (VexW), BITFIELD (VexOpcode), BITFIELD (VexSources), - BITFIELD (VexImmExt), BITFIELD (VecSIB), BITFIELD (SSE2AVX), BITFIELD (NoAVX), BITFIELD (EVex), BITFIELD (Masking), - BITFIELD (VecESize), BITFIELD (Broadcast), BITFIELD (StaticRounding), BITFIELD (SAE), BITFIELD (Disp8MemShift), BITFIELD (NoDefMask), - BITFIELD (OldGcc), + BITFIELD (ImplicitQuadGroup), + BITFIELD (Optimize), BITFIELD (ATTMnemonic), BITFIELD (ATTSyntax), BITFIELD (IntelSyntax), + BITFIELD (AMD64), + BITFIELD (Intel64), +}; + +#define CLASS(n) #n, n + +static const struct { + const char *name; + enum operand_class value; +} operand_classes[] = { + CLASS (Reg), + CLASS (SReg), + CLASS (RegCR), + CLASS (RegDR), + CLASS (RegTR), + CLASS (RegMMX), + CLASS (RegSIMD), + CLASS (RegMask), + CLASS (RegBND), +}; + +#undef CLASS + +#define INSTANCE(n) #n, n + +static const struct { + const char *name; + enum operand_instance value; +} operand_instances[] = { + INSTANCE (Accum), + INSTANCE (RegC), + INSTANCE (RegD), + INSTANCE (RegB), }; +#undef INSTANCE + static bitfield operand_types[] = { - BITFIELD (Reg8), - BITFIELD (Reg16), - BITFIELD (Reg32), - BITFIELD (Reg64), - BITFIELD (FloatReg), - BITFIELD (RegMMX), - BITFIELD (RegXMM), - BITFIELD (RegYMM), - BITFIELD (RegZMM), - BITFIELD (RegMask), BITFIELD (Imm1), BITFIELD (Imm8), BITFIELD (Imm8S), @@ -526,19 +718,6 @@ static bitfield operand_types[] = BITFIELD (Disp32), BITFIELD (Disp32S), BITFIELD (Disp64), - BITFIELD (InOutPortReg), - BITFIELD (ShiftCount), - BITFIELD (Control), - BITFIELD (Debug), - BITFIELD (Test), - BITFIELD (SReg2), - BITFIELD (SReg3), - BITFIELD (Acc), - BITFIELD (FloatAcc), - BITFIELD (JumpAbsolute), - BITFIELD (EsSeg), - BITFIELD (RegMem), - BITFIELD (Mem), BITFIELD (Byte), BITFIELD (Word), BITFIELD (Dword), @@ -549,16 +728,14 @@ static bitfield operand_types[] = BITFIELD (Ymmword), BITFIELD (Zmmword), BITFIELD (Unspecified), - BITFIELD (Anysize), - BITFIELD (Vec_Imm4), - BITFIELD (RegBND), - BITFIELD (Vec_Disp8), #ifdef OTUnused BITFIELD (OTUnused), #endif }; static const char *filename; +static i386_cpu_flags active_cpu_flags; +static int active_isstring; static int compare (const void *x, const void *y) @@ -574,7 +751,7 @@ fail (const char *message, ...) va_list args; va_start (args, message); - fprintf (stderr, _("%s: Error: "), program_name); + fprintf (stderr, _("%s: error: "), program_name); vfprintf (stderr, message, args); va_end (args); xexit (1); @@ -584,7 +761,7 @@ static void process_copyright (FILE *fp) { fprintf (fp, "/* This file is automatically generated by i386-gen. Do not edit! */\n\ -/* Copyright (C) 2007-2014 Free Software Foundation, Inc.\n\ +/* Copyright (C) 2007-2019 Free Software Foundation, Inc.\n\ \n\ This file is part of the GNU opcodes library.\n\ \n\ @@ -657,8 +834,36 @@ next_field (char *str, char sep, char **next, char *last) return p; } +static void set_bitfield (char *, bitfield *, int, unsigned int, int); + +static int +set_bitfield_from_cpu_flag_init (char *f, bitfield *array, unsigned int size, + int lineno) +{ + char *str, *next, *last; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE (cpu_flag_init); i++) + if (strcmp (cpu_flag_init[i].name, f) == 0) + { + /* Turn on selective bits. */ + char *init = xstrdup (cpu_flag_init[i].init); + last = init + strlen (init); + for (next = init; next && next < last; ) + { + str = next_field (next, '|', &next, last); + if (str) + set_bitfield (str, array, 1, size, lineno); + } + free (init); + return 0; + } + + return -1; +} + static void -set_bitfield (const char *f, bitfield *array, int value, +set_bitfield (char *f, bitfield *array, int value, unsigned int size, int lineno) { unsigned int i; @@ -704,10 +909,14 @@ set_bitfield (const char *f, bitfield *array, int value, } } + /* Handle CPU_XXX_FLAGS. */ + if (value == 1 && !set_bitfield_from_cpu_flag_init (f, array, size, lineno)) + return; + if (lineno != -1) - fail (_("%s: %d: Unknown bitfield: %s\n"), filename, lineno, f); + fail (_("%s: %d: unknown bitfield: %s\n"), filename, lineno, f); else - fail (_("Unknown bitfield: %s\n"), f); + fail (_("unknown bitfield: %s\n"), f); } static void @@ -716,6 +925,8 @@ output_cpu_flags (FILE *table, bitfield *flags, unsigned int size, { unsigned int i; + memset (&active_cpu_flags, 0, sizeof(active_cpu_flags)); + fprintf (table, "%s{ { ", indent); for (i = 0; i < size - 1; i++) @@ -732,6 +943,8 @@ output_cpu_flags (FILE *table, bitfield *flags, unsigned int size, else fprintf (table, "\n %s", indent); } + if (flags[i].value) + active_cpu_flags.array[i / 32] |= 1U << (i % 32); } fprintf (table, "%d } }%s\n", flags[i].value, comma); @@ -766,7 +979,7 @@ process_i386_cpu_flag (FILE *table, char *flag, int macro, last -= 1; next = flag + 2; if (*last != ')') - fail (_("%s: %d: Missing `)' in bitfield: %s\n"), filename, + fail (_("%s: %d: missing `)' in bitfield: %s\n"), filename, lineno, flag); *last = '\0'; } @@ -822,47 +1035,138 @@ output_opcode_modifier (FILE *table, bitfield *modifier, unsigned int size) fprintf (table, "%d },\n", modifier[i].value); } +static int +adjust_broadcast_modifier (char **opnd) +{ + char *str, *next, *last, *op; + int bcst_type = INT_MAX; + + /* Skip the immediate operand. */ + op = opnd[0]; + if (strcasecmp(op, "Imm8") == 0) + op = opnd[1]; + + op = xstrdup (op); + last = op + strlen (op); + for (next = op; next && next < last; ) + { + str = next_field (next, '|', &next, last); + if (str) + { + if (strcasecmp(str, "Byte") == 0) + { + /* The smalest broadcast type, no need to check + further. */ + bcst_type = BYTE_BROADCAST; + break; + } + else if (strcasecmp(str, "Word") == 0) + { + if (bcst_type > WORD_BROADCAST) + bcst_type = WORD_BROADCAST; + } + else if (strcasecmp(str, "Dword") == 0) + { + if (bcst_type > DWORD_BROADCAST) + bcst_type = DWORD_BROADCAST; + } + else if (strcasecmp(str, "Qword") == 0) + { + if (bcst_type > QWORD_BROADCAST) + bcst_type = QWORD_BROADCAST; + } + } + } + free (op); + + if (bcst_type == INT_MAX) + fail (_("unknown broadcast operand: %s\n"), op); + + return bcst_type; +} + static void -process_i386_opcode_modifier (FILE *table, char *mod, int lineno) +process_i386_opcode_modifier (FILE *table, char *mod, char **opnd, int lineno) { char *str, *next, *last; bitfield modifiers [ARRAY_SIZE (opcode_modifiers)]; + active_isstring = 0; + /* Copy the default opcode modifier. */ memcpy (modifiers, opcode_modifiers, sizeof (modifiers)); if (strcmp (mod, "0")) { + unsigned int have_w = 0, bwlq_suf = 0xf; + last = mod + strlen (mod); for (next = mod; next && next < last; ) { str = next_field (next, '|', &next, last); if (str) - set_bitfield (str, modifiers, 1, ARRAY_SIZE (modifiers), + { + int val = 1; + if (strcasecmp(str, "Broadcast") == 0) + val = adjust_broadcast_modifier (opnd); + set_bitfield (str, modifiers, val, ARRAY_SIZE (modifiers), lineno); + if (strcasecmp(str, "IsString") == 0) + active_isstring = 1; + + if (strcasecmp(str, "W") == 0) + have_w = 1; + + if (strcasecmp(str, "No_bSuf") == 0) + bwlq_suf &= ~1; + if (strcasecmp(str, "No_wSuf") == 0) + bwlq_suf &= ~2; + if (strcasecmp(str, "No_lSuf") == 0) + bwlq_suf &= ~4; + if (strcasecmp(str, "No_qSuf") == 0) + bwlq_suf &= ~8; + } } + + if (have_w && !bwlq_suf) + fail ("%s: %d: stray W modifier\n", filename, lineno); + if (have_w && !(bwlq_suf & 1)) + fprintf (stderr, "%s: %d: W modifier without Byte operand(s)\n", + filename, lineno); + if (have_w && !(bwlq_suf & ~1)) + fprintf (stderr, + "%s: %d: W modifier without Word/Dword/Qword operand(s)\n", + filename, lineno); } output_opcode_modifier (table, modifiers, ARRAY_SIZE (modifiers)); } +enum stage { + stage_macros, + stage_opcodes, + stage_registers, +}; + static void -output_operand_type (FILE *table, bitfield *types, unsigned int size, - int macro, const char *indent) +output_operand_type (FILE *table, enum operand_class class, + enum operand_instance instance, + const bitfield *types, unsigned int size, + enum stage stage, const char *indent) { unsigned int i; - fprintf (table, "{ { "); + fprintf (table, "{ { %d, %d, ", class, instance); for (i = 0; i < size - 1; i++) { - if (((i + 1) % 20) != 0) + if (((i + 3) % 20) != 0) fprintf (table, "%d, ", types[i].value); else fprintf (table, "%d,", types[i].value); - if (((i + 1) % 20) == 0) + if (((i + 3) % 20) == 0) { /* We need \\ for macro. */ - if (macro) + if (stage == stage_macros) fprintf (table, " \\\n%s", indent); else fprintf (table, "\n%s", indent); @@ -873,10 +1177,12 @@ output_operand_type (FILE *table, bitfield *types, unsigned int size, } static void -process_i386_operand_type (FILE *table, char *op, int macro, +process_i386_operand_type (FILE *table, char *op, enum stage stage, const char *indent, int lineno) { char *str, *next, *last; + enum operand_class class = ClassNone; + enum operand_instance instance = InstanceNone; bitfield types [ARRAY_SIZE (operand_types)]; /* Copy the default operand type. */ @@ -884,16 +1190,60 @@ process_i386_operand_type (FILE *table, char *op, int macro, if (strcmp (op, "0")) { + int baseindex = 0; + last = op + strlen (op); for (next = op; next && next < last; ) { str = next_field (next, '|', &next, last); if (str) - set_bitfield (str, types, 1, ARRAY_SIZE (types), lineno); + { + unsigned int i; + + if (!strncmp(str, "Class=", 6)) + { + for (i = 0; i < ARRAY_SIZE(operand_classes); ++i) + if (!strcmp(str + 6, operand_classes[i].name)) + { + class = operand_classes[i].value; + str = NULL; + break; + } + } + + if (str && !strncmp(str, "Instance=", 9)) + { + for (i = 0; i < ARRAY_SIZE(operand_instances); ++i) + if (!strcmp(str + 9, operand_instances[i].name)) + { + instance = operand_instances[i].value; + str = NULL; + break; + } + } + } + if (str) + { + set_bitfield (str, types, 1, ARRAY_SIZE (types), lineno); + if (strcasecmp(str, "BaseIndex") == 0) + baseindex = 1; + } + } + + if (stage == stage_opcodes && baseindex && !active_isstring) + { + set_bitfield("Disp8", types, 1, ARRAY_SIZE (types), lineno); + if (!active_cpu_flags.bitfield.cpu64 + && !active_cpu_flags.bitfield.cpumpx) + set_bitfield("Disp16", types, 1, ARRAY_SIZE (types), lineno); + if (!active_cpu_flags.bitfield.cpu64) + set_bitfield("Disp32", types, 1, ARRAY_SIZE (types), lineno); + if (!active_cpu_flags.bitfield.cpuno64) + set_bitfield("Disp32S", types, 1, ARRAY_SIZE (types), lineno); } } - output_operand_type (table, types, ARRAY_SIZE (types), macro, - indent); + output_operand_type (table, class, instance, types, ARRAY_SIZE (types), + stage, indent); } static void @@ -966,12 +1316,11 @@ output_i386_opcode (FILE *table, const char *name, char *str, } fprintf (table, " { \"%s\", %s, %s, %s, %s,\n", - name, operands, base_opcode, extension_opcode, - opcode_length); + name, base_opcode, extension_opcode, opcode_length, operands); process_i386_cpu_flag (table, cpu_flags, 0, ",", " ", lineno); - process_i386_opcode_modifier (table, opcode_modifier, lineno); + process_i386_opcode_modifier (table, opcode_modifier, operand_types, lineno); fprintf (table, " { "); @@ -980,14 +1329,15 @@ output_i386_opcode (FILE *table, const char *name, char *str, if (operand_types[i] == NULL || *operand_types[i] == '0') { if (i == 0) - process_i386_operand_type (table, "0", 0, "\t ", lineno); + process_i386_operand_type (table, "0", stage_opcodes, "\t ", + lineno); break; } if (i != 0) fprintf (table, ",\n "); - process_i386_operand_type (table, operand_types[i], 0, + process_i386_operand_type (table, operand_types[i], stage_opcodes, "\t ", lineno); } fprintf (table, " } },\n"); @@ -1031,14 +1381,10 @@ process_i386_opcodes (FILE *table) htab_t opcode_hash_table; struct opcode_hash_entry **opcode_array; unsigned int opcode_array_size = 1024; - int lineno = 0; + int lineno = 0, marker = 0; filename = "i386-opc.tbl"; - fp = fopen (filename, "r"); - - if (fp == NULL) - fail (_("can't find i386-opc.tbl for reading, errno = %s\n"), - xstrerror (errno)); + fp = stdin; i = 0; opcode_array = (struct opcode_hash_entry **) @@ -1072,11 +1418,32 @@ process_i386_opcodes (FILE *table) switch (p[0]) { case '#': + if (!strcmp("### MARKER ###", buf)) + marker = 1; + else + { + /* Since we ignore all included files (we only care about their + #define-s here), we don't need to monitor filenames. The final + line number directive is going to refer to the main source file + again. */ + char *end; + unsigned long ln; + + p = remove_leading_whitespaces (p + 1); + if (!strncmp(p, "line", 4)) + p += 4; + ln = strtoul (p, &end, 10); + if (ln > 1 && ln < INT_MAX + && *remove_leading_whitespaces (end) == '"') + lineno = ln - 1; + } /* Ignore comments. */ case '\0': continue; break; default: + if (!marker) + continue; break; } @@ -1146,10 +1513,10 @@ process_i386_opcodes (FILE *table) process_i386_cpu_flag (table, "0", 0, ",", " ", -1); - process_i386_opcode_modifier (table, "0", -1); + process_i386_opcode_modifier (table, "0", NULL, -1); fprintf (table, " { "); - process_i386_operand_type (table, "0", 0, "\t ", -1); + process_i386_operand_type (table, "0", stage_opcodes, "\t ", -1); fprintf (table, " } }\n"); fprintf (table, "};\n"); @@ -1218,7 +1585,8 @@ process_i386_registers (FILE *table) fprintf (table, " { \"%s\",\n ", reg_name); - process_i386_operand_type (table, reg_type, 0, "\t", lineno); + process_i386_operand_type (table, reg_type, stage_registers, "\t", + lineno); /* Find 32-bit Dwarf2 register number. */ dw2_32_num = next_field (str, ',', &str, last); @@ -1262,7 +1630,7 @@ process_i386_initializers (void) { fprintf (fp, "\n\n#define %s \\\n ", operand_type_init[i].name); init = xstrdup (operand_type_init[i].init); - process_i386_operand_type (fp, init, 1, " ", -1); + process_i386_operand_type (fp, init, stage_macros, " ", -1); free (init); } fprintf (fp, "\n"); @@ -1303,6 +1671,7 @@ main (int argc, char **argv) extern int chdir (char *); char *srcdir = NULL; int c; + unsigned int i, cpumax; FILE *table; program_name = *argv; @@ -1337,16 +1706,40 @@ main (int argc, char **argv) fail (_("unable to change directory to \"%s\", errno = %s\n"), srcdir, xstrerror (errno)); + /* cpu_flags isn't sorted by position. */ + cpumax = 0; + for (i = 0; i < ARRAY_SIZE (cpu_flags); i++) + if (cpu_flags[i].position > cpumax) + cpumax = cpu_flags[i].position; + /* Check the unused bitfield in i386_cpu_flags. */ -#ifndef CpuUnused +#ifdef CpuUnused + static_assert (ARRAY_SIZE (cpu_flags) == CpuMax + 2); + + if ((cpumax - 1) != CpuMax) + fail (_("CpuMax != %d!\n"), cpumax); +#else + static_assert (ARRAY_SIZE (cpu_flags) == CpuMax + 1); + + if (cpumax != CpuMax) + fail (_("CpuMax != %d!\n"), cpumax); + c = CpuNumOfBits - CpuMax - 1; if (c) fail (_("%d unused bits in i386_cpu_flags.\n"), c); #endif + static_assert (ARRAY_SIZE (opcode_modifiers) == Opcode_Modifier_Num); + /* Check the unused bitfield in i386_operand_type. */ -#ifndef OTUnused - c = OTNumOfBits - OTMax - 1; +#ifdef OTUnused + static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH + INSTANCE_WIDTH + == OTNum + 1); +#else + static_assert (ARRAY_SIZE (operand_types) + CLASS_WIDTH + INSTANCE_WIDTH + == OTNum); + + c = OTNumOfBits - OTNum; if (c) fail (_("%d unused bits in i386_operand_type.\n"), c); #endif