X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fiq2000-asm.c;h=92bda93678c367dbbefa70657125b60bded8693c;hb=70ad5bfff3eeec62753ac4483bab8b7467dd3dd0;hp=bb61af0c3d02d84470824e0bce2a707637c79c49;hpb=7579829884ab4340f4b6980e10c3797d9ed30294;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c index bb61af0c3d..92bda93678 100644 --- a/opcodes/iq2000-asm.c +++ b/opcodes/iq2000-asm.c @@ -1,26 +1,27 @@ /* Assembler interface for targets using CGEN. -*- C -*- CGEN: Cpu tools GENerator -THIS FILE IS MACHINE GENERATED WITH CGEN. -- the resultant file is machine generated, cgen-asm.in isn't + THIS FILE IS MACHINE GENERATED WITH CGEN. + - the resultant file is machine generated, cgen-asm.in isn't -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + Copyright (C) 1996-2014 Free Software Foundation, Inc. -This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* ??? Eventually more and more of this stuff can go to cpu-independent files. Keep that in mind. */ @@ -43,32 +44,32 @@ along with this program; if not, write to the Free Software Foundation, Inc., #define max(a,b) ((a) > (b) ? (a) : (b)) static const char * parse_insn_normal - PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); + (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); /* -- assembler routines inserted here. */ /* -- asm.c */ -static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); -static const char * parse_imm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); -static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); -static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); -/* Special check to ensure that instruction exists for given machine */ +#include "safe-ctype.h" + +static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'"); + +/* Special check to ensure that instruction exists for given machine. */ + int -iq2000_cgen_insn_supported (cd, insn) - CGEN_CPU_DESC cd; - CGEN_INSN *insn; +iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) { int machs = cd->machs; - return ((CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0); + return (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0; } -static int iq2000_cgen_isa_register (strp) - const char **strp; +static int +iq2000_cgen_isa_register (const char **strp) { int len; int ch1, ch2; + if (**strp == 'r' || **strp == 'R') { len = strlen (*strp); @@ -88,7 +89,9 @@ static int iq2000_cgen_isa_register (strp) return 1; } } - if (**strp == '%' && tolower((*strp)[1]) != 'l' && tolower((*strp)[1]) != 'h') + if (**strp == '%' + && TOLOWER ((*strp)[1]) != 'l' + && TOLOWER ((*strp)[1]) != 'h') return 1; return 0; } @@ -96,16 +99,14 @@ static int iq2000_cgen_isa_register (strp) /* Handle negated literal. */ static const char * -parse_mimm (cd, strp, opindex, valuep) - CGEN_CPU_DESC cd; - const char **strp; - int opindex; - long *valuep; +parse_mimm (CGEN_CPU_DESC cd, + const char **strp, + int opindex, + unsigned long *valuep) { const char *errmsg; - long value; - /* Verify this isn't a register */ + /* Verify this isn't a register. */ if (iq2000_cgen_isa_register (strp)) errmsg = _("immediate value cannot be register"); else @@ -116,7 +117,8 @@ parse_mimm (cd, strp, opindex, valuep) if (errmsg == NULL) { long x = (-value) & 0xFFFF0000; - if (x != 0 && x != 0xFFFF0000) + + if (x != 0 && x != (long) 0xFFFF0000) errmsg = _("immediate value out of range"); else *valuep = (-value & 0xFFFF); @@ -128,14 +130,12 @@ parse_mimm (cd, strp, opindex, valuep) /* Handle signed/unsigned literal. */ static const char * -parse_imm (cd, strp, opindex, valuep) - CGEN_CPU_DESC cd; - const char **strp; - int opindex; - unsigned long *valuep; +parse_imm (CGEN_CPU_DESC cd, + const char **strp, + int opindex, + unsigned long *valuep) { const char *errmsg; - long value; if (iq2000_cgen_isa_register (strp)) errmsg = _("immediate value cannot be register"); @@ -147,7 +147,8 @@ parse_imm (cd, strp, opindex, valuep) if (errmsg == NULL) { long x = value & 0xFFFF0000; - if (x != 0 && x != 0xFFFF0000) + + if (x != 0 && x != (long) 0xFFFF0000) errmsg = _("immediate value out of range"); else *valuep = (value & 0xFFFF); @@ -159,23 +160,23 @@ parse_imm (cd, strp, opindex, valuep) /* Handle iq10 21-bit jmp offset. */ static const char * -parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep) - CGEN_CPU_DESC cd; - const char **strp; - int opindex; - int reloc; - enum cgen_parse_operand_result *type_addr; - unsigned long *valuep; +parse_jtargq10 (CGEN_CPU_DESC cd, + const char **strp, + int opindex, + int reloc ATTRIBUTE_UNUSED, + enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED, + bfd_vma *valuep) { const char *errmsg; bfd_vma value; enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER; errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21, - &result_type, &value); + & result_type, & value); if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) { - /* check value is within 23-bits (remembering that 2-bit shift right will occur) */ + /* Check value is within 23-bits + (remembering that 2-bit shift right will occur). */ if (value > 0x7fffff) return _("21-bit offset out of range"); } @@ -186,11 +187,10 @@ parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep) /* Handle high(). */ static const char * -parse_hi16 (cd, strp, opindex, valuep) - CGEN_CPU_DESC cd; - const char **strp; - int opindex; - unsigned long *valuep; +parse_hi16 (CGEN_CPU_DESC cd, + const char **strp, + int opindex, + unsigned long *valuep) { if (strncasecmp (*strp, "%hi(", 4) == 0) { @@ -200,28 +200,29 @@ parse_hi16 (cd, strp, opindex, valuep) *strp += 4; errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, - &result_type, &value); + & result_type, & value); if (**strp != ')') - return _("missing `)'"); + return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) { - /* if value has top-bit of %lo on, then it will + /* If value has top-bit of %lo on, then it will sign-propagate and so we compensate by adding - 1 to the resultant %hi value */ + 1 to the resultant %hi value. */ if (value & 0x8000) value += 0x10000; value >>= 16; + value &= 0xffff; } *valuep = value; return errmsg; } - /* we add %uhi in case a user just wants the high 16-bits or is using - an insn like ori for %lo which does not sign-propagate */ + /* We add %uhi in case a user just wants the high 16-bits or is using + an insn like ori for %lo which does not sign-propagate. */ if (strncasecmp (*strp, "%uhi(", 5) == 0) { enum cgen_parse_operand_result result_type; @@ -230,16 +231,16 @@ parse_hi16 (cd, strp, opindex, valuep) *strp += 5; errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16, - &result_type, &value); + & result_type, & value); if (**strp != ')') - return _("missing `)'"); + return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - { - value >>= 16; - } + value >>= 16; + + value &= 0xffff; *valuep = value; return errmsg; @@ -253,11 +254,10 @@ parse_hi16 (cd, strp, opindex, valuep) handles the case where %lo() isn't present. */ static const char * -parse_lo16 (cd, strp, opindex, valuep) - CGEN_CPU_DESC cd; - const char **strp; - int opindex; - long *valuep; +parse_lo16 (CGEN_CPU_DESC cd, + const char **strp, + int opindex, + unsigned long *valuep) { if (strncasecmp (*strp, "%lo(", 4) == 0) { @@ -267,9 +267,9 @@ parse_lo16 (cd, strp, opindex, valuep) *strp += 4; errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, - &result_type, &value); + & result_type, & value); if (**strp != ')') - return _("missing `)'"); + return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) @@ -286,11 +286,10 @@ parse_lo16 (cd, strp, opindex, valuep) handles the case where %lo() isn't present. */ static const char * -parse_mlo16 (cd, strp, opindex, valuep) - CGEN_CPU_DESC cd; - const char **strp; - int opindex; - long *valuep; +parse_mlo16 (CGEN_CPU_DESC cd, + const char **strp, + int opindex, + unsigned long *valuep) { if (strncasecmp (*strp, "%lo(", 4) == 0) { @@ -300,9 +299,9 @@ parse_mlo16 (cd, strp, opindex, valuep) *strp += 4; errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, - &result_type, &value); + & result_type, & value); if (**strp != ')') - return _("missing `)'"); + return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) @@ -317,7 +316,7 @@ parse_mlo16 (cd, strp, opindex, valuep) /* -- */ const char * iq2000_cgen_parse_operand - PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *)); + (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); /* Main entry point for operand parsing. @@ -333,11 +332,10 @@ const char * iq2000_cgen_parse_operand the handlers. */ const char * -iq2000_cgen_parse_operand (cd, opindex, strp, fields) - CGEN_CPU_DESC cd; - int opindex; - const char ** strp; - CGEN_FIELDS * fields; +iq2000_cgen_parse_operand (CGEN_CPU_DESC cd, + int opindex, + const char ** strp, + CGEN_FIELDS * fields) { const char * errmsg = NULL; /* Used by scalar operands that still need to be parsed. */ @@ -345,90 +343,90 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) switch (opindex) { + case IQ2000_OPERAND__INDEX : + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, (unsigned long *) (& fields->f_index)); + break; case IQ2000_OPERAND_BASE : errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); break; case IQ2000_OPERAND_BASEOFF : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value); fields->f_imm = value; } break; case IQ2000_OPERAND_BITNUM : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, &fields->f_rt); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, (unsigned long *) (& fields->f_rt)); break; case IQ2000_OPERAND_BYTECOUNT : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, &fields->f_bytecount); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, (unsigned long *) (& fields->f_bytecount)); break; case IQ2000_OPERAND_CAM_Y : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, &fields->f_cam_y); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, (unsigned long *) (& fields->f_cam_y)); break; case IQ2000_OPERAND_CAM_Z : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, &fields->f_cam_z); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, (unsigned long *) (& fields->f_cam_z)); break; case IQ2000_OPERAND_CM_3FUNC : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, &fields->f_cm_3func); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, (unsigned long *) (& fields->f_cm_3func)); break; case IQ2000_OPERAND_CM_3Z : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, &fields->f_cm_3z); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, (unsigned long *) (& fields->f_cm_3z)); break; case IQ2000_OPERAND_CM_4FUNC : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, &fields->f_cm_4func); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, (unsigned long *) (& fields->f_cm_4func)); break; case IQ2000_OPERAND_CM_4Z : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, &fields->f_cm_4z); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, (unsigned long *) (& fields->f_cm_4z)); break; case IQ2000_OPERAND_COUNT : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, &fields->f_count); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, (unsigned long *) (& fields->f_count)); break; case IQ2000_OPERAND_EXECODE : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, &fields->f_excode); - break; - case IQ2000_OPERAND_F_INDEX : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_F_INDEX, &fields->f_index); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, (unsigned long *) (& fields->f_excode)); break; case IQ2000_OPERAND_HI16 : - errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, &fields->f_imm); + errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, (unsigned long *) (& fields->f_imm)); break; case IQ2000_OPERAND_IMM : - errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, &fields->f_imm); + errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, (unsigned long *) (& fields->f_imm)); break; case IQ2000_OPERAND_JMPTARG : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value); fields->f_jtarg = value; } break; case IQ2000_OPERAND_JMPTARGQ10 : { - bfd_vma value; + bfd_vma value = 0; errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value); fields->f_jtargq10 = value; } break; case IQ2000_OPERAND_LO16 : - errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, &fields->f_imm); + errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, (unsigned long *) (& fields->f_imm)); break; case IQ2000_OPERAND_MASK : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, &fields->f_mask); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, (unsigned long *) (& fields->f_mask)); break; case IQ2000_OPERAND_MASKL : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, &fields->f_maskl); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, (unsigned long *) (& fields->f_maskl)); break; case IQ2000_OPERAND_MASKQ10 : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, &fields->f_maskq10); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, (unsigned long *) (& fields->f_maskq10)); break; case IQ2000_OPERAND_MASKR : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, &fields->f_rs); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, (unsigned long *) (& fields->f_rs)); break; case IQ2000_OPERAND_MLO16 : - errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, &fields->f_imm); + errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, (unsigned long *) (& fields->f_imm)); break; case IQ2000_OPERAND_OFFSET : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value); fields->f_offset = value; } @@ -452,7 +450,7 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs); break; case IQ2000_OPERAND_SHAMT : - errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, &fields->f_shamt); + errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, (unsigned long *) (& fields->f_shamt)); break; default : @@ -470,13 +468,15 @@ cgen_parse_fn * const iq2000_cgen_parse_handlers[] = }; void -iq2000_cgen_init_asm (cd) - CGEN_CPU_DESC cd; +iq2000_cgen_init_asm (CGEN_CPU_DESC cd) { iq2000_cgen_init_opcode_table (cd); iq2000_cgen_init_ibld_table (cd); cd->parse_handlers = & iq2000_cgen_parse_handlers[0]; cd->parse_operand = iq2000_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } @@ -493,8 +493,7 @@ iq2000_cgen_init_asm (cd) Returns NULL for success, an error message for failure. */ char * -iq2000_cgen_build_insn_regex (insn) - CGEN_INSN *insn; +iq2000_cgen_build_insn_regex (CGEN_INSN *insn) { CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); const char *mnem = CGEN_INSN_MNEMONIC (insn); @@ -617,11 +616,10 @@ iq2000_cgen_build_insn_regex (insn) Returns NULL for success, an error message for failure. */ static const char * -parse_insn_normal (cd, insn, strp, fields) - CGEN_CPU_DESC cd; - const CGEN_INSN *insn; - const char **strp; - CGEN_FIELDS *fields; +parse_insn_normal (CGEN_CPU_DESC cd, + const CGEN_INSN *insn, + const char **strp, + CGEN_FIELDS *fields) { /* ??? Runtime added insns not handled yet. */ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); @@ -707,9 +705,11 @@ parse_insn_normal (cd, insn, strp, fields) continue; } +#ifdef CGEN_MNEMONIC_OPERANDS + (void) past_opcode_p; +#endif /* We have an operand of some sort. */ - errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), - &str, fields); + errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); if (errmsg) return errmsg; @@ -759,12 +759,11 @@ parse_insn_normal (cd, insn, strp, fields) mind helps keep the design clean. */ const CGEN_INSN * -iq2000_cgen_assemble_insn (cd, str, fields, buf, errmsg) - CGEN_CPU_DESC cd; - const char *str; - CGEN_FIELDS *fields; - CGEN_INSN_BYTES_PTR buf; - char **errmsg; +iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd, + const char *str, + CGEN_FIELDS *fields, + CGEN_INSN_BYTES_PTR buf, + char **errmsg) { const char *start; CGEN_INSN_LIST *ilist; @@ -794,10 +793,10 @@ iq2000_cgen_assemble_insn (cd, str, fields, buf, errmsg) if (! iq2000_cgen_insn_supported (cd, insn)) continue; #endif - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; @@ -827,62 +826,41 @@ iq2000_cgen_assemble_insn (cd, str, fields, buf, errmsg) { static char errbuf[150]; -#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS const char *tmp_errmsg; - - /* If requesting verbose error messages, use insert_errmsg. - Failing that, use parse_errmsg. */ - tmp_errmsg = (insert_errmsg ? insert_errmsg : - parse_errmsg ? parse_errmsg : - recognized_mnemonic ? - _("unrecognized form of instruction") : - _("unrecognized instruction")); - - if (strlen (start) > 50) - /* xgettext:c-format */ - sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); - else - /* xgettext:c-format */ - sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); +#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS +#define be_verbose 1 #else - if (strlen (start) > 50) - /* xgettext:c-format */ - sprintf (errbuf, _("bad instruction `%.50s...'"), start); - else - /* xgettext:c-format */ - sprintf (errbuf, _("bad instruction `%.50s'"), start); +#define be_verbose 0 #endif + + if (be_verbose) + { + /* If requesting verbose error messages, use insert_errmsg. + Failing that, use parse_errmsg. */ + tmp_errmsg = (insert_errmsg ? insert_errmsg : + parse_errmsg ? parse_errmsg : + recognized_mnemonic ? + _("unrecognized form of instruction") : + _("unrecognized instruction")); + + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); + else + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); + } + else + { + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s...'"), start); + else + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s'"), start); + } *errmsg = errbuf; return NULL; } } - -#if 0 /* This calls back to GAS which we can't do without care. */ - -/* Record each member of OPVALS in the assembler's symbol table. - This lets GAS parse registers for us. - ??? Interesting idea but not currently used. */ - -/* Record each member of OPVALS in the assembler's symbol table. - FIXME: Not currently used. */ - -void -iq2000_cgen_asm_hash_keywords (cd, opvals) - CGEN_CPU_DESC cd; - CGEN_KEYWORD *opvals; -{ - CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); - const CGEN_KEYWORD_ENTRY * ke; - - while ((ke = cgen_keyword_search_next (& search)) != NULL) - { -#if 0 /* Unnecessary, should be done in the search routine. */ - if (! iq2000_cgen_opval_supported (ke)) - continue; -#endif - cgen_asm_record_register (cd, ke->name, ke->value); - } -} - -#endif /* 0 */