X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fm10300-opc.c;h=2fa2d8b5006c52098232bb6247d5dfcdb7d2f9d9;hb=c2e5c986b3825c16a578e5bf84aa412eec276dc7;hp=6b6966eb2b2e9bb281f3e94c5781499f8d5ee37f;hpb=f4321104139af96b8cc3d4946b4e5233d9fa1eab;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m10300-opc.c b/opcodes/m10300-opc.c index 6b6966eb2b..2fa2d8b500 100644 --- a/opcodes/m10300-opc.c +++ b/opcodes/m10300-opc.c @@ -1,30 +1,32 @@ /* Assemble Matsushita MN10300 instructions. - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004 - Free Software Foundation, Inc. + Copyright (C) 1996-2020 Free Software Foundation, Inc. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This file is part of the GNU opcodes library. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -/* This file is formatted at > 80 columns. Attempting to read it on a - screeen with less than 80 columns will be difficult. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +/* This file is formatted at > 80 columns. Attempting to read it + on a screeen with less than 80 columns will be difficult. */ #include "sysdep.h" #include "opcode/mn10300.h" const struct mn10300_operand mn10300_operands[] = { #define UNUSED 0 - {0, 0, 0}, + {0, 0, 0}, /* dn register in the first register operand position. */ #define DN0 (UNUSED+1) @@ -95,7 +97,7 @@ const struct mn10300_operand mn10300_operands[] = { {16, 0, MN10300_OPERAND_PROMOTE | MN10300_OPERAND_MEMADDR}, /* 32bit immediate, high 16 bits in the main instruction - word, 16bits in the extension word. + word, 16bits in the extension word. The "bits" field indicates how many bits are in the main instruction word for MN10300_OPERAND_SPLIT! */ @@ -112,7 +114,7 @@ const struct mn10300_operand mn10300_operands[] = { /* 32bit immediate, high 16 bits in the main instruction word, 16bits in the extension word, low 16bits are left - shifted 8 places. + shifted 8 places. The "bits" field indicates how many bits are in the main instruction word for MN10300_OPERAND_SPLIT! */ @@ -129,7 +131,7 @@ const struct mn10300_operand mn10300_operands[] = { /* 32bit immediate, high 24 bits in the main instruction word, 8 in the extension word, low 8 bits are left - shifted 16 places. + shifted 16 places. The "bits" field indicates how many bits are in the main instruction word for MN10300_OPERAND_SPLIT! */ @@ -182,7 +184,7 @@ const struct mn10300_operand mn10300_operands[] = { /* Either an open paren or close paren. */ #define PAREN (SIMM16+1) - {0, 0, MN10300_OPERAND_PAREN}, + {0, 0, MN10300_OPERAND_PAREN}, /* dn register that appears in the first and second register positions. */ #define DN01 (PAREN+1) @@ -268,7 +270,7 @@ const struct mn10300_operand mn10300_operands[] = { /* + for autoincrement */ #define PLUS (XRM2+1) - {0, 0, MN10300_OPERAND_PLUS}, + {0, 0, MN10300_OPERAND_PLUS}, #define XRN02 (PLUS+1) {4, 0, MN10300_OPERAND_XRREG | MN10300_OPERAND_REPEATED}, @@ -418,12 +420,12 @@ const struct mn10300_operand mn10300_operands[] = { #define FDN3 (FDN2+1) {5, -12, MN10300_OPERAND_FDREG }, -} ; +} ; -#define MEM(ADDR) PAREN, ADDR, PAREN -#define MEMINC(ADDR) PAREN, ADDR, PLUS, PAREN -#define MEMINC2(ADDR,INC) PAREN, ADDR, PLUS, INC, PAREN -#define MEM2(ADDR1,ADDR2) PAREN, ADDR1, ADDR2, PAREN +#define MEM(ADDR) PAREN, ADDR, PAREN +#define MEMINC(ADDR) PAREN, ADDR, PLUS, PAREN +#define MEMINC2(ADDR,INC) PAREN, ADDR, PLUS, INC, PAREN +#define MEM2(ADDR1,ADDR2) PAREN, ADDR1, ADDR2, PAREN /* The opcode table. @@ -1664,7 +1666,7 @@ const struct mn10300_opcode mn10300_opcodes[] = { { "leq_mov", 0xf7e00008, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}}, { "lne_mov", 0xf7e00009, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}}, { "lra_mov", 0xf7e0000a, 0xffff000f, 0x22, FMT_D10, AM33, {MEMINC2 (RN4,SIMM4_2), RM6}}, - + { 0, 0, 0, 0, 0, 0, {0}}, } ;