X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fm32c-opc.h;h=d13aa7fd8b0086cb5a3a49920d78e8f971e20a0c;hb=25e1eca8faf1c29d28e57b37d6b5e3810b7b870b;hp=7f0e6e566dca4e65f4d0214251a157b8c5f1b806;hpb=01f0fe5e0450edf168c1f612feb93cf588e4e7ea;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/m32c-opc.h b/opcodes/m32c-opc.h
index 7f0e6e566d..d13aa7fd8b 100644
--- a/opcodes/m32c-opc.h
+++ b/opcodes/m32c-opc.h
@@ -1,35 +1,40 @@
+/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
 /* Instruction opcode header for m32c.
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2005 Free Software Foundation, Inc.
+Copyright (C) 1996-2020 Free Software Foundation, Inc.
 
 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
 
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
 
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
 #ifndef M32C_OPC_H
 #define M32C_OPC_H
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* -- opc.h */
 
 /* Needed for RTL's 'ext' and 'trunc' operators.  */
-#include "cgen-types.h"
-#include "cgen-ops.h"
+#include "cgen/basic-modes.h"
+#include "cgen/basic-ops.h"
 
 /* We can't use the default hash size because many bits are used by
    operands.  */
@@ -1638,15 +1643,15 @@ typedef enum cgen_insn_type {
  , M32C_INSN_LDC16_DST_DST16_16_16_AN_RELATIVE_HI, M32C_INSN_LDC16_DST_DST16_16_8_SB_RELATIVE_HI, M32C_INSN_LDC16_DST_DST16_16_16_SB_RELATIVE_HI, M32C_INSN_LDC16_DST_DST16_16_8_FB_RELATIVE_HI
  , M32C_INSN_LDC16_DST_DST16_16_16_ABSOLUTE_HI, M32C_INSN_JSRI32_A_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI32_A_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_BASIC_UNPREFIXED_SI_DST32_RN_DIRECT_UNPREFIXED_SI
  , M32C_INSN_JSRI32A_DST32_BASIC_UNPREFIXED_SI_DST32_AN_DIRECT_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_BASIC_UNPREFIXED_SI_DST32_AN_INDIRECT_UNPREFIXED_SI, M32C_INSN_JSRI16A_DST16_BASIC_SI_DST16_RN_DIRECT_SI, M32C_INSN_JSRI16A_DST16_BASIC_SI_DST16_AN_DIRECT_SI
- , M32C_INSN_JSRI16A_DST16_BASIC_SI_DST16_AN_INDIRECT_SI, M32C_INSN_JSRI32A_DST32_16_16_UNPREFIXED_SI_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_16_16_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_16_16_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI
- , M32C_INSN_JSRI32A_DST32_16_16_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_INSN_JSRI16A_DST16_16_16_SI_DST16_16_16_AN_RELATIVE_SI, M32C_INSN_JSRI16A_DST16_16_16_SI_DST16_16_16_SB_RELATIVE_SI, M32C_INSN_JSRI16A_DST16_16_16_SI_DST16_16_16_ABSOLUTE_SI
- , M32C_INSN_JSRI32A_DST32_16_8_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_16_8_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_16_8_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI16A_DST16_16_8_SI_DST16_16_8_AN_RELATIVE_SI
- , M32C_INSN_JSRI16A_DST16_16_8_SI_DST16_16_8_SB_RELATIVE_SI, M32C_INSN_JSRI16A_DST16_16_8_SI_DST16_16_8_FB_RELATIVE_SI, M32C_INSN_JSRI32_W_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_JSRI32_W_DST32_16_24_ABSOLUTE_UNPREFIXED_HI
- , M32C_INSN_JSRI32W_DST32_BASIC_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_BASIC_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_BASIC_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_INSN_JSRI16W_DST16_BASIC_HI_DST16_RN_DIRECT_HI
- , M32C_INSN_JSRI16W_DST16_BASIC_HI_DST16_AN_DIRECT_HI, M32C_INSN_JSRI16W_DST16_BASIC_HI_DST16_AN_INDIRECT_HI, M32C_INSN_JSRI32W_DST32_16_16_UNPREFIXED_HI_DST32_16_16_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_16_16_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI
- , M32C_INSN_JSRI32W_DST32_16_16_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_16_16_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_INSN_JSRI16W_DST16_16_16_HI_DST16_16_16_AN_RELATIVE_HI, M32C_INSN_JSRI16W_DST16_16_16_HI_DST16_16_16_SB_RELATIVE_HI
- , M32C_INSN_JSRI16W_DST16_16_16_HI_DST16_16_16_ABSOLUTE_HI, M32C_INSN_JSRI32W_DST32_16_8_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_16_8_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_16_8_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI
- , M32C_INSN_JSRI16W_DST16_16_8_HI_DST16_16_8_AN_RELATIVE_HI, M32C_INSN_JSRI16W_DST16_16_8_HI_DST16_16_8_SB_RELATIVE_HI, M32C_INSN_JSRI16W_DST16_16_8_HI_DST16_16_8_FB_RELATIVE_HI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI
+ , M32C_INSN_JSRI16A_DST16_BASIC_SI_DST16_AN_INDIRECT_SI, M32C_INSN_JSRI32A_DST32_16_16SA_UNPREFIXED_SI_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_16_16SA_UNPREFIXED_SI_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_16_16SA_UNPREFIXED_SI_DST32_16_16_ABSOLUTE_UNPREFIXED_SI
+ , M32C_INSN_JSRI16A_DST16_16_16SA_SI_DST16_16_16_SB_RELATIVE_SI, M32C_INSN_JSRI16A_DST16_16_16SA_SI_DST16_16_16_ABSOLUTE_SI, M32C_INSN_JSRI32A_DST32_16_8_UNPREFIXED_SI_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_16_8_UNPREFIXED_SI_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI
+ , M32C_INSN_JSRI32A_DST32_16_8_UNPREFIXED_SI_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI16A_DST16_16_8_SI_DST16_16_8_AN_RELATIVE_SI, M32C_INSN_JSRI16A_DST16_16_8_SI_DST16_16_8_SB_RELATIVE_SI, M32C_INSN_JSRI16A_DST16_16_8_SI_DST16_16_8_FB_RELATIVE_SI
+ , M32C_INSN_JSRI32A_DST32_16_24_UNPREFIXED_SI_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_INSN_JSRI32A_DST32_16_24_UNPREFIXED_SI_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_INSN_JSRI16A_DST16_16_20AR_SI_DST16_16_20_AN_RELATIVE_SI, M32C_INSN_JSRI32W_DST32_BASIC_UNPREFIXED_HI_DST32_RN_DIRECT_UNPREFIXED_HI
+ , M32C_INSN_JSRI32W_DST32_BASIC_UNPREFIXED_HI_DST32_AN_DIRECT_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_BASIC_UNPREFIXED_HI_DST32_AN_INDIRECT_UNPREFIXED_HI, M32C_INSN_JSRI16W_DST16_BASIC_HI_DST16_RN_DIRECT_HI, M32C_INSN_JSRI16W_DST16_BASIC_HI_DST16_AN_DIRECT_HI
+ , M32C_INSN_JSRI16W_DST16_BASIC_HI_DST16_AN_INDIRECT_HI, M32C_INSN_JSRI32W_DST32_16_8_UNPREFIXED_HI_DST32_16_8_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_16_8_UNPREFIXED_HI_DST32_16_8_SB_RELATIVE_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_16_8_UNPREFIXED_HI_DST32_16_8_FB_RELATIVE_UNPREFIXED_HI
+ , M32C_INSN_JSRI16W_DST16_16_8_HI_DST16_16_8_AN_RELATIVE_HI, M32C_INSN_JSRI16W_DST16_16_8_HI_DST16_16_8_SB_RELATIVE_HI, M32C_INSN_JSRI16W_DST16_16_8_HI_DST16_16_8_FB_RELATIVE_HI, M32C_INSN_JSRI32W_DST32_16_16SA_UNPREFIXED_HI_DST32_16_16_SB_RELATIVE_UNPREFIXED_HI
+ , M32C_INSN_JSRI32W_DST32_16_16SA_UNPREFIXED_HI_DST32_16_16_FB_RELATIVE_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_16_16SA_UNPREFIXED_HI_DST32_16_16_ABSOLUTE_UNPREFIXED_HI, M32C_INSN_JSRI16W_DST16_16_16SA_HI_DST16_16_16_SB_RELATIVE_HI, M32C_INSN_JSRI16W_DST16_16_16SA_HI_DST16_16_16_ABSOLUTE_HI
+ , M32C_INSN_JSRI32W_DST32_16_24_UNPREFIXED_HI_DST32_16_24_AN_RELATIVE_UNPREFIXED_HI, M32C_INSN_JSRI32W_DST32_16_24_UNPREFIXED_HI_DST32_16_24_ABSOLUTE_UNPREFIXED_HI, M32C_INSN_JSRI16W_DST16_16_20AR_HI_DST16_16_20_AN_RELATIVE_HI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_RN_DIRECT_UNPREFIXED_SI
  , M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_AN_DIRECT_UNPREFIXED_SI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_AN_INDIRECT_UNPREFIXED_SI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_8_AN_RELATIVE_UNPREFIXED_SI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_16_AN_RELATIVE_UNPREFIXED_SI
  , M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_24_AN_RELATIVE_UNPREFIXED_SI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_8_SB_RELATIVE_UNPREFIXED_SI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_16_SB_RELATIVE_UNPREFIXED_SI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_8_FB_RELATIVE_UNPREFIXED_SI
  , M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_16_FB_RELATIVE_UNPREFIXED_SI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_16_ABSOLUTE_UNPREFIXED_SI, M32C_INSN_JMPI32_A_16_UNPREFIXED_DST32_16_24_ABSOLUTE_UNPREFIXED_SI, M32C_INSN_JMPI16_A_16_DST16_RN_DIRECT_SI
@@ -3186,8 +3191,10 @@ struct cgen_fields
   long f_dsp_16_u24;
   long f_dsp_24_u24;
   long f_dsp_32_u24;
+  long f_dsp_40_u20;
   long f_dsp_40_u24;
   long f_dsp_40_s32;
+  long f_dsp_48_u20;
   long f_dsp_48_u24;
   long f_dsp_16_s32;
   long f_dsp_24_s32;
@@ -3239,4 +3246,8 @@ struct cgen_fields
 }
 
 
+   #ifdef __cplusplus
+   }
+   #endif
+
 #endif /* M32C_OPC_H */