X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fm32r-asm.c;h=4a2106c2fbfdd54810c926cca4bf64d9425364af;hb=4c4addbe57711f1cdbb72305b8cbd03a68ae2e34;hp=0531c64e1e94041f1553c3826d38e65ea69090ed;hpb=b00ea55caf2a3e160e549bc641422da0c6f75adb;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c index 0531c64e1e..4a2106c2fb 100644 --- a/opcodes/m32r-asm.c +++ b/opcodes/m32r-asm.c @@ -1,59 +1,64 @@ +/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ /* Assembler interface for targets using CGEN. -*- C -*- CGEN: Cpu tools GENerator -THIS FILE IS USED TO GENERATE m32r-asm.c. + THIS FILE IS MACHINE GENERATED WITH CGEN. + - the resultant file is machine generated, cgen-asm.in isn't -Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + Copyright (C) 1996-2020 Free Software Foundation, Inc. -This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + + +/* ??? Eventually more and more of this stuff can go to cpu-independent files. + Keep that in mind. */ #include "sysdep.h" -#include #include #include "ansidecl.h" #include "bfd.h" #include "symcat.h" +#include "m32r-desc.h" #include "m32r-opc.h" #include "opintl.h" +#include "xregex.h" +#include "libiberty.h" +#include "safe-ctype.h" -/* ??? The layout of this stuff is still work in progress. - For speed in assembly/disassembly, we use inline functions. That of course - will only work for GCC. When this stuff is finished, we can decide whether - to keep the inline functions (and only get the performance increase when - compiled with GCC), or switch to macros, or use something else. -*/ +#undef min +#define min(a,b) ((a) < (b) ? (a) : (b)) +#undef max +#define max(a,b) ((a) > (b) ? (a) : (b)) -static const char * insert_normal - PARAMS ((long, unsigned int, int, int, int, char *)); static const char * parse_insn_normal - PARAMS ((const CGEN_INSN *, const char **, CGEN_FIELDS *)); -static const char * insert_insn_normal - PARAMS ((const CGEN_INSN *, CGEN_FIELDS *, cgen_insn_t *, bfd_vma)); + (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); -/* -- assembler routines inserted here */ +/* -- assembler routines inserted here. */ + /* -- asm.c */ +static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'"); /* Handle '#' prefixes (i.e. skip over them). */ static const char * -parse_hash (strp, opindex, valuep) - const char **strp; - int opindex; - unsigned long *valuep; +parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + const char **strp, + int opindex ATTRIBUTE_UNUSED, + long *valuep ATTRIBUTE_UNUSED) { if (**strp == '#') ++*strp; @@ -63,13 +68,14 @@ parse_hash (strp, opindex, valuep) /* Handle shigh(), high(). */ static const char * -parse_hi16 (strp, opindex, valuep) - const char **strp; - int opindex; - unsigned long *valuep; +parse_hi16 (CGEN_CPU_DESC cd, + const char **strp, + int opindex, + unsigned long *valuep) { const char *errmsg; enum cgen_parse_operand_result result_type; + bfd_vma value; if (**strp == '#') ++*strp; @@ -77,31 +83,40 @@ parse_hi16 (strp, opindex, valuep) if (strncasecmp (*strp, "high(", 5) == 0) { *strp += 5; - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_ULO, - &result_type, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO, + & result_type, & value); if (**strp != ')') - return "missing `)'"; + return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL - && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - *valuep >>= 16; + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + { + value >>= 16; + value &= 0xffff; + } + *valuep = value; return errmsg; } else if (strncasecmp (*strp, "shigh(", 6) == 0) { *strp += 6; - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_SLO, - &result_type, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO, + & result_type, & value); if (**strp != ')') - return "missing `)'"; + return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - *valuep = (*valuep >> 16) + ((*valuep) & 0x8000 ? 1 : 0); + { + value += 0x8000; + value >>= 16; + value &= 0xffff; + } + *valuep = value; return errmsg; } - return cgen_parse_unsigned_integer (strp, opindex, valuep); + return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); } /* Handle low() in a signed context. Also handle sda(). @@ -109,13 +124,14 @@ parse_hi16 (strp, opindex, valuep) handles the case where low() isn't present. */ static const char * -parse_slo16 (strp, opindex, valuep) - const char **strp; - int opindex; - long *valuep; +parse_slo16 (CGEN_CPU_DESC cd, + const char ** strp, + int opindex, + long * valuep) { const char *errmsg; enum cgen_parse_operand_result result_type; + bfd_vma value; if (**strp == '#') ++*strp; @@ -123,28 +139,31 @@ parse_slo16 (strp, opindex, valuep) if (strncasecmp (*strp, "low(", 4) == 0) { *strp += 4; - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16, - &result_type, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16, + & result_type, & value); if (**strp != ')') - return "missing `)'"; + return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - *valuep &= 0xffff; + value = ((value & 0xffff) ^ 0x8000) - 0x8000; + *valuep = value; return errmsg; } if (strncasecmp (*strp, "sda(", 4) == 0) { *strp += 4; - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_SDA16, NULL, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16, + NULL, & value); if (**strp != ')') - return "missing `)'"; + return MISSING_CLOSING_PARENTHESIS; ++*strp; + *valuep = value; return errmsg; } - return cgen_parse_signed_integer (strp, opindex, valuep); + return cgen_parse_signed_integer (cd, strp, opindex, valuep); } /* Handle low() in an unsigned context. @@ -152,13 +171,14 @@ parse_slo16 (strp, opindex, valuep) handles the case where low() isn't present. */ static const char * -parse_ulo16 (strp, opindex, valuep) - const char **strp; - int opindex; - unsigned long *valuep; +parse_ulo16 (CGEN_CPU_DESC cd, + const char **strp, + int opindex, + unsigned long *valuep) { const char *errmsg; enum cgen_parse_operand_result result_type; + bfd_vma value; if (**strp == '#') ++*strp; @@ -166,22 +186,26 @@ parse_ulo16 (strp, opindex, valuep) if (strncasecmp (*strp, "low(", 4) == 0) { *strp += 4; - errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16, - &result_type, valuep); + errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16, + & result_type, & value); if (**strp != ')') - return "missing `)'"; + return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - *valuep &= 0xffff; + value &= 0xffff; + *valuep = value; return errmsg; } - return cgen_parse_unsigned_integer (strp, opindex, valuep); + return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); } /* -- */ +const char * m32r_cgen_parse_operand + (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); + /* Main entry point for operand parsing. This function is basically just a big switch statement. Earlier versions @@ -193,367 +217,262 @@ parse_ulo16 (strp, opindex, valuep) This function could be moved into `parse_insn_normal', but keeping it separate makes clear the interface between `parse_insn_normal' and each of - the handlers. -*/ + the handlers. */ const char * -m32r_cgen_parse_operand (opindex, strp, fields) - int opindex; - const char ** strp; - CGEN_FIELDS * fields; +m32r_cgen_parse_operand (CGEN_CPU_DESC cd, + int opindex, + const char ** strp, + CGEN_FIELDS * fields) { - const char * errmsg; + const char * errmsg = NULL; + /* Used by scalar operands that still need to be parsed. */ + long junk ATTRIBUTE_UNUSED; switch (opindex) { - case M32R_OPERAND_SR : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r2); - break; - case M32R_OPERAND_DR : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r1); - break; - case M32R_OPERAND_SRC1 : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r1); + case M32R_OPERAND_ACC : + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc); break; - case M32R_OPERAND_SRC2 : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r2); + case M32R_OPERAND_ACCD : + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd); break; - case M32R_OPERAND_SCR : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, & fields->f_r2); + case M32R_OPERAND_ACCS : + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs); break; case M32R_OPERAND_DCR : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, & fields->f_r1); - break; - case M32R_OPERAND_SIMM8 : - errmsg = cgen_parse_signed_integer (strp, M32R_OPERAND_SIMM8, &fields->f_simm8); - break; - case M32R_OPERAND_SIMM16 : - errmsg = cgen_parse_signed_integer (strp, M32R_OPERAND_SIMM16, &fields->f_simm16); - break; - case M32R_OPERAND_UIMM4 : - errmsg = cgen_parse_unsigned_integer (strp, M32R_OPERAND_UIMM4, &fields->f_uimm4); - break; - case M32R_OPERAND_UIMM5 : - errmsg = cgen_parse_unsigned_integer (strp, M32R_OPERAND_UIMM5, &fields->f_uimm5); - break; - case M32R_OPERAND_UIMM16 : - errmsg = cgen_parse_unsigned_integer (strp, M32R_OPERAND_UIMM16, &fields->f_uimm16); + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1); break; -/* start-sanitize-m32rx */ - case M32R_OPERAND_IMM1 : - errmsg = cgen_parse_unsigned_integer (strp, M32R_OPERAND_IMM1, &fields->f_imm1); + case M32R_OPERAND_DISP16 : + { + bfd_vma value = 0; + errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value); + fields->f_disp16 = value; + } break; -/* end-sanitize-m32rx */ -/* start-sanitize-m32rx */ - case M32R_OPERAND_ACCD : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_accums, & fields->f_accd); + case M32R_OPERAND_DISP24 : + { + bfd_vma value = 0; + errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value); + fields->f_disp24 = value; + } break; -/* end-sanitize-m32rx */ -/* start-sanitize-m32rx */ - case M32R_OPERAND_ACCS : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_accums, & fields->f_accs); + case M32R_OPERAND_DISP8 : + { + bfd_vma value = 0; + errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value); + fields->f_disp8 = value; + } break; -/* end-sanitize-m32rx */ -/* start-sanitize-m32rx */ - case M32R_OPERAND_ACC : - errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_accums, & fields->f_acc); + case M32R_OPERAND_DR : + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1); break; -/* end-sanitize-m32rx */ case M32R_OPERAND_HASH : - errmsg = parse_hash (strp, M32R_OPERAND_HASH, &fields->f_nil); + errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, (long *) (& junk)); break; case M32R_OPERAND_HI16 : - errmsg = parse_hi16 (strp, M32R_OPERAND_HI16, &fields->f_hi16); - break; - case M32R_OPERAND_SLO16 : - errmsg = parse_slo16 (strp, M32R_OPERAND_SLO16, &fields->f_simm16); + errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, (unsigned long *) (& fields->f_hi16)); break; - case M32R_OPERAND_ULO16 : - errmsg = parse_ulo16 (strp, M32R_OPERAND_ULO16, &fields->f_uimm16); + case M32R_OPERAND_IMM1 : + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, (unsigned long *) (& fields->f_imm1)); break; - case M32R_OPERAND_UIMM24 : - errmsg = cgen_parse_address (strp, M32R_OPERAND_UIMM24, 0, NULL, & fields->f_uimm24); + case M32R_OPERAND_SCR : + errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2); break; - case M32R_OPERAND_DISP8 : - errmsg = cgen_parse_address (strp, M32R_OPERAND_DISP8, 0, NULL, & fields->f_disp8); + case M32R_OPERAND_SIMM16 : + errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, (long *) (& fields->f_simm16)); break; - case M32R_OPERAND_DISP16 : - errmsg = cgen_parse_address (strp, M32R_OPERAND_DISP16, 0, NULL, & fields->f_disp16); + case M32R_OPERAND_SIMM8 : + errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, (long *) (& fields->f_simm8)); break; - case M32R_OPERAND_DISP24 : - errmsg = cgen_parse_address (strp, M32R_OPERAND_DISP24, 0, NULL, & fields->f_disp24); + case M32R_OPERAND_SLO16 : + errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, (long *) (& fields->f_simm16)); break; - - default : - /* xgettext:c-format */ - fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); - abort (); - } - - return errmsg; -} - -/* Main entry point for operand insertion. - - This function is basically just a big switch statement. Earlier versions - used tables to look up the function to use, but - - if the table contains both assembler and disassembler functions then - the disassembler contains much of the assembler and vice-versa, - - there's a lot of inlining possibilities as things grow, - - using a switch statement avoids the function call overhead. - - This function could be moved into `parse_insn_normal', but keeping it - separate makes clear the interface between `parse_insn_normal' and each of - the handlers. It's also needed by GAS to insert operands that couldn't be - resolved during parsing. -*/ - -const char * -m32r_cgen_insert_operand (opindex, fields, buffer, pc) - int opindex; - CGEN_FIELDS * fields; - char * buffer; - bfd_vma pc; -{ - const char * errmsg; - - switch (opindex) - { case M32R_OPERAND_SR : - errmsg = insert_normal (fields->f_r2, 0|(1<f_r1, 0|(1<f_r2); break; case M32R_OPERAND_SRC1 : - errmsg = insert_normal (fields->f_r1, 0|(1<f_r1); break; case M32R_OPERAND_SRC2 : - errmsg = insert_normal (fields->f_r2, 0|(1<f_r2, 0|(1<f_r1, 0|(1<f_simm8, 0|(1<f_simm16, 0|(1<f_uimm4, 0|(1<f_uimm5, 0|(1<f_r2); break; case M32R_OPERAND_UIMM16 : - errmsg = insert_normal (fields->f_uimm16, 0|(1<f_uimm16)); break; -/* start-sanitize-m32rx */ - case M32R_OPERAND_IMM1 : + case M32R_OPERAND_UIMM24 : { - long value = fields->f_imm1; - value = ((value) - (1)); - errmsg = insert_normal (value, 0|(1<f_uimm24 = value; } break; -/* end-sanitize-m32rx */ -/* start-sanitize-m32rx */ - case M32R_OPERAND_ACCD : - errmsg = insert_normal (fields->f_accd, 0|(1<f_accs, 0|(1<f_acc, 0|(1<f_uimm3)); break; -/* end-sanitize-m32rx */ - case M32R_OPERAND_HASH : - errmsg = insert_normal (fields->f_nil, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields), buffer); + case M32R_OPERAND_UIMM4 : + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4)); break; - case M32R_OPERAND_HI16 : - errmsg = insert_normal (fields->f_hi16, 0|(1<f_uimm5)); break; - case M32R_OPERAND_SLO16 : - errmsg = insert_normal (fields->f_simm16, 0, 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer); + case M32R_OPERAND_UIMM8 : + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8)); break; case M32R_OPERAND_ULO16 : - errmsg = insert_normal (fields->f_uimm16, 0|(1<f_uimm24, 0|(1<f_disp8; - value = ((int) (((value) - (((pc) & (-4))))) >> (2)); - errmsg = insert_normal (value, 0|(1<f_disp16; - value = ((int) (((value) - (pc))) >> (2)); - errmsg = insert_normal (value, 0|(1<f_disp24; - value = ((int) (((value) - (pc))) >> (2)); - errmsg = insert_normal (value, 0|(1<f_uimm16)); break; default : /* xgettext:c-format */ - fprintf (stderr, _("Unrecognized field %d while building insn.\n"), - opindex); + opcodes_error_handler + (_("internal error: unrecognized field %d while parsing"), + opindex); abort (); } return errmsg; } -cgen_parse_fn * m32r_cgen_parse_handlers[] = +cgen_parse_fn * const m32r_cgen_parse_handlers[] = { - 0, /* default */ parse_insn_normal, }; -cgen_insert_fn * m32r_cgen_insert_handlers[] = -{ - 0, /* default */ - insert_insn_normal, -}; - void -m32r_cgen_init_asm (mach, endian) - int mach; - enum cgen_endian endian; +m32r_cgen_init_asm (CGEN_CPU_DESC cd) { - m32r_cgen_init_tables (mach); - cgen_set_cpu (& m32r_cgen_opcode_table, mach, endian); - cgen_asm_init (); + m32r_cgen_init_opcode_table (cd); + m32r_cgen_init_ibld_table (cd); + cd->parse_handlers = & m32r_cgen_parse_handlers[0]; + cd->parse_operand = m32r_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } -/* Default insertion routine. - ATTRS is a mask of the boolean attributes. - LENGTH is the length of VALUE in bits. - TOTAL_LENGTH is the total length of the insn (currently 8,16,32). +/* Regex construction routine. - The result is an error message or NULL if success. */ + This translates an opcode syntax string into a regex string, + by replacing any non-character syntax element (such as an + opcode) with the pattern '.*' -/* ??? This duplicates functionality with bfd's howto table and - bfd_install_relocation. */ -/* ??? For architectures where insns can be representable as ints, - store insn in `field' struct and add registers, etc. while parsing? */ + It then compiles the regex and stores it in the opcode, for + later use by m32r_cgen_assemble_insn -static const char * -insert_normal (value, attrs, start, length, total_length, buffer) - long value; - unsigned int attrs; - int start; - int length; - int total_length; - char * buffer; + Returns NULL for success, an error message for failure. */ + +char * +m32r_cgen_build_insn_regex (CGEN_INSN *insn) { - bfd_vma x; - static char buf[100]; - /* Written this way to avoid undefined behaviour. - Yes, `long' will be bfd_vma but not yet. */ - long mask = (((1L << (length - 1)) - 1) << 1) | 1; - - /* If LENGTH is zero, this operand doesn't contribute to the value. */ - if (length == 0) - return NULL; + CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); + const char *mnem = CGEN_INSN_MNEMONIC (insn); + char rxbuf[CGEN_MAX_RX_ELEMENTS]; + char *rx = rxbuf; + const CGEN_SYNTAX_CHAR_TYPE *syn; + int reg_err; + + syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); + + /* Mnemonics come first in the syntax string. */ + if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) + return _("missing mnemonic in syntax string"); + ++syn; - /* Ensure VALUE will fit. */ - if ((attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED)) != 0) + /* Generate a case sensitive regular expression that emulates case + insensitive matching in the "C" locale. We cannot generate a case + insensitive regular expression because in Turkish locales, 'i' and 'I' + are not equal modulo case conversion. */ + + /* Copy the literal mnemonic out of the insn. */ + for (; *mnem; mnem++) { - unsigned long max = mask; - if ((unsigned long) value > max) + char c = *mnem; + + if (ISALPHA (c)) { - /* xgettext:c-format */ - sprintf (buf, _("operand out of range (%lu not between 0 and %lu)"), - value, max); - return buf; + *rx++ = '['; + *rx++ = TOLOWER (c); + *rx++ = TOUPPER (c); + *rx++ = ']'; } + else + *rx++ = c; } - else + + /* Copy any remaining literals from the syntax string into the rx. */ + for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) { - long min = - (1L << (length - 1)); - long max = (1L << (length - 1)) - 1; - if (value < min || value > max) + if (CGEN_SYNTAX_CHAR_P (* syn)) { - sprintf - /* xgettext:c-format */ - (buf, _("operand out of range (%ld not between %ld and %ld)"), - value, min, max); - return buf; - } - } + char c = CGEN_SYNTAX_CHAR (* syn); -#if 0 /*def CGEN_INT_INSN*/ - *buffer |= (value & mask) << (total_length - (start + length)); -#else - switch (total_length) - { - case 8: - x = * (unsigned char *) buffer; - break; - case 16: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - x = bfd_getb16 (buffer); - else - x = bfd_getl16 (buffer); - break; - case 32: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - x = bfd_getb32 (buffer); + switch (c) + { + /* Escape any regex metacharacters in the syntax. */ + case '.': case '[': case '\\': + case '*': case '^': case '$': + +#ifdef CGEN_ESCAPE_EXTENDED_REGEX + case '?': case '{': case '}': + case '(': case ')': case '*': + case '|': case '+': case ']': +#endif + *rx++ = '\\'; + *rx++ = c; + break; + + default: + if (ISALPHA (c)) + { + *rx++ = '['; + *rx++ = TOLOWER (c); + *rx++ = TOUPPER (c); + *rx++ = ']'; + } + else + *rx++ = c; + break; + } + } else - x = bfd_getl32 (buffer); - break; - default : - abort (); + { + /* Replace non-syntax fields with globs. */ + *rx++ = '.'; + *rx++ = '*'; + } } - x |= (value & mask) << (total_length - (start + length)); + /* Trailing whitespace ok. */ + * rx++ = '['; + * rx++ = ' '; + * rx++ = '\t'; + * rx++ = ']'; + * rx++ = '*'; + + /* But anchor it after that. */ + * rx++ = '$'; + * rx = '\0'; - switch (total_length) + CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); + reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); + + if (reg_err == 0) + return NULL; + else { - case 8: - * buffer = value; - break; - case 16: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - bfd_putb16 (x, buffer); - else - bfd_putl16 (x, buffer); - break; - case 32: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - bfd_putb32 (x, buffer); - else - bfd_putl32 (x, buffer); - break; - default : - abort (); - } -#endif + static char msg[80]; - return NULL; + regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); + regfree ((regex_t *) CGEN_INSN_RX (insn)); + free (CGEN_INSN_RX (insn)); + (CGEN_INSN_RX (insn)) = NULL; + return msg; + } } + /* Default insn parser. @@ -566,43 +485,50 @@ insert_normal (value, attrs, start, length, total_length, buffer) but that can be handled there. Not handling backtracking here may get expensive in the case of the m68k. Deal with later. - Returns NULL for success, an error message for failure. -*/ + Returns NULL for success, an error message for failure. */ static const char * -parse_insn_normal (insn, strp, fields) - const CGEN_INSN * insn; - const char ** strp; - CGEN_FIELDS * fields; +parse_insn_normal (CGEN_CPU_DESC cd, + const CGEN_INSN *insn, + const char **strp, + CGEN_FIELDS *fields) { - const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn); - const char * str = *strp; - const char * errmsg; - const char * p; - const unsigned char * syn; + /* ??? Runtime added insns not handled yet. */ + const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); + const char *str = *strp; + const char *errmsg; + const char *p; + const CGEN_SYNTAX_CHAR_TYPE * syn; #ifdef CGEN_MNEMONIC_OPERANDS /* FIXME: wip */ int past_opcode_p; #endif /* For now we assume the mnemonic is first (there are no leading operands). - We can parse it without needing to set up operand parsing. */ + We can parse it without needing to set up operand parsing. + GAS's input scrubber will ensure mnemonics are lowercase, but we may + not be called from GAS. */ p = CGEN_INSN_MNEMONIC (insn); - while (* p && * p == * str) - ++ p, ++ str; - - if (* p || (* str && !isspace (* str))) + while (*p && TOLOWER (*p) == TOLOWER (*str)) + ++p, ++str; + + if (* p) + return _("unrecognized instruction"); + +#ifndef CGEN_MNEMONIC_OPERANDS + if (* str && ! ISSPACE (* str)) return _("unrecognized instruction"); +#endif - CGEN_INIT_PARSE (); - cgen_init_parse_operand (); + CGEN_INIT_PARSE (cd); + cgen_init_parse_operand (cd); #ifdef CGEN_MNEMONIC_OPERANDS past_opcode_p = 0; #endif /* We don't check for (*str != '\0') here because we want to parse any trailing fake arguments in the syntax string. */ - syn = CGEN_SYNTAX_STRING (CGEN_INSN_SYNTAX (insn)); + syn = CGEN_SYNTAX_STRING (syntax); /* Mnemonics come first for now, ensure valid string. */ if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) @@ -615,28 +541,47 @@ parse_insn_normal (insn, strp, fields) /* Non operand chars must match exactly. */ if (CGEN_SYNTAX_CHAR_P (* syn)) { - if (*str == CGEN_SYNTAX_CHAR (* syn)) + /* FIXME: While we allow for non-GAS callers above, we assume the + first char after the mnemonic part is a space. */ + /* FIXME: We also take inappropriate advantage of the fact that + GAS's input scrubber will remove extraneous blanks. */ + if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) { #ifdef CGEN_MNEMONIC_OPERANDS - if (* syn == ' ') + if (CGEN_SYNTAX_CHAR(* syn) == ' ') past_opcode_p = 1; #endif ++ syn; ++ str; } - else + else if (*str) { /* Syntax char didn't match. Can't be this insn. */ - /* FIXME: would like to return something like - "expected char `c'" */ - return _("syntax error"); + static char msg [80]; + + /* xgettext:c-format */ + sprintf (msg, _("syntax error (expected char `%c', found `%c')"), + CGEN_SYNTAX_CHAR(*syn), *str); + return msg; + } + else + { + /* Ran out of input. */ + static char msg [80]; + + /* xgettext:c-format */ + sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), + CGEN_SYNTAX_CHAR(*syn)); + return msg; } continue; } +#ifdef CGEN_MNEMONIC_OPERANDS + (void) past_opcode_p; +#endif /* We have an operand of some sort. */ - errmsg = m32r_cgen_parse_operand (CGEN_SYNTAX_FIELD (*syn), - &str, fields); + errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); if (errmsg) return errmsg; @@ -645,13 +590,13 @@ parse_insn_normal (insn, strp, fields) } /* If we're at the end of the syntax string, we're done. */ - if (* syn == '\0') + if (* syn == 0) { /* FIXME: For the moment we assume a valid `str' can only contain blanks now. IE: We needn't try again with a longer version of the insn and it is assumed that longer versions of insns appear before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ - while (isspace (* str)) + while (ISSPACE (* str)) ++ str; if (* str != '\0') @@ -661,186 +606,133 @@ parse_insn_normal (insn, strp, fields) } /* We couldn't parse it. */ - return "unrecognized instruction"; -} - -/* Default insn builder (insert handler). - The instruction is recorded in target byte order. - The result is an error message or NULL if success. */ -/* FIXME: change buffer to char *? */ - -static const char * -insert_insn_normal (insn, fields, buffer, pc) - const CGEN_INSN * insn; - CGEN_FIELDS * fields; - cgen_insn_t * buffer; - bfd_vma pc; -{ - const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn); - bfd_vma value; - const unsigned char * syn; - - CGEN_INIT_INSERT (); - value = CGEN_INSN_VALUE (insn); - - /* If we're recording insns as numbers (rather than a string of bytes), - target byte order handling is deferred until later. */ -#undef min -#define min(a,b) ((a) < (b) ? (a) : (b)) -#if 0 /*def CGEN_INT_INSN*/ - *buffer = value; -#else - switch (min (CGEN_BASE_INSN_BITSIZE, CGEN_FIELDS_BITSIZE (fields))) - { - case 8: - * buffer = value; - break; - case 16: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - bfd_putb16 (value, (char *) buffer); - else - bfd_putl16 (value, (char *) buffer); - break; - case 32: - if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) - bfd_putb32 (value, (char *) buffer); - else - bfd_putl32 (value, (char *) buffer); - break; - default: - abort (); - } -#endif - - /* ??? Rather than scanning the syntax string again, we could store - in `fields' a null terminated list of the fields that are present. */ - - for (syn = CGEN_SYNTAX_STRING (syntax); * syn != '\0'; ++ syn) - { - const char *errmsg; - - if (CGEN_SYNTAX_CHAR_P (* syn)) - continue; - - errmsg = m32r_cgen_insert_operand (CGEN_SYNTAX_FIELD (*syn), fields, - (char *) buffer, pc); - if (errmsg) - return errmsg; - } - - return NULL; + return _("unrecognized instruction"); } /* Main entry point. This routine is called for each instruction to be assembled. STR points to the insn to be assembled. We assume all necessary tables have been initialized. - The assembled instruction, less any fixups, is stored in buf. - [??? What byte order?] + The assembled instruction, less any fixups, is stored in BUF. + Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value + still needs to be converted to target byte order, otherwise BUF is an array + of bytes in target byte order. The result is a pointer to the insn's entry in the opcode table, or NULL if an error occured (an error message will have already been printed). Note that when processing (non-alias) macro-insns, - this function recurses. */ + this function recurses. + + ??? It's possible to make this cpu-independent. + One would have to deal with a few minor things. + At this point in time doing so would be more of a curiosity than useful + [for example this file isn't _that_ big], but keeping the possibility in + mind helps keep the design clean. */ const CGEN_INSN * -m32r_cgen_assemble_insn (str, fields, buf, errmsg) - const char * str; - CGEN_FIELDS * fields; - cgen_insn_t * buf; - char ** errmsg; +m32r_cgen_assemble_insn (CGEN_CPU_DESC cd, + const char *str, + CGEN_FIELDS *fields, + CGEN_INSN_BYTES_PTR buf, + char **errmsg) { - const char * start; - CGEN_INSN_LIST * ilist; + const char *start; + CGEN_INSN_LIST *ilist; + const char *parse_errmsg = NULL; + const char *insert_errmsg = NULL; + int recognized_mnemonic = 0; /* Skip leading white space. */ - while (isspace (* str)) + while (ISSPACE (* str)) ++ str; /* The instructions are stored in hashed lists. Get the first in the list. */ - ilist = CGEN_ASM_LOOKUP_INSN (str); + ilist = CGEN_ASM_LOOKUP_INSN (cd, str); /* Keep looking until we find a match. */ - start = str; for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) { const CGEN_INSN *insn = ilist->insn; + recognized_mnemonic = 1; -#if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */ +#ifdef CGEN_VALIDATE_INSN_SUPPORTED + /* Not usually needed as unsupported opcodes + shouldn't be in the hash lists. */ /* Is this insn supported by the selected cpu? */ - if (! m32r_cgen_insn_supported (insn)) + if (! m32r_cgen_insn_supported (cd, insn)) continue; #endif - - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; - /* Record a default length for the insn. This will get set to the - correct value while parsing. */ - /* FIXME: wip */ + /* Skip this insn if str doesn't look right lexically. */ + if (CGEN_INSN_RX (insn) != NULL && + regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) + continue; + + /* Allow parse/insert handlers to obtain length of insn. */ CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); - if (! CGEN_PARSE_FN (insn) (insn, & str, fields)) - { - /* ??? 0 is passed for `pc' */ - if (CGEN_INSERT_FN (insn) (insn, fields, buf, (bfd_vma) 0) != NULL) - continue; - /* It is up to the caller to actually output the insn and any - queued relocs. */ - return insn; - } + parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); + if (parse_errmsg != NULL) + continue; + + /* ??? 0 is passed for `pc'. */ + insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, + (bfd_vma) 0); + if (insert_errmsg != NULL) + continue; - /* Try the next entry. */ + /* It is up to the caller to actually output the insn and any + queued relocs. */ + return insn; } - /* FIXME: We can return a better error message than this. - Need to track why it failed and pick the right one. */ { - static char errbuf[100]; - if (strlen (start) > 50) - /* xgettext:c-format */ - sprintf (errbuf, _("bad instruction `%.50s...'"), start); - else - /* xgettext:c-format */ - sprintf (errbuf, _("bad instruction `%.50s'"), start); - + static char errbuf[150]; + const char *tmp_errmsg; +#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS +#define be_verbose 1 +#else +#define be_verbose 0 +#endif + + if (be_verbose) + { + /* If requesting verbose error messages, use insert_errmsg. + Failing that, use parse_errmsg. */ + tmp_errmsg = (insert_errmsg ? insert_errmsg : + parse_errmsg ? parse_errmsg : + recognized_mnemonic ? + _("unrecognized form of instruction") : + _("unrecognized instruction")); + + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); + else + /* xgettext:c-format */ + sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); + } + else + { + if (strlen (start) > 50) + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s...'"), start); + else + /* xgettext:c-format */ + sprintf (errbuf, _("bad instruction `%.50s'"), start); + } + *errmsg = errbuf; return NULL; } } - -#if 0 /* This calls back to GAS which we can't do without care. */ - -/* Record each member of OPVALS in the assembler's symbol table. - This lets GAS parse registers for us. - ??? Interesting idea but not currently used. */ - -/* Record each member of OPVALS in the assembler's symbol table. - FIXME: Not currently used. */ - -void -m32r_cgen_asm_hash_keywords (opvals) - CGEN_KEYWORD * opvals; -{ - CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); - const CGEN_KEYWORD_ENTRY * ke; - - while ((ke = cgen_keyword_search_next (& search)) != NULL) - { -#if 0 /* Unnecessary, should be done in the search routine. */ - if (! m32r_cgen_opval_supported (ke)) - continue; -#endif - cgen_asm_record_register (ke->name, ke->value); - } -} - -#endif /* 0 */