X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fm32r-dis.c;h=59402220f93955ab3992a05b859bc4341a93b59b;hb=acdf84a65400f416c60a0c9c14953ba5a73fb0cd;hp=62ad5447f5f824aecea75ca1024f083930f99127;hpb=33b71eeb2e25ed4cb83a1fe43cc3d0625dd51e40;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index 62ad5447f5..59402220f9 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -1,27 +1,27 @@ +/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ /* Disassembler interface for targets using CGEN. -*- C -*- CGEN: Cpu tools GENerator -THIS FILE IS MACHINE GENERATED WITH CGEN. -- the resultant file is machine generated, cgen-dis.in isn't + THIS FILE IS MACHINE GENERATED WITH CGEN. + - the resultant file is machine generated, cgen-dis.in isn't -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005 -Free Software Foundation, Inc. + Copyright (C) 1996-2020 Free Software Foundation, Inc. -This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ /* ??? Eventually more and more of this stuff can go to cpu-independent files. Keep that in mind. */ @@ -29,7 +29,7 @@ along with this program; if not, write to the Free Software Foundation, Inc., #include "sysdep.h" #include #include "ansidecl.h" -#include "dis-asm.h" +#include "disassemble.h" #include "bfd.h" #include "symcat.h" #include "libiberty.h" @@ -56,34 +56,54 @@ static int read_insn (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, unsigned long *); -/* -- disassembler routines inserted here */ +/* -- disassembler routines inserted here. */ /* -- dis.c */ -static void print_hash PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); -static int my_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); -/* Immediate values are prefixed with '#'. */ +/* Print signed operands with '#' prefixes. */ -#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \ - do \ - { \ - if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \ - (*info->fprintf_func) (info->stream, "#"); \ - } \ - while (0) +static void +print_signed_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + (*info->fprintf_func) (info->stream, "#"); + (*info->fprintf_func) (info->stream, "%ld", value); +} + +/* Print unsigned operands with '#' prefixes. */ + +static void +print_unsigned_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + (*info->fprintf_func) (info->stream, "#"); + (*info->fprintf_func) (info->stream, "0x%lx", value); +} /* Handle '#' prefixes as operands. */ static void -print_hash (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; - PTR dis_info; - long value ATTRIBUTE_UNUSED; - unsigned int attrs ATTRIBUTE_UNUSED; - bfd_vma pc ATTRIBUTE_UNUSED; - int length ATTRIBUTE_UNUSED; +print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value ATTRIBUTE_UNUSED, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) { disassemble_info *info = (disassemble_info *) dis_info; + (*info->fprintf_func) (info->stream, "#"); } @@ -91,10 +111,9 @@ print_hash (cd, dis_info, value, attrs, pc, length) #define CGEN_PRINT_INSN my_print_insn static int -my_print_insn (cd, pc, info) - CGEN_CPU_DESC cd; - bfd_vma pc; - disassemble_info *info; +my_print_insn (CGEN_CPU_DESC cd, + bfd_vma pc, + disassemble_info *info) { bfd_byte buffer[CGEN_MAX_INSN_SIZE]; bfd_byte *buf = buffer; @@ -106,7 +125,7 @@ my_print_insn (cd, pc, info) /* Read the base part of the insn. */ status = (*info->read_memory_func) (pc - ((!big_p && (pc & 3) != 0) ? 2 : 0), - buf, buflen, info); + buf, buflen, info); if (status != 0) { (*info->memory_error_func) (status, pc, info); @@ -149,8 +168,7 @@ my_print_insn (cd, pc, info) /* -- */ void m32r_cgen_print_operand - PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, - void const *, bfd_vma, int)); + (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); /* Main entry point for printing operands. XINFO is a `void *' and not a `disassemble_info *' to not put a requirement @@ -168,16 +186,15 @@ void m32r_cgen_print_operand the handlers. */ void -m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) - CGEN_CPU_DESC cd; - int opindex; - PTR xinfo; - CGEN_FIELDS *fields; - void const *attrs ATTRIBUTE_UNUSED; - bfd_vma pc; - int length; +m32r_cgen_print_operand (CGEN_CPU_DESC cd, + int opindex, + void * xinfo, + CGEN_FIELDS *fields, + void const *attrs ATTRIBUTE_UNUSED, + bfd_vma pc, + int length) { - disassemble_info *info = (disassemble_info *) xinfo; + disassemble_info *info = (disassemble_info *) xinfo; switch (opindex) { @@ -212,16 +229,16 @@ m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) print_normal (cd, info, fields->f_hi16, 0|(1<f_imm1, 0|(1<f_imm1, 0, pc, length); break; case M32R_OPERAND_SCR : print_keyword (cd, info, & m32r_cgen_opval_cr_names, fields->f_r2, 0); break; case M32R_OPERAND_SIMM16 : - print_normal (cd, info, fields->f_simm16, 0|(1<f_simm16, 0|(1<f_simm8, 0|(1<f_simm8, 0|(1<f_simm16, 0|(1<f_r2, 0); break; case M32R_OPERAND_UIMM16 : - print_normal (cd, info, fields->f_uimm16, 0|(1<f_uimm16, 0, pc, length); break; case M32R_OPERAND_UIMM24 : - print_address (cd, info, fields->f_uimm24, 0|(1<f_uimm24, 0|(1<f_uimm3, 0|(1<f_uimm3, 0, pc, length); break; case M32R_OPERAND_UIMM4 : - print_normal (cd, info, fields->f_uimm4, 0|(1<f_uimm4, 0, pc, length); break; case M32R_OPERAND_UIMM5 : - print_normal (cd, info, fields->f_uimm5, 0|(1<f_uimm5, 0, pc, length); break; case M32R_OPERAND_UIMM8 : - print_normal (cd, info, fields->f_uimm8, 0|(1<f_uimm8, 0, pc, length); break; case M32R_OPERAND_ULO16 : print_normal (cd, info, fields->f_uimm16, 0, pc, length); @@ -259,21 +276,21 @@ m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) default : /* xgettext:c-format */ - fprintf (stderr, _("Unrecognized field %d while printing insn.\n"), - opindex); - abort (); + opcodes_error_handler + (_("internal error: unrecognized field %d while printing insn"), + opindex); + abort (); } } -cgen_print_fn * const m32r_cgen_print_handlers[] = +cgen_print_fn * const m32r_cgen_print_handlers[] = { print_insn_normal, }; void -m32r_cgen_init_dis (cd) - CGEN_CPU_DESC cd; +m32r_cgen_init_dis (CGEN_CPU_DESC cd) { m32r_cgen_init_opcode_table (cd); m32r_cgen_init_ibld_table (cd); @@ -294,10 +311,6 @@ print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -319,13 +332,9 @@ print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) - ; /* nothing to do */ + ; /* Nothing to do. */ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) (*info->print_address_func) (value, info); else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) @@ -407,6 +416,7 @@ read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, unsigned long *insn_value) { int status = (*info->read_memory_func) (pc, buf, buflen, info); + if (status != 0) { (*info->memory_error_func) (status, pc, info); @@ -463,7 +473,7 @@ print_insn (CGEN_CPU_DESC cd, int length; unsigned long insn_value_cropped; -#ifdef CGEN_VALIDATE_INSN_SUPPORTED +#ifdef CGEN_VALIDATE_INSN_SUPPORTED /* Not needed as insn shouldn't be in hash lists if not supported. */ /* Supported by this cpu? */ if (! m32r_cgen_insn_supported (cd, insn)) @@ -481,7 +491,7 @@ print_insn (CGEN_CPU_DESC cd, relevant part from the buffer. */ if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) - insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), + insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), info->endian == BFD_ENDIAN_BIG); else insn_value_cropped = insn_value; @@ -511,13 +521,13 @@ print_insn (CGEN_CPU_DESC cd, length = CGEN_EXTRACT_FN (cd, insn) (cd, insn, &ex_info, insn_value_cropped, &fields, pc); - /* length < 0 -> error */ + /* Length < 0 -> error. */ if (length < 0) return length; if (length > 0) { CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); - /* length is in bits, result is in bytes */ + /* Length is in bits, result is in bytes. */ return length / 8; } } @@ -567,9 +577,10 @@ default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) Print one instruction from PC on INFO->STREAM. Return the size of the instruction (in bytes). */ -typedef struct cpu_desc_list { +typedef struct cpu_desc_list +{ struct cpu_desc_list *next; - int isa; + CGEN_BITSET *isa; int mach; int endian; CGEN_CPU_DESC cd; @@ -581,11 +592,12 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) static cpu_desc_list *cd_list = 0; cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -598,7 +610,7 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) arch = info->arch; if (arch == bfd_arch_unknown) arch = CGEN_BFD_ARCH; - + /* There's no standard way to compute the machine or isa number so we leave it to the target. */ #ifdef CGEN_COMPUTE_MACH @@ -608,29 +620,38 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else - isa = info->insn_sets; + isa = info->private_data; #endif /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { cd = 0; for (cl = cd_list; cl; cl = cl->next) { - if (cl->isa == isa && + if (cgen_bitset_compare (cl->isa, isa) == 0 && cl->mach == mach && cl->endian == endian) { cd = cl->cd; + prev_isa = cd->isas; break; } } - } + } /* If we haven't initialized yet, initialize the opcode table. */ if (! cd) @@ -642,7 +663,7 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = m32r_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -652,10 +673,10 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info) if (!cd) abort (); - /* save this away for future reference */ + /* Save this away for future reference. */ cl = xmalloc (sizeof (struct cpu_desc_list)); cl->cd = cd; - cl->isa = isa; + cl->isa = prev_isa; cl->mach = mach; cl->endian = endian; cl->next = cd_list;