X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fmcore-opc.h;h=1160e07269189d7184491319efdcf00aa2c00b97;hb=301a9420d947da145884261ac31a7a52438c2894;hp=f3d2c373c1e6e020a7ca3251b4ff04325e8c9355;hpb=b90efa5b79ac1524ec260f8eb89d1be37e0219a7;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/mcore-opc.h b/opcodes/mcore-opc.h
index f3d2c373c1..1160e07269 100644
--- a/opcodes/mcore-opc.h
+++ b/opcodes/mcore-opc.h
@@ -1,5 +1,5 @@
 /* Assembler instructions for Motorola's Mcore processor
-   Copyright (C) 1999-2015 Free Software Foundation, Inc.
+   Copyright (C) 1999-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -33,7 +33,7 @@ mcore_opclass;
 
 typedef struct inst
 {
-  char *         name;
+  const char *   name;
   mcore_opclass  opclass;
   unsigned char  transfer;
   unsigned short inst;
@@ -128,14 +128,14 @@ const mcore_opcode_info mcore_table[] =
   { "cmpnei",	OB,	0,	0x2A00 },
   { "bmaski",	OMa,	0,	0x2C00 },
   { "divu",	O1R1,	0,	0x2C10 },
-/* SPACE:                       0x2c20 - 0x2c7f */  
+/* SPACE:                       0x2c20 - 0x2c7f */
   { "bmaski",	OMb,	0,	0x2C80 },
   { "bmaski",	OMc,	0,	0x2D00 },
   { "andi",	OB,	0,	0x2E00 },
   { "bclri",	OB,	0,	0x3000 },
 /* SPACE:                       0x3200 - 0x320f */
   { "divs",	O1R1,	0,	0x3210 },
-/* SPACE:                       0x3220 - 0x326f */  
+/* SPACE:                       0x3220 - 0x326f */
   { "bgeni",	OBRa,	0,	0x3270 },
   { "bgeni",	OBRb,	0,	0x3280 },
   { "bgeni",	OBRc,	0,	0x3300 },
@@ -206,6 +206,5 @@ const mcore_opcode_info mcore_table[] =
   { "rori",	RSI,	0,	0x3800 },
   { "rotri",	RSI,    0,	0x3800 },
   { "nop",	O0,     0,	0x1200 },  /* mov r0, r0 */
-  { 0,		0,	0,      0 }
 };
 #endif