X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fopenrisc-dis.c;h=2c442f964a2493a35a97f3e94fd0dec01db79880;hb=0e8aefe7f01abedbb2e011e8b451ac6cfbc61ffe;hp=726b301d1da7fb7fb358e83dc797deab22824b05;hpb=87e6d782173c2d21d5f7ee1510a3b4f27a1fe68e;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/openrisc-dis.c b/opcodes/openrisc-dis.c index 726b301d1d..2c442f964a 100644 --- a/opcodes/openrisc-dis.c +++ b/opcodes/openrisc-dis.c @@ -1,26 +1,27 @@ /* Disassembler interface for targets using CGEN. -*- C -*- CGEN: Cpu tools GENerator -THIS FILE IS MACHINE GENERATED WITH CGEN. -- the resultant file is machine generated, cgen-dis.in isn't + THIS FILE IS MACHINE GENERATED WITH CGEN. + - the resultant file is machine generated, cgen-dis.in isn't -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007, + 2008, 2010 Free Software Foundation, Inc. -This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ /* ??? Eventually more and more of this stuff can go to cpu-independent files. Keep that in mind. */ @@ -31,6 +32,7 @@ along with this program; if not, write to the Free Software Foundation, Inc., #include "dis-asm.h" #include "bfd.h" #include "symcat.h" +#include "libiberty.h" #include "openrisc-desc.h" #include "openrisc-opc.h" #include "opintl.h" @@ -39,22 +41,27 @@ along with this program; if not, write to the Free Software Foundation, Inc., #define UNKNOWN_INSN_MSG _("*unknown*") static void print_normal - PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int)); + (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); static void print_address - PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int)); + (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED; static void print_keyword - PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int)); + (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED; static void print_insn_normal - PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, - bfd_vma, int)); -static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, - disassemble_info *, char *, int)); + (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); +static int print_insn + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); static int default_print_insn - PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); + (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; +static int read_insn + (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, + unsigned long *); -/* -- disassembler routines inserted here */ +/* -- disassembler routines inserted here. */ +void openrisc_cgen_print_operand + (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); + /* Main entry point for printing operands. XINFO is a `void *' and not a `disassemble_info *' to not put a requirement of dis-asm.h on cgen.h. @@ -68,20 +75,18 @@ static int default_print_insn This function could be moved into `print_insn_normal', but keeping it separate makes clear the interface between `print_insn_normal' and each of - the handlers. -*/ + the handlers. */ void -openrisc_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) - CGEN_CPU_DESC cd; - int opindex; - PTR xinfo; - CGEN_FIELDS *fields; - void const *attrs; - bfd_vma pc; - int length; +openrisc_cgen_print_operand (CGEN_CPU_DESC cd, + int opindex, + void * xinfo, + CGEN_FIELDS *fields, + void const *attrs ATTRIBUTE_UNUSED, + bfd_vma pc, + int length) { - disassemble_info *info = (disassemble_info *) xinfo; + disassemble_info *info = (disassemble_info *) xinfo; switch (opindex) { @@ -140,8 +145,7 @@ cgen_print_fn * const openrisc_cgen_print_handlers[] = void -openrisc_cgen_init_dis (cd) - CGEN_CPU_DESC cd; +openrisc_cgen_init_dis (CGEN_CPU_DESC cd) { openrisc_cgen_init_opcode_table (cd); openrisc_cgen_init_ibld_table (cd); @@ -153,29 +157,15 @@ openrisc_cgen_init_dis (cd) /* Default print handler. */ static void -print_normal (cd, dis_info, value, attrs, pc, length) -#ifdef CGEN_PRINT_NORMAL - CGEN_CPU_DESC cd; -#else - CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; -#endif - PTR dis_info; - long value; - unsigned int attrs; -#ifdef CGEN_PRINT_NORMAL - bfd_vma pc; - int length; -#else - bfd_vma pc ATTRIBUTE_UNUSED; - int length ATTRIBUTE_UNUSED; -#endif +print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void *dis_info, + long value, + unsigned int attrs, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_NORMAL - CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) ; /* nothing to do */ @@ -188,32 +178,18 @@ print_normal (cd, dis_info, value, attrs, pc, length) /* Default address handler. */ static void -print_address (cd, dis_info, value, attrs, pc, length) -#ifdef CGEN_PRINT_NORMAL - CGEN_CPU_DESC cd; -#else - CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; -#endif - PTR dis_info; - bfd_vma value; - unsigned int attrs; -#ifdef CGEN_PRINT_NORMAL - bfd_vma pc; - int length; -#else - bfd_vma pc ATTRIBUTE_UNUSED; - int length ATTRIBUTE_UNUSED; -#endif +print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void *dis_info, + bfd_vma value, + unsigned int attrs, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) { disassemble_info *info = (disassemble_info *) dis_info; -#ifdef CGEN_PRINT_ADDRESS - CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length); -#endif - /* Print the operand as directed by the attributes. */ if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) - ; /* nothing to do */ + ; /* Nothing to do. */ else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) (*info->print_address_func) (value, info); else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) @@ -227,12 +203,11 @@ print_address (cd, dis_info, value, attrs, pc, length) /* Keyword print handler. */ static void -print_keyword (cd, dis_info, keyword_table, value, attrs) - CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; - PTR dis_info; - CGEN_KEYWORD *keyword_table; - long value; - unsigned int attrs ATTRIBUTE_UNUSED; +print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void *dis_info, + CGEN_KEYWORD *keyword_table, + long value, + unsigned int attrs ATTRIBUTE_UNUSED) { disassemble_info *info = (disassemble_info *) dis_info; const CGEN_KEYWORD_ENTRY *ke; @@ -246,17 +221,16 @@ print_keyword (cd, dis_info, keyword_table, value, attrs) /* Default insn printer. - DIS_INFO is defined as `PTR' so the disassembler needn't know anything + DIS_INFO is defined as `void *' so the disassembler needn't know anything about disassemble_info. */ static void -print_insn_normal (cd, dis_info, insn, fields, pc, length) - CGEN_CPU_DESC cd; - PTR dis_info; - const CGEN_INSN *insn; - CGEN_FIELDS *fields; - bfd_vma pc; - int length; +print_insn_normal (CGEN_CPU_DESC cd, + void *dis_info, + const CGEN_INSN *insn, + CGEN_FIELDS *fields, + bfd_vma pc, + int length) { const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); disassemble_info *info = (disassemble_info *) dis_info; @@ -286,17 +260,18 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length) /* Subroutine of print_insn. Reads an insn into the given buffers and updates the extract info. Returns 0 if all is well, non-zero otherwise. */ + static int -read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) - CGEN_CPU_DESC cd; - bfd_vma pc; - disassemble_info *info; - char *buf; - int buflen; - CGEN_EXTRACT_INFO *ex_info; - unsigned long *insn_value; +read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + bfd_vma pc, + disassemble_info *info, + bfd_byte *buf, + int buflen, + CGEN_EXTRACT_INFO *ex_info, + unsigned long *insn_value) { int status = (*info->read_memory_func) (pc, buf, buflen, info); + if (status != 0) { (*info->memory_error_func) (status, pc, info); @@ -318,33 +293,43 @@ read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) been called). */ static int -print_insn (cd, pc, info, buf, buflen) - CGEN_CPU_DESC cd; - bfd_vma pc; - disassemble_info *info; - char *buf; - int buflen; +print_insn (CGEN_CPU_DESC cd, + bfd_vma pc, + disassemble_info *info, + bfd_byte *buf, + unsigned int buflen) { - unsigned long insn_value; + CGEN_INSN_INT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; + int basesize; + + /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ + basesize = cd->base_insn_bitsize < buflen * 8 ? + cd->base_insn_bitsize : buflen * 8; + insn_value = cgen_get_insn_value (cd, buf, basesize); - int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value); - if (rc != 0) - return rc; + + /* Fill in ex_info fields like read_insn would. Don't actually call + read_insn, since the incoming buffer is already read (and possibly + modified a la m32r). */ + ex_info.valid = (1 << buflen) - 1; + ex_info.dis_info = info; + ex_info.insn_bytes = buf; /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ - insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value); + insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); while (insn_list != NULL) { const CGEN_INSN *insn = insn_list->insn; CGEN_FIELDS fields; int length; + unsigned long insn_value_cropped; #ifdef CGEN_VALIDATE_INSN_SUPPORTED - /* not needed as insn shouldn't be in hash lists if not supported */ + /* Not needed as insn shouldn't be in hash lists if not supported. */ /* Supported by this cpu? */ if (! openrisc_cgen_insn_supported (cd, insn)) { @@ -356,7 +341,17 @@ print_insn (cd, pc, info, buf, buflen) /* Basic bit mask must be correct. */ /* ??? May wish to allow target to defer this check until the extract handler. */ - if ((insn_value & CGEN_INSN_BASE_MASK (insn)) + + /* Base size may exceed this instruction's size. Extract the + relevant part from the buffer. */ + if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && + (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) + insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), + info->endian == BFD_ENDIAN_BIG); + else + insn_value_cropped = insn_value; + + if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) == CGEN_INSN_BASE_VALUE (insn)) { /* Printing is handled in two passes. The first pass parses the @@ -365,8 +360,8 @@ print_insn (cd, pc, info, buf, buflen) /* Make sure the entire insn is loaded into insn_value, if it can fit. */ - if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize && - (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) + if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && + (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) { unsigned long full_insn_value; int rc = read_insn (cd, pc, info, buf, @@ -379,15 +374,15 @@ print_insn (cd, pc, info, buf, buflen) } else length = CGEN_EXTRACT_FN (cd, insn) - (cd, insn, &ex_info, insn_value, &fields, pc); + (cd, insn, &ex_info, insn_value_cropped, &fields, pc); - /* length < 0 -> error */ + /* Length < 0 -> error. */ if (length < 0) return length; if (length > 0) { CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); - /* length is in bits, result is in bytes */ + /* Length is in bits, result is in bytes. */ return length / 8; } } @@ -407,41 +402,57 @@ print_insn (cd, pc, info, buf, buflen) #endif static int -default_print_insn (cd, pc, info) - CGEN_CPU_DESC cd; - bfd_vma pc; - disassemble_info *info; +default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) { - char buf[CGEN_MAX_INSN_SIZE]; + bfd_byte buf[CGEN_MAX_INSN_SIZE]; + int buflen; int status; - /* Read the base part of the insn. */ + /* Attempt to read the base part of the insn. */ + buflen = cd->base_insn_bitsize / 8; + status = (*info->read_memory_func) (pc, buf, buflen, info); + + /* Try again with the minimum part, if min < base. */ + if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) + { + buflen = cd->min_insn_bitsize / 8; + status = (*info->read_memory_func) (pc, buf, buflen, info); + } - status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info); if (status != 0) { (*info->memory_error_func) (status, pc, info); return -1; } - return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8); + return print_insn (cd, pc, info, buf, buflen); } /* Main entry point. Print one instruction from PC on INFO->STREAM. Return the size of the instruction (in bytes). */ +typedef struct cpu_desc_list +{ + struct cpu_desc_list *next; + CGEN_BITSET *isa; + int mach; + int endian; + CGEN_CPU_DESC cd; +} cpu_desc_list; + int -print_insn_openrisc (pc, info) - bfd_vma pc; - disassemble_info *info; +print_insn_openrisc (bfd_vma pc, disassemble_info *info) { + static cpu_desc_list *cd_list = 0; + cpu_desc_list *cl = 0; static CGEN_CPU_DESC cd = 0; - static int prev_isa; + static CGEN_BITSET *prev_isa; static int prev_mach; static int prev_endian; int length; - int isa,mach; + CGEN_BITSET *isa; + int mach; int endian = (info->endian == BFD_ENDIAN_BIG ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE); @@ -464,20 +475,38 @@ print_insn_openrisc (pc, info) #endif #ifdef CGEN_COMPUTE_ISA - isa = CGEN_COMPUTE_ISA (info); + { + static CGEN_BITSET *permanent_isa; + + if (!permanent_isa) + permanent_isa = cgen_bitset_create (MAX_ISAS); + isa = permanent_isa; + cgen_bitset_clear (isa); + cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); + } #else - isa = 0; + isa = info->insn_sets; #endif - /* If we've switched cpu's, close the current table and open a new one. */ + /* If we've switched cpu's, try to find a handle we've used before */ if (cd - && (isa != prev_isa + && (cgen_bitset_compare (isa, prev_isa) != 0 || mach != prev_mach || endian != prev_endian)) { - openrisc_cgen_cpu_close (cd); cd = 0; - } + for (cl = cd_list; cl; cl = cl->next) + { + if (cgen_bitset_compare (cl->isa, isa) == 0 && + cl->mach == mach && + cl->endian == endian) + { + cd = cl->cd; + prev_isa = cd->isas; + break; + } + } + } /* If we haven't initialized yet, initialize the opcode table. */ if (! cd) @@ -489,7 +518,7 @@ print_insn_openrisc (pc, info) abort (); mach_name = arch_type->printable_name; - prev_isa = isa; + prev_isa = cgen_bitset_copy (isa); prev_mach = mach; prev_endian = endian; cd = openrisc_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, @@ -498,6 +527,16 @@ print_insn_openrisc (pc, info) CGEN_CPU_OPEN_END); if (!cd) abort (); + + /* Save this away for future reference. */ + cl = xmalloc (sizeof (struct cpu_desc_list)); + cl->cd = cd; + cl->isa = prev_isa; + cl->mach = mach; + cl->endian = endian; + cl->next = cd_list; + cd_list = cl; + openrisc_cgen_init_dis (cd); }