X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2For1k-dis.c;h=dcb02c08ca57a05a7c47da99ad2be3b255f163a1;hb=refs%2Fheads%2Fconcurrent-displaced-stepping-2020-04-01;hp=c4ea4633453e279abf950fcb18ba1f01ed35e3b4;hpb=b90efa5b79ac1524ec260f8eb89d1be37e0219a7;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c index c4ea463345..dcb02c08ca 100644 --- a/opcodes/or1k-dis.c +++ b/opcodes/or1k-dis.c @@ -1,10 +1,11 @@ +/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ /* Disassembler interface for targets using CGEN. -*- C -*- CGEN: Cpu tools GENerator THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-dis.in isn't - Copyright (C) 1996-2015 Free Software Foundation, Inc. + Copyright (C) 1996-2020 Free Software Foundation, Inc. This file is part of libopcodes. @@ -28,7 +29,7 @@ #include "sysdep.h" #include #include "ansidecl.h" -#include "dis-asm.h" +#include "disassemble.h" #include "bfd.h" #include "symcat.h" #include "libiberty.h" @@ -57,6 +58,27 @@ static int read_insn /* -- disassembler routines inserted here. */ +/* -- dis.c */ + +static void +print_regpair (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = dis_info; + char reg1_index; + char reg2_index; + + reg1_index = value & 0x1f; + reg2_index = reg1_index + ((value & (1 << 5)) ? 2 : 1); + + (*info->fprintf_func) (info->stream, "r%d,r%d", reg1_index, reg2_index); +} + +/* -- */ void or1k_cgen_print_operand (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); @@ -89,14 +111,20 @@ or1k_cgen_print_operand (CGEN_CPU_DESC cd, switch (opindex) { + case OR1K_OPERAND_DISP21 : + print_address (cd, info, fields->f_disp21, 0|(1<f_disp26, 0|(1<f_r2, 0); break; - case OR1K_OPERAND_RADF : - print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0); + case OR1K_OPERAND_RAD32F : + print_regpair (cd, info, fields->f_rad32, 0|(1<f_rad32, 0|(1<f_r2, 0); @@ -104,8 +132,11 @@ or1k_cgen_print_operand (CGEN_CPU_DESC cd, case OR1K_OPERAND_RB : print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r3, 0); break; - case OR1K_OPERAND_RBDF : - print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0); + case OR1K_OPERAND_RBD32F : + print_regpair (cd, info, fields->f_rbd32, 0|(1<f_rbd32, 0|(1<f_r3, 0); @@ -113,8 +144,11 @@ or1k_cgen_print_operand (CGEN_CPU_DESC cd, case OR1K_OPERAND_RD : print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r1, 0); break; - case OR1K_OPERAND_RDDF : - print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0); + case OR1K_OPERAND_RDD32F : + print_regpair (cd, info, fields->f_rdd32, 0|(1<f_rdd32, 0|(1<f_r1, 0); @@ -137,13 +171,14 @@ or1k_cgen_print_operand (CGEN_CPU_DESC cd, default : /* xgettext:c-format */ - fprintf (stderr, _("Unrecognized field %d while printing insn.\n"), - opindex); - abort (); + opcodes_error_handler + (_("internal error: unrecognized field %d while printing insn"), + opindex); + abort (); } } -cgen_print_fn * const or1k_cgen_print_handlers[] = +cgen_print_fn * const or1k_cgen_print_handlers[] = { print_insn_normal, }; @@ -333,7 +368,7 @@ print_insn (CGEN_CPU_DESC cd, int length; unsigned long insn_value_cropped; -#ifdef CGEN_VALIDATE_INSN_SUPPORTED +#ifdef CGEN_VALIDATE_INSN_SUPPORTED /* Not needed as insn shouldn't be in hash lists if not supported. */ /* Supported by this cpu? */ if (! or1k_cgen_insn_supported (cd, insn)) @@ -351,7 +386,7 @@ print_insn (CGEN_CPU_DESC cd, relevant part from the buffer. */ if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) - insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), + insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), info->endian == BFD_ENDIAN_BIG); else insn_value_cropped = insn_value; @@ -470,7 +505,7 @@ print_insn_or1k (bfd_vma pc, disassemble_info *info) arch = info->arch; if (arch == bfd_arch_unknown) arch = CGEN_BFD_ARCH; - + /* There's no standard way to compute the machine or isa number so we leave it to the target. */ #ifdef CGEN_COMPUTE_MACH @@ -490,7 +525,7 @@ print_insn_or1k (bfd_vma pc, disassemble_info *info) cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); } #else - isa = info->insn_sets; + isa = info->private_data; #endif /* If we've switched cpu's, try to find a handle we've used before */ @@ -511,7 +546,7 @@ print_insn_or1k (bfd_vma pc, disassemble_info *info) break; } } - } + } /* If we haven't initialized yet, initialize the opcode table. */ if (! cd)