X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Friscv-dis.c;h=40893c3dcb013eef4f067a300af136e013a4ef6f;hb=b61121178ec07f9da1242e439fe1a23a314ad30e;hp=5b29d62a8c426454452557f8cddb213f5af9118f;hpb=eb41b24898e9858852c98f9275e7a4adee860d7b;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c index 5b29d62a8c..40893c3dcb 100644 --- a/opcodes/riscv-dis.c +++ b/opcodes/riscv-dis.c @@ -1,5 +1,5 @@ /* RISC-V disassembler - Copyright (C) 2011-2018 Free Software Foundation, Inc. + Copyright (C) 2011-2019 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). Based on MIPS target. @@ -28,7 +28,7 @@ #include "elf-bfd.h" #include "elf/riscv.h" -#include +#include "bfd_stdint.h" #include struct riscv_private_data @@ -395,9 +395,13 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info) insnlen = riscv_insn_length (word); + /* RISC-V instructions are always little-endian. */ + info->endian_code = BFD_ENDIAN_LITTLE; + info->bytes_per_chunk = insnlen % 4 == 0 ? 4 : 2; info->bytes_per_line = 8; - info->display_endian = info->endian; + /* We don't support constant pools, so this must be code. */ + info->display_endian = info->endian_code; info->insn_info_valid = 1; info->branch_delay_insns = 0; info->data_size = 0; @@ -408,7 +412,7 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info) op = riscv_hash[OP_HASH_IDX (word)]; if (op != NULL) { - int xlen = 0; + unsigned xlen = 0; /* If XLEN is not known, get its value from the ELF class. */ if (info->mach == bfd_mach_riscv64) @@ -430,7 +434,7 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info) if (no_aliases && (op->pinfo & INSN_ALIAS)) continue; /* Is this instruction restricted to a certain value of XLEN? */ - if (isdigit (op->subset[0]) && atoi (op->subset) != xlen) + if ((op->xlen_requirement != 0) && (op->xlen_requirement != xlen)) continue; /* It's a match. */ @@ -518,6 +522,23 @@ print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info) return riscv_disassemble_insn (memaddr, insn, info); } +/* Prevent use of the fake labels that are generated as part of the DWARF + and for relaxable relocations in the assembler. */ + +bfd_boolean +riscv_symbol_is_valid (asymbol * sym, + struct disassemble_info * info ATTRIBUTE_UNUSED) +{ + const char * name; + + if (sym == NULL) + return FALSE; + + name = bfd_asymbol_name (sym); + + return (strcmp (name, RISCV_FAKE_LABEL_NAME) != 0); +} + void print_riscv_disassembler_options (FILE *stream) {