X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fspu-dis.c;h=3e6a7620f2c3be09921f9d66b8a48ff479471d18;hb=91d6fa6a035cc7d0b7be5c99c194a64cb80924b0;hp=eae950323b019ceaec5d050ddeaa2e633f0cd8c3;hpb=01fe1b4183324882e88e8c64748bffdc69ea3a9c;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/spu-dis.c b/opcodes/spu-dis.c
index eae950323b..3e6a7620f2 100644
--- a/opcodes/spu-dis.c
+++ b/opcodes/spu-dis.c
@@ -53,7 +53,7 @@ init_spu_disassemble (void)
 static const struct spu_opcode *
 get_index_for_opcode (unsigned int insn)
 {
-  const struct spu_opcode *index;
+  const struct spu_opcode *op_index;
   unsigned int opcode = insn >> (32-11);
 
   /* Init the table.  This assumes that element 0/opcode 0 (currently
@@ -61,28 +61,28 @@ get_index_for_opcode (unsigned int insn)
   if (spu_disassemble_table[0] == 0)
     init_spu_disassemble ();
 
-  if ((index = spu_disassemble_table[opcode & 0x780]) != 0
-      && index->insn_type == RRR)
-    return index;
+  if ((op_index = spu_disassemble_table[opcode & 0x780]) != 0
+      && op_index->insn_type == RRR)
+    return op_index;
 
-  if ((index = spu_disassemble_table[opcode & 0x7f0]) != 0
-      && (index->insn_type == RI18 || index->insn_type == LBT))
-    return index;
+  if ((op_index = spu_disassemble_table[opcode & 0x7f0]) != 0
+      && (op_index->insn_type == RI18 || op_index->insn_type == LBT))
+    return op_index;
 
-  if ((index = spu_disassemble_table[opcode & 0x7f8]) != 0
-      && index->insn_type == RI10)
-    return index;
+  if ((op_index = spu_disassemble_table[opcode & 0x7f8]) != 0
+      && op_index->insn_type == RI10)
+    return op_index;
 
-  if ((index = spu_disassemble_table[opcode & 0x7fc]) != 0
-      && (index->insn_type == RI16))
-    return index;
+  if ((op_index = spu_disassemble_table[opcode & 0x7fc]) != 0
+      && (op_index->insn_type == RI16))
+    return op_index;
 
-  if ((index = spu_disassemble_table[opcode & 0x7fe]) != 0
-      && (index->insn_type == RI8))
-    return index;
+  if ((op_index = spu_disassemble_table[opcode & 0x7fe]) != 0
+      && (op_index->insn_type == RI8))
+    return op_index;
 
-  if ((index = spu_disassemble_table[opcode & 0x7ff]) != 0)
-    return index;
+  if ((op_index = spu_disassemble_table[opcode & 0x7ff]) != 0)
+    return op_index;
 
   return 0;
 }
@@ -97,7 +97,7 @@ print_insn_spu (bfd_vma memaddr, struct disassemble_info *info)
   int hex_value;
   int status;
   unsigned int insn;
-  const struct spu_opcode *index;
+  const struct spu_opcode *op_index;
   enum spu_insns tag;
 
   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
@@ -109,9 +109,9 @@ print_insn_spu (bfd_vma memaddr, struct disassemble_info *info)
 
   insn = bfd_getb32 (buffer);
 
-  index = get_index_for_opcode (insn);
+  op_index = get_index_for_opcode (insn);
 
-  if (index == 0)
+  if (op_index == 0)
     {
       (*info->fprintf_func) (info->stream, ".long 0x%x", insn);
     }
@@ -119,8 +119,8 @@ print_insn_spu (bfd_vma memaddr, struct disassemble_info *info)
     {
       int i;
       int paren = 0;
-      tag = (enum spu_insns)(index - spu_opcodes);
-      (*info->fprintf_func) (info->stream, "%s", index->mnemonic);
+      tag = (enum spu_insns)(op_index - spu_opcodes);
+      (*info->fprintf_func) (info->stream, "%s", op_index->mnemonic);
       if (tag == M_BI || tag == M_BISL || tag == M_IRET || tag == M_BISLED
 	  || tag == M_BIHNZ || tag == M_BIHZ || tag == M_BINZ || tag == M_BIZ
           || tag == M_SYNC || tag == M_HBR)
@@ -133,12 +133,12 @@ print_insn_spu (bfd_vma memaddr, struct disassemble_info *info)
 	  if (fb & 0x10)
 	    (*info->fprintf_func) (info->stream, "e");
 	}
-      if (index->arg[0] != 0)
+      if (op_index->arg[0] != 0)
 	(*info->fprintf_func) (info->stream, "\t");
       hex_value = 0;
-      for (i = 1;  i <= index->arg[0]; i++)
+      for (i = 1;  i <= op_index->arg[0]; i++)
 	{
-	  int arg = index->arg[i];
+	  int arg = op_index->arg[i];
 	  if (arg != A_P && !paren && i > 1)
 	    (*info->fprintf_func) (info->stream, ",");