X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Fspu-opc.c;h=591251381d0055c572bdbc2af367e570ced9f926;hb=f3f8ece4b1c77c925d1f1566df0bf632790a4d24;hp=f93d5b284c4db888930d78ed7c34d50f873004cc;hpb=b90efa5b79ac1524ec260f8eb89d1be37e0219a7;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/spu-opc.c b/opcodes/spu-opc.c
index f93d5b284c..591251381d 100644
--- a/opcodes/spu-opc.c
+++ b/opcodes/spu-opc.c
@@ -1,6 +1,6 @@
 /* SPU opcode list
 
-   Copyright (C) 2006-2015 Free Software Foundation, Inc.
+   Copyright (C) 2006-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -26,9 +26,9 @@
 
 /*
    Example contents of spu-insn.h
-      id_tag	mode	mode	type	opcode	mnemonic	asmtype	    dependency		FPU	L/S?	branch?	instruction   
-                QUAD	WORD                                               (0,RC,RB,RA,RT)    latency  			              		
-   APUOP(M_LQD,	1,	0,	RI9,	0x1f8,	"lqd",		ASM_RI9IDX,	00012,		FXU,	1,	0)	Load Quadword d-form 
+      id_tag	mode	mode	type	opcode	mnemonic	asmtype	    dependency		FPU	L/S?	branch?	instruction
+                QUAD	WORD                                               (0,RC,RB,RA,RT)    latency
+   APUOP(M_LQD,	1,	0,	RI9,	0x1f8,	"lqd",		ASM_RI9IDX,	00012,		FXU,	1,	0)	Load Quadword d-form
  */
 
 const struct spu_opcode spu_opcodes[] = {