X-Git-Url: http://git.efficios.com/?a=blobdiff_plain;f=opcodes%2Ftic30-dis.c;h=82154715e2dfd808f8daeb8e4d820f2a0f6db766;hb=c17e02e1b55b5e9cbdc6581f05bfec96dc8436f4;hp=614da14774bc0abc395104feae5f3e0f14e91c71;hpb=6f2750feaf2827ef8a1a0a5b2f90c1e9a6cabbd1;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/tic30-dis.c b/opcodes/tic30-dis.c
index 614da14774..82154715e2 100644
--- a/opcodes/tic30-dis.c
+++ b/opcodes/tic30-dis.c
@@ -1,5 +1,5 @@
 /* Disassembly routines for TMS320C30 architecture
-   Copyright (C) 1998-2016 Free Software Foundation, Inc.
+   Copyright (C) 1998-2020 Free Software Foundation, Inc.
    Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
 
    This file is part of the GNU opcodes library.
@@ -22,7 +22,7 @@
 #include "sysdep.h"
 #include <errno.h>
 #include <math.h>
-#include "dis-asm.h"
+#include "disassemble.h"
 #include "opcode/tic30.h"
 
 #define NORMAL_INSN   1
@@ -188,6 +188,8 @@ get_tic30_instruction (unsigned long insn_word, struct instruction *insn)
   return 1;
 }
 
+#define OPERAND_BUFFER_LEN 15
+
 static int
 get_register_operand (unsigned char fragment, char *buffer)
 {
@@ -199,7 +201,8 @@ get_register_operand (unsigned char fragment, char *buffer)
     {
       if ((fragment & 0x1F) == current_reg->opcode)
 	{
-	  strcpy (buffer, current_reg->name);
+	  strncpy (buffer, current_reg->name, OPERAND_BUFFER_LEN);
+	  buffer[OPERAND_BUFFER_LEN - 1] = 0;
 	  return 1;
 	}
     }
@@ -250,16 +253,25 @@ get_indirect_operand (unsigned short fragment,
 		int bufcnt;
 
 		len = strlen (current_ind->syntax);
+
 		for (i = 0, bufcnt = 0; i < len; i++, bufcnt++)
 		  {
 		    buffer[bufcnt] = current_ind->syntax[i];
-		    if (buffer[bufcnt - 1] == 'a' && buffer[bufcnt] == 'r')
+
+		    if (bufcnt > 0
+			&& bufcnt < OPERAND_BUFFER_LEN - 1
+			&& buffer[bufcnt - 1] == 'a'
+			&& buffer[bufcnt] == 'r')
 		      buffer[++bufcnt] = arnum + '0';
-		    if (buffer[bufcnt] == '('
+		    
+		    if (bufcnt < OPERAND_BUFFER_LEN - 1
+			&& buffer[bufcnt] == '('
 			&& current_ind->displacement == DISP_REQUIRED)
 		      {
-			sprintf (&buffer[bufcnt + 1], "%u", disp);
-			bufcnt += strlen (&buffer[bufcnt + 1]);
+			snprintf (buffer + (bufcnt + 1),
+				 OPERAND_BUFFER_LEN - (bufcnt + 1),
+				 "%u", disp);
+			bufcnt += strlen (buffer + (bufcnt + 1));
 		      }
 		  }
 		buffer[bufcnt + 1] = '\0';
@@ -340,7 +352,7 @@ print_two_operand (disassemble_info *info,
 		   struct instruction *insn)
 {
   char name[12];
-  char operand[2][13] =
+  char operand[2][OPERAND_BUFFER_LEN] =
   {
     {0},
     {0}
@@ -427,7 +439,7 @@ print_three_operand (disassemble_info *info,
 		     unsigned long insn_word,
 		     struct instruction *insn)
 {
-  char operand[3][13] =
+  char operand[3][OPERAND_BUFFER_LEN] =
   {
     {0},
     {0},
@@ -473,7 +485,7 @@ print_par_insn (disassemble_info *info,
 {
   size_t i, len;
   char *name1, *name2;
-  char operand[2][3][13] =
+  char operand[2][3][OPERAND_BUFFER_LEN] =
   {
     {
       {0},
@@ -595,7 +607,7 @@ print_branch (disassemble_info *info,
 	      unsigned long insn_word,
 	      struct instruction *insn)
 {
-  char operand[2][13] =
+  char operand[2][OPERAND_BUFFER_LEN] =
   {
     {0},
     {0}
@@ -684,8 +696,10 @@ print_insn_tic30 (bfd_vma pc, disassemble_info *info)
   bfd_vma bufaddr = pc - info->buffer_vma;
 
   /* Obtain the current instruction word from the buffer.  */
-  insn_word = (*(info->buffer + bufaddr) << 24) | (*(info->buffer + bufaddr + 1) << 16) |
-    (*(info->buffer + bufaddr + 2) << 8) | *(info->buffer + bufaddr + 3);
+  insn_word = (((unsigned) *(info->buffer + bufaddr) << 24)
+	       | (*(info->buffer + bufaddr + 1) << 16)
+	       | (*(info->buffer + bufaddr + 2) << 8)
+	       | *(info->buffer + bufaddr + 3));
   _pc = pc / 4;
   /* Get the instruction refered to by the current instruction word
      and print it out based on its type.  */